fixed clock config, fixed UART pins

fixed clock config, fixed UART pins

fixed clock config, fixed UART pins

fixed clock config, fixed UART pins

Author: thinkberg

targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/TARGET_USENSE/PinNames.h

@@ -115,9 +115,9 @@ typedef enum {
     //Push buttons
     SW0 = PTE2,
 
-    USBTX = PTA1,
-    USBRX = PTA2,
-    
+    USBRX = PTA1,
+    USBTX = PTA2,
+
     UART_RTS = PTC1,
     UART_CTS = PTC2,
     UART_RX  = PTC3,

targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/TARGET_USENSE/fsl_clock_config.c

@@ -1,33 +1,3 @@
-/*
- * Copyright (c) 2015, Freescale Semiconductor, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * o Redistributions of source code must retain the above copyright notice, this list
- *   of conditions and the following disclaimer.
- *
- * o Redistributions in binary form must reproduce the above copyright notice, this
- *   list of conditions and the following disclaimer in the documentation and/or
- *   other materials provided with the distribution.
- *
- * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
- *   contributors may be used to endorse or promote products derived from this
- *   software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
 /*
  * How to setup clock using clock driver functions:
  *
@@ -56,14 +26,14 @@
  * 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM.
  */
 
-/* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
-!!ClocksProfile
-product: Clocks v1.0
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v3.0
 processor: MKL82Z128xxx7
 package_id: MKL82Z128VLL7
 mcu_data: ksdk2_0
-processor_version: 1.1.0
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
+processor_version: 2.0.0
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
 
 #include "fsl_clock_config.h"
 
@@ -99,44 +69,53 @@ static void CLOCK_CONFIG_SetFllExtRefDiv(uint8_t frdiv)
     MCG->C1 = ((MCG->C1 & ~MCG_C1_FRDIV_MASK) | MCG_C1_FRDIV(frdiv));
 }
 
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
 /*******************************************************************************
  ********************** Configuration BOARD_BootClockRUN ***********************
  ******************************************************************************/
-/* TEXT BELOW IS USED AS SETTING FOR THE CLOCKS TOOL *****************************
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 !!Configuration
 name: BOARD_BootClockRUN
+called_from_default_init: true
 outputs:
-- {id: Bus_clock.outFreq, value: 24 MHz}
-- {id: Core_clock.outFreq, value: 48 MHz, locked: true, accuracy: '0.001'}
+- {id: Bus_clock.outFreq, value: 16 MHz}
+- {id: Core_clock.outFreq, value: 48 MHz}
 - {id: Fast_bus_clock.outFreq, value: 48 MHz}
-- {id: Flash_clock.outFreq, value: 24 MHz}
+- {id: Flash_clock.outFreq, value: 16 MHz}
 - {id: IRC48MCLK.outFreq, value: 48 MHz}
 - {id: LPO_clock.outFreq, value: 1 kHz}
-- {id: LPUARTCLK.outFreq, value: 28.8 MHz}
-- {id: MCGPLLCLK.outFreq, value: 144 MHz}
-- {id: MCGPLLCLK2X.outFreq, value: 288 MHz}
-- {id: PLLFLLCLK.outFreq, value: 144 MHz}
+- {id: LPUARTCLK.outFreq, value: 48 MHz}
+- {id: MCGPLLCLK.outFreq, value: 96 MHz}
+- {id: MCGPLLCLK2X.outFreq, value: 192 MHz}
+- {id: PLLFLLCLK.outFreq, value: 96 MHz}
 - {id: System_clock.outFreq, value: 48 MHz}
 settings:
 - {id: MCGMode, value: PEE}
 - {id: LPUARTClkConfig, value: 'yes'}
-- {id: MCG.FLL_mul.scale, value: '640', locked: true}
 - {id: MCG.IREFS.sel, value: MCG.FRDIV}
 - {id: MCG.OSCSEL.sel, value: SIM.IRC48MCLK}
 - {id: MCG.OSCSEL_PLL.sel, value: SIM.IRC48MCLK}
 - {id: MCG.PLLS.sel, value: MCG.PLL_DIV2}
-- {id: MCG.PRDIV.scale, value: '3'}
-- {id: MCG.VDIV.scale, value: '18'}
+- {id: MCG.PRDIV.scale, value: '4'}
+- {id: RTC_CR_OSCE_CFG, value: Enabled}
+- {id: SIM.FLEXIOSRCSEL.sel, value: SIM.PLLFLLDIV}
 - {id: SIM.LPUARTSRCSEL.sel, value: SIM.PLLFLLDIV}
-- {id: SIM.OUTDIV1.scale, value: '3'}
+- {id: SIM.OUTDIV1.scale, value: '2'}
 - {id: SIM.OUTDIV2.scale, value: '6'}
 - {id: SIM.OUTDIV4.scale, value: '6'}
-- {id: SIM.OUTDIV5.scale, value: '3'}
-- {id: SIM.PLLFLLDIV.scale, value: '5'}
+- {id: SIM.OUTDIV5.scale, value: '2'}
+- {id: SIM.PLLFLLDIV.scale, value: '2'}
 - {id: SIM.PLLFLLSEL.sel, value: MCG.MCGPLLCLK}
 sources:
 - {id: IRC48M.IRC48M.outFreq, value: 48 MHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE CLOCKS TOOL **/
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
 
 /*******************************************************************************
  * Variables for BOARD_BootClockRUN configuration
@@ -154,17 +133,17 @@ const mcg_config_t mcgConfig_BOARD_BootClockRUN =
         .pll0Config =
             {
                 .enableMode = MCG_PLL_DISABLE,    /* MCGPLLCLK disabled */
-                .prdiv = 0x2U,                    /* PLL Reference divider: divided by 3 */
-                .vdiv = 0x2U,                     /* VCO divider: multiplied by 18 */
+                .prdiv = 0x3U,                    /* PLL Reference divider: divided by 4 */
+                .vdiv = 0x0U,                     /* VCO divider: multiplied by 16 */
             },
     };
 const sim_clock_config_t simConfig_BOARD_BootClockRUN =
     {
         .pllFllSel = SIM_PLLFLLSEL_MCGPLLCLK_CLK, /* PLLFLL select: MCGPLLCLK clock */
-        .pllFllDiv = 4,                           /* PLLFLLSEL clock divider divisor: divided by 5 */
+        .pllFllDiv = 1,                           /* PLLFLLSEL clock divider divisor: divided by 2 */
         .pllFllFrac = 0,                          /* PLLFLLSEL clock divider fraction: multiplied by 1 */
         .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK,  /* OSC32KSEL select: OSC32KCLK clock */
-        .clkdiv1 = 0x25052000U,                   /* SIM_CLKDIV1 - OUTDIV1: /3, OUTDIV2: /6, OUTDIV4: /6, OUTDIV5: /3 */
+        .clkdiv1 = 0x15051000U,                   /* SIM_CLKDIV1 - OUTDIV1: /2, OUTDIV2: /6, OUTDIV4: /6, OUTDIV5: /2 */
     };
 const osc_config_t oscConfig_BOARD_BootClockRUN =
     {

targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/TARGET_USENSE/fsl_clock_config.h

@@ -1,33 +1,3 @@
-/*
- * Copyright (c) 2015, Freescale Semiconductor, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * o Redistributions of source code must retain the above copyright notice, this list
- *   of conditions and the following disclaimer.
- *
- * o Redistributions in binary form must reproduce the above copyright notice, this
- *   list of conditions and the following disclaimer in the documentation and/or
- *   other materials provided with the distribution.
- *
- * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
- *   contributors may be used to endorse or promote products derived from this
- *   software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
 #ifndef _CLOCK_CONFIG_H_
 #define _CLOCK_CONFIG_H_
 
@@ -37,6 +7,24 @@
  * Definitions
  ******************************************************************************/
 
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
 /*******************************************************************************
  ********************** Configuration BOARD_BootClockRUN ***********************
  ******************************************************************************/