Skip to content

Commit bc0fbd3

Browse files
jeromecoutantjeromecoutant
committed
STM32 clock configuration depending on USB
1 parent 3e4989b commit bc0fbd3

File tree

18 files changed

+102
-8
lines changed

18 files changed

+102
-8
lines changed

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_DISCO_F413ZH/system_clock.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -187,6 +187,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
187187
return 0; // FAIL
188188
}
189189

190+
#if DEVICE_USBDEVICE
190191
/* Select PLLSAI output as USB clock source */
191192
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
192193
PeriphClkInitStruct.PLLI2S.PLLI2SM = 8;
@@ -195,8 +196,8 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
195196
PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
196197
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLI2SQ;
197198
PeriphClkInitStruct.PLLI2SSelection = RCC_PLLI2SCLKSOURCE_PLLSRC;
198-
199199
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
200+
#endif /* DEVICE_USBDEVICE */
200201

201202
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
202203
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
@@ -254,6 +255,7 @@ uint8_t SetSysClock_PLL_HSI(void)
254255
return 0; // FAIL
255256
}
256257

258+
#if DEVICE_USBDEVICE
257259
/* Select PLLI2S output as USB clock source */
258260
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
259261
PeriphClkInitStruct.PLLI2S.PLLI2SM = 16;
@@ -262,8 +264,8 @@ uint8_t SetSysClock_PLL_HSI(void)
262264
PeriphClkInitStruct.PLLI2S.PLLI2SR = 2;
263265
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLI2SQ;
264266
PeriphClkInitStruct.PLLI2SSelection = RCC_PLLI2SCLKSOURCE_PLLSRC;
265-
266267
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
268+
#endif /* DEVICE_USBDEVICE */
267269

268270
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
269271
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/TARGET_NUCLEO_F413ZH/system_clock.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -176,14 +176,15 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
176176
return 0; // FAIL
177177
}
178178

179+
#if DEVICE_USBDEVICE
179180
/* Select PLLSAI output as USB clock source */
180181
PeriphClkInitStruct.PLLI2S.PLLI2SM = 8;
181182
PeriphClkInitStruct.PLLI2S.PLLI2SQ = 4;
182183
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
183184
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
184185
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLI2SQ;
185-
186186
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
187+
#endif /* DEVICE_USBDEVICE */
187188

188189
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
189190
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
@@ -241,14 +242,15 @@ uint8_t SetSysClock_PLL_HSI(void)
241242
return 0; // FAIL
242243
}
243244

245+
#if DEVICE_USBDEVICE
244246
/* Select PLLI2S output as USB clock source */
245247
PeriphClkInitStruct.PLLI2S.PLLI2SM = 16;
246248
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
247249
PeriphClkInitStruct.PLLI2S.PLLI2SQ = 4;
248250
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
249251
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLI2SQ;
250-
251252
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
253+
#endif /* DEVICE_USBDEVICE */
252254

253255
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
254256
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446RE/system_clock.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -172,13 +172,15 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
172172
return 0; // FAIL
173173
}
174174

175+
#if DEVICE_USBDEVICE
175176
// Select PLLSAI output as USB clock source
176177
PeriphClkInitStruct.PLLSAI.PLLSAIM = 8;
177178
PeriphClkInitStruct.PLLSAI.PLLSAIN = 384;
178179
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV8;
179180
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
180181
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP;
181182
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
183+
#endif /* DEVICE_USBDEVICE */
182184

183185
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
184186
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
@@ -240,13 +242,15 @@ uint8_t SetSysClock_PLL_HSI(void)
240242
return 0; // FAIL
241243
}
242244

245+
#if DEVICE_USBDEVICE
243246
// Select PLLSAI output as USB clock source
244247
PeriphClkInitStruct.PLLSAI.PLLSAIM = 8;
245248
PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
246249
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV8;
247250
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
248251
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP;
249252
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
253+
#endif /* DEVICE_USBDEVICE */
250254

251255
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
252256
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/TARGET_NUCLEO_F446ZE/system_clock.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -183,13 +183,15 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
183183
return 0; // FAIL
184184
}
185185

186+
#if DEVICE_USBDEVICE
186187
// Select PLLSAI output as USB clock source
187188
PeriphClkInitStruct.PLLSAI.PLLSAIM = 8;
188189
PeriphClkInitStruct.PLLSAI.PLLSAIN = 384;
189190
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV8;
190191
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
191192
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP;
192193
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
194+
#endif /* DEVICE_USBDEVICE */
193195

194196
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
195197
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
@@ -248,13 +250,15 @@ uint8_t SetSysClock_PLL_HSI(void)
248250
return 0; // FAIL
249251
}
250252

253+
#if DEVICE_USBDEVICE
251254
/* Select PLLSAI output as USB clock source */
252255
PeriphClkInitStruct.PLLSAI.PLLSAIM = 8;
253256
PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
254257
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV8;
255258
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
256259
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP;
257260
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
261+
#endif /* DEVICE_USBDEVICE */
258262

259263
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
260264
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/TARGET_DISCO_F469NI/system_clock.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -184,12 +184,14 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
184184
return 0; // FAIL
185185
}
186186

187+
#if DEVICE_USBDEVICE
187188
// Select PLLSAI output as USB clock source
188189
PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
189190
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4;
190191
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
191192
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP;
192193
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
194+
#endif /* DEVICE_USBDEVICE */
193195

194196
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
195197
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
@@ -248,12 +250,14 @@ uint8_t SetSysClock_PLL_HSI(void)
248250
return 0; // FAIL
249251
}
250252

253+
#if DEVICE_USBDEVICE
251254
/* Select PLLSAI output as USB clock source */
252255
PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
253256
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV4;
254257
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
255258
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLSAIP;
256259
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
260+
#endif /* DEVICE_USBDEVICE */
257261

258262
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
259263
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);

‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/system_clock.c

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -140,13 +140,16 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
140140
return 0; // FAIL
141141
}
142142

143-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_USB;
144-
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
143+
#if DEVICE_USBDEVICE
144+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
145145
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
146146
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
147147
return 0; // FAIL
148148
}
149149

150+
HAL_PWREx_EnableUSBVoltageDetector();
151+
#endif /* DEVICE_USBDEVICE */
152+
150153
return 1; // OK
151154
}
152155
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */

‎targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI2/system_clock.c

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -140,13 +140,16 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
140140
return 0; // FAIL
141141
}
142142

143-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_USB;
144-
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
143+
#if DEVICE_USBDEVICE
144+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
145145
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
146146
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
147147
return 0; // FAIL
148148
}
149149

150+
HAL_PWREx_EnableUSBVoltageDetector();
151+
#endif /* DEVICE_USBDEVICE */
152+
150153
return 1; // OK
151154
}
152155
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */

‎targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/system_clock.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -177,11 +177,13 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
177177
return 0; // FAIL
178178
}
179179

180+
#if DEVICE_USBDEVICE
180181
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
181182
RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
182183
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
183184
return 0; // FAIL
184185
}
186+
#endif /* DEVICE_USBDEVICE */
185187

186188
/* Output clock on MCO1 pin(PA8) for debugging purpose */
187189
//if (bypass == 0)
@@ -234,11 +236,13 @@ uint8_t SetSysClock_PLL_HSI(void)
234236
return 0; // FAIL
235237
}
236238

239+
#if DEVICE_USBDEVICE
237240
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
238241
RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
239242
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
240243
return 0; // FAIL
241244
}
245+
#endif /* DEVICE_USBDEVICE */
242246

243247
/* Output clock on MCO1 pin(PA8) for debugging purpose */
244248
//HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC/system_clock.c

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -169,6 +169,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
169169
return 0; // FAIL
170170
}
171171

172+
#if DEVICE_USBDEVICE
172173
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
173174
RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
174175
RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE;
@@ -181,6 +182,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
181182
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
182183
return 0; // FAIL
183184
}
185+
#endif /* DEVICE_USBDEVICE */
184186

185187
// Disable MSI Oscillator
186188
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
@@ -242,6 +244,7 @@ uint8_t SetSysClock_PLL_HSI(void)
242244
return 0; // FAIL
243245
}
244246

247+
#if DEVICE_USBDEVICE
245248
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
246249
RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
247250
RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI;
@@ -254,6 +257,7 @@ uint8_t SetSysClock_PLL_HSI(void)
254257
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
255258
return 0; // FAIL
256259
}
260+
#endif /* DEVICE_USBDEVICE */
257261

258262
// Disable MSI Oscillator
259263
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
@@ -317,10 +321,13 @@ uint8_t SetSysClock_PLL_MSI(void)
317321
HAL_RCCEx_EnableMSIPLLMode();
318322
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
319323

324+
#if DEVICE_USBDEVICE
320325
/* Select MSI output as USB clock source */
321326
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
322327
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */
323328
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
329+
#endif /* DEVICE_USBDEVICE */
330+
324331
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
325332
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
326333
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; /* 80 MHz */

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/TARGET_NUCLEO_L433RC_P/system_clock.c

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -169,6 +169,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
169169
return 0; // FAIL
170170
}
171171

172+
#if DEVICE_USBDEVICE
172173
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
173174
RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
174175
RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE;
@@ -181,6 +182,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
181182
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
182183
return 0; // FAIL
183184
}
185+
#endif /* DEVICE_USBDEVICE */
184186

185187
// Disable MSI Oscillator
186188
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
@@ -242,6 +244,7 @@ uint8_t SetSysClock_PLL_HSI(void)
242244
return 0; // FAIL
243245
}
244246

247+
#if DEVICE_USBDEVICE
245248
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
246249
RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
247250
RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI;
@@ -254,6 +257,7 @@ uint8_t SetSysClock_PLL_HSI(void)
254257
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
255258
return 0; // FAIL
256259
}
260+
#endif /* DEVICE_USBDEVICE */
257261

258262
// Disable MSI Oscillator
259263
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
@@ -317,10 +321,13 @@ uint8_t SetSysClock_PLL_MSI(void)
317321
HAL_RCCEx_EnableMSIPLLMode();
318322
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
319323

324+
#if DEVICE_USBDEVICE
320325
/* Select MSI output as USB clock source */
321326
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
322327
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */
323328
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
329+
#endif /* DEVICE_USBDEVICE */
330+
324331
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
325332
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
326333
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; /* 80 MHz */

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/system_clock.c

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -156,6 +156,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
156156
return 0; // FAIL
157157
}
158158

159+
#if DEVICE_USBDEVICE
159160
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
160161
RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
161162
RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSE;
@@ -168,6 +169,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
168169
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
169170
return 0; // FAIL
170171
}
172+
#endif /* DEVICE_USBDEVICE */
171173

172174
// Disable MSI Oscillator
173175
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
@@ -229,6 +231,7 @@ uint8_t SetSysClock_PLL_HSI(void)
229231
return 0; // FAIL
230232
}
231233

234+
#if DEVICE_USBDEVICE
232235
RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
233236
RCC_PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLLSAI1;
234237
RCC_PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_HSI;
@@ -241,6 +244,7 @@ uint8_t SetSysClock_PLL_HSI(void)
241244
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit) != HAL_OK) {
242245
return 0; // FAIL
243246
}
247+
#endif /* DEVICE_USBDEVICE */
244248

245249
// Disable MSI Oscillator
246250
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
@@ -304,10 +308,13 @@ uint8_t SetSysClock_PLL_MSI(void)
304308
HAL_RCCEx_EnableMSIPLLMode();
305309
#endif /* MBED_CONF_TARGET_LSE_AVAILABLE */
306310

311+
#if DEVICE_USBDEVICE
307312
/* Select MSI output as USB clock source */
308313
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
309314
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_MSI; /* 48 MHz */
310315
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
316+
#endif /* DEVICE_USBDEVICE */
317+
311318
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
312319
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
313320
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; /* 80 MHz */

0 commit comments

Comments
 (0)