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Commit bd5d415

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Fix interrupt timings
1 parent c724a1f commit bd5d415

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1 file changed

+11
-29
lines changed
  • libraries/mbed/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H

1 file changed

+11
-29
lines changed

libraries/mbed/targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/serial_api.c

Lines changed: 11 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -60,7 +60,6 @@ static void uart5_er_irq(void);
6060
static void uart6_er_irq(void);
6161
static void uart7_er_irq(void);
6262

63-
static void serial_put_prepare(serial_t *obj);
6463
static void serial_put_done(serial_t *obj);
6564
static uint8_t serial_available_buffer(serial_t *obj);
6665
static void serial_irq_err_set(serial_t *obj, uint32_t enable);
@@ -127,7 +126,7 @@ serial_t stdio_uart;
127126
struct serial_global_data_s {
128127
uint32_t serial_irq_id;
129128
gpio_t sw_rts, sw_cts;
130-
uint8_t count, rx_irq_set_flow, rx_irq_set_api;
129+
uint8_t rx_irq_set_flow, rx_irq_set_api;
131130
serial_t *tranferring_obj, *receiving_obj;
132131
uint32_t async_tx_callback, async_rx_callback;
133132
int event, wanted_rx_events;
@@ -296,7 +295,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
296295

297296
/* ---- Serial control register (SCSCR) setting ---- */
298297
/* Setting the TE and RE bits enables the TxD and RxD pins to be used. */
299-
obj->serial.uart->SCSCR = 0x00F0;
298+
obj->serial.uart->SCSCR = 0x0070;
300299

301300
is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
302301

@@ -399,7 +398,7 @@ void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_b
399398
break;
400399
}
401400

402-
obj->serial.uart->SCSMR = data_bits << 6
401+
obj->serial.uart->SCSMR = data_bits << 6
403402
| parity_enable << 5
404403
| parity_select << 4
405404
| stop_bits << 3;
@@ -413,7 +412,7 @@ static void uart_tx_irq(IRQn_Type irq_num, uint32_t index) {
413412
__IO uint16_t *dmy_rd_scscr;
414413
__IO uint16_t *dmy_rd_scfsr;
415414
serial_t *obj;
416-
size_t i;
415+
int i;
417416

418417
dmy_rd_scscr = SCSCR_MATCH[index];
419418
*dmy_rd_scscr &= 0x007B; // Clear TIE and Write to bit15~8,2 is always 0
@@ -422,10 +421,8 @@ static void uart_tx_irq(IRQn_Type irq_num, uint32_t index) {
422421

423422
obj = uart_data[index].tranferring_obj;
424423
if (obj) {
425-
serial_put_done(obj);
426424
i = obj->tx_buff.length - obj->tx_buff.pos;
427425
if (0 < i) {
428-
serial_put_prepare(obj);
429426
if (serial_available_buffer(obj) < i) {
430427
i = serial_available_buffer(obj);
431428
}
@@ -435,12 +432,12 @@ static void uart_tx_irq(IRQn_Type irq_num, uint32_t index) {
435432
++obj->tx_buff.pos;
436433
obj->serial.uart->SCFTDR = c;
437434
} while (--i);
435+
serial_put_done(obj);
438436
} else {
439437
uart_data[index].tranferring_obj = NULL;
440438
uart_data[index].event = SERIAL_EVENT_TX_COMPLETE;
441439
((void (*)())uart_data[index].async_tx_callback)();
442440
}
443-
__v7_inv_icache_all();
444441
}
445442

446443
irq_handler(uart_data[index].serial_irq_id, TxIrq);
@@ -492,7 +489,6 @@ static void uart_rx_irq(IRQn_Type irq_num, uint32_t index) {
492489
((void (*)())uart_data[index].async_rx_callback)();
493490
}
494491
}
495-
__v7_inv_icache_all();
496492
} else {
497493
serial_rx_abort_asynch(obj);
498494
if (uart_data[index].wanted_rx_events & (SERIAL_EVENT_RX_PARITY_ERROR | SERIAL_EVENT_RX_FRAMING_ERROR)) {
@@ -718,40 +714,25 @@ int serial_getc(serial_t *obj) {
718714
return data;
719715
}
720716

721-
static void serial_put_prepare(serial_t *obj)
722-
{
723-
int was_masked;
724-
725-
#if defined ( __ICCARM__ )
726-
was_masked = __disable_irq_iar();
727-
#else
728-
was_masked = __disable_irq();
729-
#endif /* __ICCARM__ */
730-
obj->serial.uart->SCSCR |= 0x0080; // Set TIE
731-
if (!was_masked) {
732-
__enable_irq();
733-
}
734-
while (!serial_writable(obj));
735-
}
736-
737717
void serial_putc(serial_t *obj, int c) {
738-
serial_put_prepare(obj);
718+
while (!serial_writable(obj));
739719
obj->serial.uart->SCFTDR = c;
740720
serial_put_done(obj);
741-
uart_data[obj->serial.index].count++;
742721
}
743722

744723
static void serial_put_done(serial_t *obj)
745724
{
746725
int was_masked;
747-
uint16_t dummy_read;
726+
volatile uint16_t dummy_read;
727+
748728
#if defined ( __ICCARM__ )
749729
was_masked = __disable_irq_iar();
750730
#else
751731
was_masked = __disable_irq();
752732
#endif /* __ICCARM__ */
753733
dummy_read = obj->serial.uart->SCFSR;
754734
obj->serial.uart->SCFSR = (dummy_read & 0xff9f); // Clear TEND/TDFE
735+
obj->serial.uart->SCSCR |= 0x0080; // Set TIE
755736
if (!was_masked) {
756737
__enable_irq();
757738
}
@@ -884,7 +865,7 @@ int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx
884865
data->async_tx_callback = handler;
885866
serial_irq_set(obj, TxIrq, 1);
886867

887-
serial_put_prepare(obj);
868+
while (!serial_writable(obj));
888869
i = buf->length;
889870
if (serial_available_buffer(obj) < i) {
890871
i = serial_available_buffer(obj);
@@ -895,6 +876,7 @@ int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx
895876
++buf->pos;
896877
obj->serial.uart->SCFTDR = c;
897878
} while (--i);
879+
serial_put_done(obj);
898880

899881
return buf->length;
900882
}

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