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Merge pull request #4081 from andreaslarssonublox/add_bootloader_support_stm32f439xI
Add bootloader support stm32f439xI
2 parents 07ddb9d + 2d2f0a0 commit c2d1d97

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8 files changed

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-21
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8 files changed

+56
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‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f439xx.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,7 @@ Stack_Size EQU 0x00000400
5151
EXPORT __initial_sp
5252
5353
Stack_Mem SPACE Stack_Size
54-
__initial_sp EQU 0x20020000 ; Top of RAM
54+
__initial_sp EQU 0x20030000 ; Top of RAM
5555

5656

5757
; <h> Heap Configuration

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/stm32f439xx.sct

Lines changed: 18 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
#! armcc -E
12
; Scatter-Loading Description File
23
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
34
; Copyright (c) 2015, STMicroelectronics
@@ -27,19 +28,30 @@
2728
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2829
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2930

30-
; 2 MB FLASH (0x200000) + 256 KB SRAM (0x40000)
31-
LR_IROM1 0x08000000 0x200000 { ; load region size_region
31+
#if !defined(MBED_APP_START)
32+
#define MBED_APP_START 0x08000000
33+
#endif
3234

33-
ER_IROM1 0x08000000 0x200000 { ; load address = execution address
35+
#if !defined(MBED_APP_SIZE)
36+
#define MBED_APP_SIZE 0x200000
37+
#endif
38+
39+
; STM32F439xI: 2048 KB FLASH (0x200000) + 256 KB SRAM (0x30000 + 0x10000)
40+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
41+
42+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
3443
*.o (RESET, +First)
3544
*(InRoot$$Sections)
3645
.ANY (+RO)
3746
}
3847

39-
; Total: 107 vectors = 428 bytes (0x1AC) to be reserved in RAM
40-
RW_IRAM1 (0x20000000+0x1AC) (0x20000-0x1AC) { ; RW data
48+
; Total: 107 vectors = 428 bytes (0x1AC) to be used
49+
; should match ER_IROM1::RESET/4 and cmsis_nvic.h::NVIC_NUM_VECTORS
50+
RW_IRAM1 (0x20000000 + (107*4)) (0x30000 - (107*4)) { ; RW data
4151
.ANY (+RW +ZI)
4252
}
43-
53+
RW_IRAM2 (0x10000000) 0x10000 {
54+
.ANY (+RW +ZI)
55+
}
4456
}
4557

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_STD/stm32f439xx.sct

Lines changed: 16 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
#! armcc -E
12
; Scatter-Loading Description File
23
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
34
; Copyright (c) 2015, STMicroelectronics
@@ -27,10 +28,18 @@
2728
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2829
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2930

30-
; 2 MB FLASH (0x200000) + 192 KB SRAM (0x30000)
31-
LR_IROM1 0x08000000 0x200000 { ; load region size_region
31+
#if !defined(MBED_APP_START)
32+
#define MBED_APP_START 0x08000000
33+
#endif
3234

33-
ER_IROM1 0x08000000 0x200000 { ; load address = execution address
35+
#if !defined(MBED_APP_SIZE)
36+
#define MBED_APP_SIZE 0x200000
37+
#endif
38+
39+
; 2 MB FLASH (0x200000) + 256 KB SRAM (0x30000 + 0x10000)
40+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
41+
42+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
3443
*.o (RESET, +First)
3544
*(InRoot$$Sections)
3645
.ANY (+RO)
@@ -40,6 +49,9 @@ LR_IROM1 0x08000000 0x200000 { ; load region size_region
4049
RW_IRAM1 (0x20000000+0x1AC) (0x30000-0x1AC) { ; RW data
4150
.ANY (+RW +ZI)
4251
}
43-
52+
53+
RW_IRAM2 (0x10000000) (0x10000) { ; RW data
54+
.ANY (+RW +ZI)
55+
}
4456
}
4557

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_GCC_ARM/STM32F439ZI.ld

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,15 @@
1+
#if !defined(MBED_APP_START)
2+
#define MBED_APP_START 0x08000000
3+
#endif
4+
5+
#if !defined(MBED_APP_SIZE)
6+
#define MBED_APP_SIZE 2048k
7+
#endif
8+
19
/* Linker script to configure memory regions. */
210
MEMORY
311
{
4-
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048k
12+
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
513
CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
614
RAM (rwx) : ORIGIN = 0x200001AC, LENGTH = 192k - 0x1AC
715
}

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_IAR/stm32f439xx_flash.icf

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,19 +1,21 @@
11
/*###ICF### Section handled by ICF editor, don't touch! ****/
22
/*-Editor annotation file-*/
33
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
4+
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
5+
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; }
46
/*-Specials-*/
5-
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
7+
define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
68
/*-Memory Regions-*/
7-
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
8-
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
9+
define symbol __ICFEDIT_region_ROM_start__ = MBED_APP_START;
10+
define symbol __ICFEDIT_region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
911
define symbol __ICFEDIT_region_NVIC_start__ = 0x20000000;
1012
define symbol __ICFEDIT_region_NVIC_end__ = 0x200001AF;
1113
define symbol __ICFEDIT_region_RAM_start__ = 0x200001B0;
1214
define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF;
1315
define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000;
1416
define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF;
1517
/*-Sizes-*/
16-
/*Heap 1/3 of ram and stack 1/8*/
18+
/*Heap 64kB and stack 24kB */
1719
define symbol __ICFEDIT_size_cstack__ = 0x6000;
1820
define symbol __ICFEDIT_size_heap__ = 0x10000;
1921
/**** End of ICF editor section. ###ICF###*/

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/cmsis_nvic.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@
3232
#ifndef MBED_CMSIS_NVIC_H
3333
#define MBED_CMSIS_NVIC_H
3434

35-
// STM32F429ZI
35+
// STM32F439xI
3636
// CORE: 16 vectors = 64 bytes from 0x00 to 0x3F
3737
// MCU Peripherals: 91 vectors = 364 bytes from 0x40 to 0x1AB
3838
// Total: 107 vectors = 428 bytes (0x1AC) to be reserved in RAM

‎targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/stm32f4xx.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -86,12 +86,12 @@
8686
/* #define STM32F417xx */ /*!< STM32F417VG, STM32F417VE, STM32F417ZG, STM32F417ZE, STM32F417IG and STM32F417IE Devices */
8787
/* #define STM32F427xx */ /*!< STM32F427VG, STM32F427VI, STM32F427ZG, STM32F427ZI, STM32F427IG and STM32F427II Devices */
8888
/* #define STM32F437xx */ /*!< STM32F437VG, STM32F437VI, STM32F437ZG, STM32F437ZI, STM32F437IG and STM32F437II Devices */
89-
/*#define STM32F429xx */ /*!< STM32F429VG, STM32F429VI, STM32F429ZG, STM32F429ZI, STM32F429BG, STM32F429BI, STM32F429NG,
89+
/* #define STM32F429xx */ /*!< STM32F429VG, STM32F429VI, STM32F429ZG, STM32F429ZI, STM32F429BG, STM32F429BI, STM32F429NG,
9090
STM32F439NI, STM32F429IG and STM32F429II Devices */
91-
#define STM32F439xx /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG,
91+
#define STM32F439xx /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG,
9292
STM32F439NI, STM32F439IG and STM32F439II Devices */
9393
/* #define STM32F401xC */ /*!< STM32F401CB, STM32F401CC, STM32F401RB, STM32F401RC, STM32F401VB and STM32F401VC Devices */
94-
/* #define STM32F401xE */ /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */
94+
/* #define STM32F401xE */ /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */
9595
/* #define STM32F410Tx */ /*!< STM32F410T8 and STM32F410TB Devices */
9696
/* #define STM32F410Cx */ /*!< STM32F410C8 and STM32F410CB Devices */
9797
/* #define STM32F410Rx */ /*!< STM32F410R8 and STM32F410RB Devices */

‎targets/targets.json

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -908,7 +908,8 @@
908908
"detect_code": ["0797"],
909909
"features": ["LWIP"],
910910
"release_versions": ["2", "5"],
911-
"device_name" : "STM32F439ZI"
911+
"device_name" : "STM32F439ZI",
912+
"bootloader_supported": true
912913
},
913914
"NUCLEO_F446RE": {
914915
"supported_form_factors": ["ARDUINO", "MORPHO"],

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