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Merge pull request #14651 from JeanMarcR/STM32L4_NEW_CUBE
STM32L4 update drivers version to CUBE V1.17.0
2 parents 7f68465 + de330d4 commit c54b089

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‎targets/TARGET_STM/README.md

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -64,15 +64,15 @@ This table summarizes the STM32Cube versions currently used in Mbed OS master br
6464
| F0 | 1.11.2 | https://github.com/STMicroelectronics/STM32CubeF0 |
6565
| F1 | 1.8.3 | https://github.com/STMicroelectronics/STM32CubeF1 |
6666
| F2 | 1.6.0 | https://github.com/STMicroelectronics/STM32CubeF2 |
67-
| F3 | 1.11.2 | https://github.com/STMicroelectronics/STM32CubeF3 |
67+
| F3 | 1.11.2 | https://github.com/STMicroelectronics/STM32CubeF3 |
6868
| F4 | 1.26.0 | https://github.com/STMicroelectronics/STM32CubeF4 |
6969
| F7 | 1.16.0 | https://github.com/STMicroelectronics/STM32CubeF7 |
7070
| G0 | 1.4.1 | https://github.com/STMicroelectronics/STM32CubeG0 |
7171
| G4 | 1.1.0 | https://github.com/STMicroelectronics/STM32CubeG4 |
7272
| H7 | 1.8.0 | https://github.com/STMicroelectronics/STM32CubeH7 |
7373
| L0 | 1.11.3 | https://github.com/STMicroelectronics/STM32CubeL0 |
7474
| L1 | 1.10.2 | https://github.com/STMicroelectronics/STM32CubeL1 |
75-
| L4 | 1.16.0 | https://github.com/STMicroelectronics/STM32CubeL4 |
75+
| L4 | 1.17.0 | https://github.com/STMicroelectronics/STM32CubeL4 |
7676
| L5 | 1.3.0 | https://github.com/STMicroelectronics/STM32CubeL5 |
7777
| WB | 1.8.0 | https://github.com/STMicroelectronics/STM32CubeWB |
7878
| WL | 1.0.0 | https://github.com/STMicroelectronics/STM32CubeWL |

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l412xx.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2259,7 +2259,6 @@ typedef struct
22592259
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
22602260
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
22612261
#define CRS_CR_TRIM_6 (0x40UL << CRS_CR_TRIM_Pos) /*!< 0x00004000 */
2262-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
22632262

22642263
/******************* Bit definition for CRS_CFGR register *********************/
22652264
#define CRS_CFGR_RELOAD_Pos (0U)

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l422xx.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2294,7 +2294,6 @@ typedef struct
22942294
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
22952295
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
22962296
#define CRS_CR_TRIM_6 (0x40UL << CRS_CR_TRIM_Pos) /*!< 0x00004000 */
2297-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
22982297

22992298
/******************* Bit definition for CRS_CFGR register *********************/
23002299
#define CRS_CFGR_RELOAD_Pos (0U)

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l431xx.h

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5728,7 +5728,6 @@ typedef struct
57285728
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
57295729
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
57305730
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5731-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
57325731

57335732
/******************* Bit definition for CRS_CFGR register *********************/
57345733
#define CRS_CFGR_RELOAD_Pos (0U)
@@ -9276,15 +9275,13 @@ typedef struct
92769275

92779276
/*!< HSITRIM configuration */
92789277
#define RCC_ICSCR_HSITRIM_Pos (24U)
9279-
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
9280-
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
9278+
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
9279+
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
92819280
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
92829281
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
92839282
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
92849283
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
92859284
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
9286-
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
9287-
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
92889285

92899286
/******************** Bit definition for RCC_CFGR register ******************/
92909287
/*!< SW configuration */

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l432xx.h

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5713,7 +5713,6 @@ typedef struct
57135713
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
57145714
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
57155715
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5716-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
57175716

57185717
/******************* Bit definition for CRS_CFGR register *********************/
57195718
#define CRS_CFGR_RELOAD_Pos (0U)
@@ -8937,15 +8936,13 @@ typedef struct
89378936

89388937
/*!< HSITRIM configuration */
89398938
#define RCC_ICSCR_HSITRIM_Pos (24U)
8940-
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
8941-
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
8939+
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
8940+
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
89428941
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
89438942
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
89448943
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
89458944
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
89468945
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
8947-
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
8948-
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
89498946

89508947
/******************** Bit definition for RCC_CFGR register ******************/
89518948
/*!< SW configuration */

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l433xx.h

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5787,7 +5787,6 @@ typedef struct
57875787
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
57885788
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
57895789
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5790-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
57915790

57925791
/******************* Bit definition for CRS_CFGR register *********************/
57935792
#define CRS_CFGR_RELOAD_Pos (0U)
@@ -9368,15 +9367,13 @@ typedef struct
93689367

93699368
/*!< HSITRIM configuration */
93709369
#define RCC_ICSCR_HSITRIM_Pos (24U)
9371-
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
9372-
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
9370+
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
9371+
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
93739372
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
93749373
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
93759374
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
93769375
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
93779376
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
9378-
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
9379-
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
93809377

93819378
/******************** Bit definition for RCC_CFGR register ******************/
93829379
/*!< SW configuration */

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l442xx.h

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5748,7 +5748,6 @@ typedef struct
57485748
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
57495749
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
57505750
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5751-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
57525751

57535752
/******************* Bit definition for CRS_CFGR register *********************/
57545753
#define CRS_CFGR_RELOAD_Pos (0U)
@@ -9153,15 +9152,13 @@ typedef struct
91539152

91549153
/*!< HSITRIM configuration */
91559154
#define RCC_ICSCR_HSITRIM_Pos (24U)
9156-
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
9157-
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
9155+
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
9156+
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
91589157
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
91599158
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
91609159
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
91619160
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
91629161
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
9163-
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
9164-
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
91659162

91669163
/******************** Bit definition for RCC_CFGR register ******************/
91679164
/*!< SW configuration */

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l443xx.h

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5822,7 +5822,6 @@ typedef struct
58225822
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
58235823
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
58245824
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5825-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
58265825

58275826
/******************* Bit definition for CRS_CFGR register *********************/
58285827
#define CRS_CFGR_RELOAD_Pos (0U)
@@ -9584,15 +9583,13 @@ typedef struct
95849583

95859584
/*!< HSITRIM configuration */
95869585
#define RCC_ICSCR_HSITRIM_Pos (24U)
9587-
#define RCC_ICSCR_HSITRIM_Msk (0x7FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x7F000000 */
9588-
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[6:0] bits */
9586+
#define RCC_ICSCR_HSITRIM_Msk (0x1FUL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x1F000000 */
9587+
#define RCC_ICSCR_HSITRIM RCC_ICSCR_HSITRIM_Msk /*!< HSITRIM[4:0] bits */
95899588
#define RCC_ICSCR_HSITRIM_0 (0x01UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x01000000 */
95909589
#define RCC_ICSCR_HSITRIM_1 (0x02UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x02000000 */
95919590
#define RCC_ICSCR_HSITRIM_2 (0x04UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x04000000 */
95929591
#define RCC_ICSCR_HSITRIM_3 (0x08UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x08000000 */
95939592
#define RCC_ICSCR_HSITRIM_4 (0x10UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x10000000 */
9594-
#define RCC_ICSCR_HSITRIM_5 (0x20UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x20000000 */
9595-
#define RCC_ICSCR_HSITRIM_6 (0x40UL << RCC_ICSCR_HSITRIM_Pos) /*!< 0x40000000 */
95969593

95979594
/******************** Bit definition for RCC_CFGR register ******************/
95989595
/*!< SW configuration */

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l451xx.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5778,7 +5778,6 @@ typedef struct
57785778
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
57795779
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
57805780
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5781-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
57825781

57835782
/******************* Bit definition for CRS_CFGR register *********************/
57845783
#define CRS_CFGR_RELOAD_Pos (0U)

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l452xx.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5820,7 +5820,6 @@ typedef struct
58205820
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
58215821
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
58225822
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5823-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
58245823

58255824
/******************* Bit definition for CRS_CFGR register *********************/
58265825
#define CRS_CFGR_RELOAD_Pos (0U)

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l462xx.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5855,7 +5855,6 @@ typedef struct
58555855
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
58565856
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
58575857
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
5858-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
58595858

58605859
/******************* Bit definition for CRS_CFGR register *********************/
58615860
#define CRS_CFGR_RELOAD_Pos (0U)

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l496xx.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6271,7 +6271,6 @@ typedef struct
62716271
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
62726272
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
62736273
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
6274-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
62756274

62766275
/******************* Bit definition for CRS_CFGR register *********************/
62776276
#define CRS_CFGR_RELOAD_Pos (0U)

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l4a6xx.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6335,7 +6335,6 @@ typedef struct
63356335
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
63366336
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
63376337
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
6338-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
63396338

63406339
/******************* Bit definition for CRS_CFGR register *********************/
63416340
#define CRS_CFGR_RELOAD_Pos (0U)

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l4p5xx.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1635,7 +1635,6 @@ typedef struct
16351635
#define SAI2_Block_B ((SAI_Block_TypeDef *)SAI2_Block_B_BASE)
16361636
#define LTDC ((LTDC_TypeDef *)LTDC_BASE)
16371637
#define LTDC_Layer1 ((LTDC_Layer_TypeDef *)LTDC_Layer1_BASE)
1638-
#define LTDC_Layer2 ((LTDC_Layer_TypeDef *)LTDC_Layer2_BASE)
16391638
#define DFSDM1_Channel0 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel0_BASE)
16401639
#define DFSDM1_Channel1 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel1_BASE)
16411640
#define DFSDM1_Channel2 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel2_BASE)
@@ -6480,7 +6479,6 @@ typedef struct
64806479
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
64816480
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
64826481
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
6483-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
64846482

64856483
/******************* Bit definition for CRS_CFGR register *********************/
64866484
#define CRS_CFGR_RELOAD_Pos (0U)

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l4q5xx.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1685,7 +1685,6 @@ typedef struct
16851685
#define SAI2_Block_B ((SAI_Block_TypeDef *)SAI2_Block_B_BASE)
16861686
#define LTDC ((LTDC_TypeDef *)LTDC_BASE)
16871687
#define LTDC_Layer1 ((LTDC_Layer_TypeDef *)LTDC_Layer1_BASE)
1688-
#define LTDC_Layer2 ((LTDC_Layer_TypeDef *)LTDC_Layer2_BASE)
16891688
#define DFSDM1_Channel0 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel0_BASE)
16901689
#define DFSDM1_Channel1 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel1_BASE)
16911690
#define DFSDM1_Channel2 ((DFSDM_Channel_TypeDef *) DFSDM1_Channel2_BASE)
@@ -6532,7 +6531,6 @@ typedef struct
65326531
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
65336532
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
65346533
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
6535-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
65366534

65376535
/******************* Bit definition for CRS_CFGR register *********************/
65386536
#define CRS_CFGR_RELOAD_Pos (0U)

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l4r5xx.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6197,7 +6197,6 @@ typedef struct
61976197
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
61986198
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
61996199
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
6200-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
62016200

62026201
/******************* Bit definition for CRS_CFGR register *********************/
62036202
#define CRS_CFGR_RELOAD_Pos (0U)

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l4r7xx.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6283,7 +6283,6 @@ typedef struct
62836283
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
62846284
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
62856285
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
6286-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
62876286

62886287
/******************* Bit definition for CRS_CFGR register *********************/
62896288
#define CRS_CFGR_RELOAD_Pos (0U)

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l4r9xx.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6365,7 +6365,6 @@ typedef struct
63656365
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
63666366
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
63676367
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
6368-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
63696368

63706369
/******************* Bit definition for CRS_CFGR register *********************/
63716370
#define CRS_CFGR_RELOAD_Pos (0U)

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l4s5xx.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6261,7 +6261,6 @@ typedef struct
62616261
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
62626262
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
62636263
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
6264-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
62656264

62666265
/******************* Bit definition for CRS_CFGR register *********************/
62676266
#define CRS_CFGR_RELOAD_Pos (0U)

‎targets/TARGET_STM/TARGET_STM32L4/STM32Cube_FW/CMSIS/stm32l4s7xx.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6347,7 +6347,6 @@ typedef struct
63476347
#define CRS_CR_TRIM_3 (0x08UL << CRS_CR_TRIM_Pos) /*!< 0x00000800 */
63486348
#define CRS_CR_TRIM_4 (0x10UL << CRS_CR_TRIM_Pos) /*!< 0x00001000 */
63496349
#define CRS_CR_TRIM_5 (0x20UL << CRS_CR_TRIM_Pos) /*!< 0x00002000 */
6350-
#define CRS_CR_TRIM CRS_CR_TRIM_Msk /*!< HSI48 oscillator smooth trimming */
63516350

63526351
/******************* Bit definition for CRS_CFGR register *********************/
63536352
#define CRS_CFGR_RELOAD_Pos (0U)

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