Correct uninit region for nordic targets

theotherjimmy · theotherjimmy · commit ca41a0f59d7c · 2017-09-13T14:51:27.000-05:00
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct
@@ -19,7 +19,7 @@ LR_IROM1 0x1B000 0x0025000  {
    .ANY (+RO)
   }
   RW_IRAM0 0x20002ef8 UNINIT 0x000000c0  { ;no init section
-        *(noinit)
+        *(*noinit)
   }
   RW_IRAM1 0x20002FB8 0x00005048  {
    .ANY (+RW +ZI)
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S110/nRF51822.sct
@@ -19,7 +19,7 @@ LR_IROM1 0x18000 0x0028000  {
    .ANY (+RO)
   }
   RW_IRAM0 0x20002000 UNINIT 0x000000c0  { ;no init section
-        *(noinit)
+        *(*noinit)
   }
   RW_IRAM1 0x200020C0 0x00001F40  {
    .ANY (+RW +ZI)
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_ARM_STD/TARGET_MCU_NRF51_16K_S130/nRF51822.sct
@@ -19,7 +19,7 @@ LR_IROM1 0x0001B000 0x0025000  {
    .ANY (+RO)
   }
   RW_IRAM0 0x20002ef8 UNINIT 0x000000c0  { ;no init section
-        *(noinit)
+        *(*noinit)
   }
   RW_IRAM1 0x20002FB8 0x00001048  {
    .ANY (+RW +ZI)
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/device/TOOLCHAIN_ARM_STD/nRF52832.sct
@@ -19,7 +19,7 @@ LR_IROM1 0x1C000 0x0064000  {
    .ANY (+RO)
   }
   RW_IRAM0 0x20002EF8 UNINIT 0x000000D8  { ;no init section
-        *(noinit)
+        *(*noinit)
   }
   RW_IRAM1 0x20002FD0 0x0000D030  {
    .ANY (+RW +ZI)
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52832.sct b/targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52840/device/TOOLCHAIN_ARM_STD/nRF52832.sct
@@ -5,7 +5,7 @@ LR_IROM1 0x21000 0x00DF000  {
    .ANY (+RO)
   }
   RW_IRAM0 0x20003288 UNINIT 0x000000F8  { ;no init section
-        *(noinit)
+        *(*noinit)
   }
   RW_IRAM1 0x20003380 0x0003cc80  {
    .ANY (+RW +ZI)
diff --git a/targets/TARGET_NORDIC/TARGET_NRF5/reloc_vector_table.c b/targets/TARGET_NORDIC/TARGET_NRF5/reloc_vector_table.c
@@ -42,8 +42,8 @@
 #include "nrf_sdm.h"
 #include "section_vars.h"
 
-#if defined(__CC_ARM)
-    __attribute__ ((section("noinit"),zero_init))
+#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050))
+    __attribute__ ((section(".bss.noinit"),zero_init))
     uint32_t nrf_dispatch_vector[NVIC_NUM_VECTORS];
 #elif defined(__GNUC__)
     __attribute__ ((section(".noinit")))

Original file line number	Diff line number	Diff line change
`@@ -19,7 +19,7 @@ LR_IROM1 0x1B000 0x0025000 {`
`19`	`19`	`.ANY (+RO)`
`20`	`20`	`}`
`21`	`21`	`RW_IRAM0 0x20002ef8 UNINIT 0x000000c0 { ;no init section`
`22`		`- *(noinit)`
	`22`	`+ (noinit)`
`23`	`23`	`}`
`24`	`24`	`RW_IRAM1 0x20002FB8 0x00005048 {`
`25`	`25`	`.ANY (+RW +ZI)`
Original file line number	Diff line number	Diff line change
`@@ -19,7 +19,7 @@ LR_IROM1 0x18000 0x0028000 {`
`19`	`19`	`.ANY (+RO)`
`20`	`20`	`}`
`21`	`21`	`RW_IRAM0 0x20002000 UNINIT 0x000000c0 { ;no init section`
`22`		`- *(noinit)`
	`22`	`+ (noinit)`
`23`	`23`	`}`
`24`	`24`	`RW_IRAM1 0x200020C0 0x00001F40 {`
`25`	`25`	`.ANY (+RW +ZI)`
Original file line number	Diff line number	Diff line change
`@@ -19,7 +19,7 @@ LR_IROM1 0x0001B000 0x0025000 {`
`19`	`19`	`.ANY (+RO)`
`20`	`20`	`}`
`21`	`21`	`RW_IRAM0 0x20002ef8 UNINIT 0x000000c0 { ;no init section`
`22`		`- *(noinit)`
	`22`	`+ (noinit)`
`23`	`23`	`}`
`24`	`24`	`RW_IRAM1 0x20002FB8 0x00001048 {`
`25`	`25`	`.ANY (+RW +ZI)`
Original file line number	Diff line number	Diff line change
`@@ -19,7 +19,7 @@ LR_IROM1 0x1C000 0x0064000 {`
`19`	`19`	`.ANY (+RO)`
`20`	`20`	`}`
`21`	`21`	`RW_IRAM0 0x20002EF8 UNINIT 0x000000D8 { ;no init section`
`22`		`- *(noinit)`
	`22`	`+ (noinit)`
`23`	`23`	`}`
`24`	`24`	`RW_IRAM1 0x20002FD0 0x0000D030 {`
`25`	`25`	`.ANY (+RW +ZI)`
Original file line number	Diff line number	Diff line change
`@@ -5,7 +5,7 @@ LR_IROM1 0x21000 0x00DF000 {`
`5`	`5`	`.ANY (+RO)`
`6`	`6`	`}`
`7`	`7`	`RW_IRAM0 0x20003288 UNINIT 0x000000F8 { ;no init section`
`8`		`- *(noinit)`
	`8`	`+ (noinit)`
`9`	`9`	`}`
`10`	`10`	`RW_IRAM1 0x20003380 0x0003cc80 {`
`11`	`11`	`.ANY (+RW +ZI)`