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Cosmetic changes to incorporate review feedback
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13 files changed

+268
-248
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13 files changed

+268
-248
lines changed

‎targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/analogin_api.c

Lines changed: 29 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/* mbed Microcontroller Library
2-
* Copyright (c) 2006-2013 ARM Limited
2+
* Copyright (c) 2018-2019 ARM Limited
33
*
44
* Licensed under the Apache License, Version 2.0 (the "License");
55
* you may not use this file except in compliance with the License.
@@ -19,38 +19,50 @@
1919
#include "PeripheralPins.h"
2020
#include "PinNames.h"
2121
#include "cmsis.h"
22-
23-
#include <ti/devices/cc32xx/inc/hw_types.h>
24-
#include <ti/devices/cc32xx/driverlib/adc.h>
25-
#include <ti/devices/cc32xx/driverlib/prcm.h>
26-
#include <ti/devices/cc32xx/driverlib/pin.h>
27-
#include <ti/devices/cc32xx/inc/hw_memmap.h>
22+
23+
#include "ti/devices/cc32xx/inc/hw_types.h"
24+
#include "ti/devices/cc32xx/driverlib/adc.h"
25+
#include "ti/devices/cc32xx/driverlib/prcm.h"
26+
#include "ti/devices/cc32xx/driverlib/pin.h"
27+
#include "ti/devices/cc32xx/inc/hw_memmap.h"
2828

2929
#define ADC_DATA_MASK 0x3FFC //the data is from bit [13:2]
3030
#define ADC_RESOLUTION 0xFFF
3131

32-
void analogin_init(analogin_t *obj, PinName pin) {
32+
void analogin_init(analogin_t *obj, PinName pin)
33+
{
3334
ADCEnable(CC3220SF_ADC_BASE);
3435
obj->pin = pin;
3536
pin_mode(pin, Analog);
36-
switch(pin){
37-
case PIN_57:obj->adc_ch = ADC_CH_0;break;
38-
case PIN_58:obj->adc_ch = ADC_CH_1;break;
39-
case PIN_59:obj->adc_ch = ADC_CH_2;break;
40-
case PIN_60:obj->adc_ch = ADC_CH_3;break;
41-
default: MBED_ASSERT(NC != (PinName)NC);
37+
switch (pin) {
38+
case PIN_57:
39+
obj->adc_ch = ADC_CH_0;
40+
break;
41+
case PIN_58:
42+
obj->adc_ch = ADC_CH_1;
43+
break;
44+
case PIN_59:
45+
obj->adc_ch = ADC_CH_2;
46+
break;
47+
case PIN_60:
48+
obj->adc_ch = ADC_CH_3;
49+
break;
50+
default:
51+
MBED_ASSERT(NC != (PinName)NC);
4252
}
4353

4454
ADCChannelEnable(CC3220SF_ADC_BASE, obj->adc_ch);
4555
}
4656

47-
uint16_t analogin_read_u16(analogin_t *obj) {
57+
uint16_t analogin_read_u16(analogin_t *obj)
58+
{
4859
unsigned long adc_raw = ADCFIFORead(CC3220SF_ADC_BASE, obj->adc_ch);
4960

50-
return (uint16_t) ((adc_raw & ADC_DATA_MASK) >> 2);
61+
return (uint16_t)((adc_raw & ADC_DATA_MASK) >> 2);
5162
}
5263

53-
float analogin_read(analogin_t *obj) {
64+
float analogin_read(analogin_t *obj)
65+
{
5466
uint16_t value = analogin_read_u16(obj);
5567
return (float)value * (1.0f / (float)ADC_RESOLUTION);
5668
}

‎targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/flash_api.c

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/* mbed Microcontroller Library
2-
* Copyright (c) 2018 ARM Limited
2+
* Copyright (c) 2018-2019 ARM Limited
33
*
44
* Licensed under the Apache License, Version 2.0 (the "License");
55
* you may not use this file except in compliance with the License.
@@ -13,7 +13,7 @@
1313
* See the License for the specific language governing permissions and
1414
* limitations under the License.
1515
*/
16-
16+
1717
#if DEVICE_FLASH
1818

1919
#include "stdbool.h"
@@ -45,17 +45,14 @@ int32_t flash_erase_sector(flash_t *obj, uint32_t address)
4545
int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data, uint32_t size)
4646
{
4747
return FlashProgram((unsigned long *)data, (unsigned long)address,
48-
(unsigned long)size);
48+
(unsigned long)size);
4949
}
5050

5151
uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address)
5252
{
53-
if ((address >= CC3200_FLASH_START_ADDRESS) && address < (CC3200_FLASH_START_ADDRESS + CC3200_FLASH_SIZE))
54-
{
53+
if ((address >= CC3200_FLASH_START_ADDRESS) && address < (CC3200_FLASH_START_ADDRESS + CC3200_FLASH_SIZE)) {
5554
return CC3200_FLASH_SECTOR_SIZE;
56-
}
57-
else
58-
{
55+
} else {
5956
return MBED_FLASH_INVALID_SIZE;
6057
}
6158
}

‎targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/gpio_api.c

Lines changed: 13 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/* mbed Microcontroller Library
2-
* Copyright (c) 2006-2018 ARM Limited
2+
* Copyright (c) 2018-2019 ARM Limited
33
*
44
* Licensed under the Apache License, Version 2.0 (the "License");
55
* you may not use this file except in compliance with the License.
@@ -18,17 +18,17 @@
1818
#include "pinmap.h"
1919
#include "PeripheralPins.h"
2020

21-
#include <ti/devices/cc32xx/inc/hw_types.h>
22-
#include <ti/devices/cc32xx/driverlib/pin.h>
23-
#include <ti/devices/cc32xx/driverlib/gpio.h>
24-
#include <ti/devices/cc32xx/inc/hw_ints.h>
25-
#include <ti/devices/cc32xx/driverlib/prcm.h>
21+
#include "ti/devices/cc32xx/inc/hw_types.h"
22+
#include "ti/devices/cc32xx/driverlib/pin.h"
23+
#include "ti/devices/cc32xx/driverlib/gpio.h"
24+
#include "ti/devices/cc32xx/inc/hw_ints.h"
25+
#include "ti/devices/cc32xx/driverlib/prcm.h"
2626

2727

2828
uint32_t gpio_set(PinName pin)
2929
{
3030
pin_function(pin, 0);
31-
return (1);
31+
return (1);
3232
}
3333

3434
// function to initialise the gpio pin
@@ -37,17 +37,17 @@ uint32_t gpio_set(PinName pin)
3737
void gpio_init(gpio_t *obj, PinName pin)
3838
{
3939
obj->pin = pin;
40-
if (pin == (PinName)NC)
40+
if (pin == (PinName)NC) {
4141
return;
42+
}
4243

4344
unsigned long gpio_base = (unsigned long)pinmap_peripheral(pin, PinMap_GPIO);
4445
obj->baseAddr = gpio_base;
45-
obj->pin_mask = 1<<(pinmap_find_function(pin, PinMap_GPIO)%8);
46+
obj->pin_mask = 1 << (pinmap_find_function(pin, PinMap_GPIO) % 8);
4647

4748
// determine PRCM GPIO CLOCK index
4849
unsigned short prcm_peripheral = 0;
49-
switch (gpio_base)
50-
{
50+
switch (gpio_base) {
5151
case CC3220SF_GPIOA0_BASE:
5252
prcm_peripheral = PRCM_GPIOA0;
5353
break;
@@ -68,7 +68,7 @@ void gpio_init(gpio_t *obj, PinName pin)
6868
PRCMPeripheralClkEnable(prcm_peripheral, PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK);
6969

7070
// wait for GPIO clock to settle
71-
while(!PRCMPeripheralStatusGet(prcm_peripheral));
71+
while (!PRCMPeripheralStatusGet(prcm_peripheral));
7272
}
7373

7474
void gpio_mode(gpio_t *obj, PinMode mode)
@@ -77,7 +77,6 @@ void gpio_mode(gpio_t *obj, PinMode mode)
7777
//set the pin mux to be GPIO which is PIN MODE 0
7878
pin_mode(obj->pin, mode);
7979
PinModeSet(obj->pin, PIN_MODE_0);
80-
8180
}
8281

8382
void gpio_dir(gpio_t *obj, PinDirection direction)
@@ -93,7 +92,7 @@ int gpio_is_connected(const gpio_t *obj)
9392

9493
void gpio_write(gpio_t *obj, int value)
9594
{
96-
GPIOPinWrite(obj->baseAddr, obj->pin_mask, value*obj->pin_mask);
95+
GPIOPinWrite(obj->baseAddr, obj->pin_mask, value * obj->pin_mask);
9796
}
9897

9998
int gpio_read(gpio_t *obj)

‎targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/gpio_irq_api.c

Lines changed: 49 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/* mbed Microcontroller Library
2-
* Copyright (c) 2006-2013 ARM Limited
2+
* Copyright (c) 2018-2019 ARM Limited
33
*
44
* Licensed under the Apache License, Version 2.0 (the "License");
55
* you may not use this file except in compliance with the License.
@@ -20,23 +20,23 @@
2020
#include "cmsis.h"
2121
#include "PeripheralPins.h"
2222

23-
#include <ti/devices/cc32xx/inc/hw_types.h>
24-
#include <ti/devices/cc32xx/inc/hw_gpio.h>
25-
#include <ti/devices/cc32xx/driverlib/gpio.h>
26-
#include <ti/devices/cc32xx/inc/hw_ints.h>
27-
#include <ti/devices/cc32xx/inc/hw_memmap.h>
28-
#include <ti/devices/cc32xx/inc/hw_common_reg.h>
23+
#include "ti/devices/cc32xx/inc/hw_types.h"
24+
#include "ti/devices/cc32xx/inc/hw_gpio.h"
25+
#include "ti/devices/cc32xx/driverlib/gpio.h"
26+
#include "ti/devices/cc32xx/inc/hw_ints.h"
27+
#include "ti/devices/cc32xx/inc/hw_memmap.h"
28+
#include "ti/devices/cc32xx/inc/hw_common_reg.h"
2929

3030
#define CHANNEL_NUM 32
3131

3232
static uint32_t channel_ids[CHANNEL_NUM] = {0};
3333
static gpio_irq_handler irq_handler;
3434

35-
static void handle_interrupt_in(unsigned long gpio_port) {
35+
static void handle_interrupt_in(unsigned long gpio_port)
36+
{
3637

3738
uint32_t chan_base = 0;
38-
switch ((unsigned long) gpio_port)
39-
{
39+
switch ((unsigned long) gpio_port) {
4040
case CC3220SF_GPIOA0_BASE:
4141
chan_base = 0;
4242
break;
@@ -55,31 +55,32 @@ static void handle_interrupt_in(unsigned long gpio_port) {
5555
}
5656

5757
uint16_t pin_mask = 0x01;
58-
for(int i = 0; i < 8; i++){
58+
for (int i = 0; i < 8; i++) {
5959

6060
//checking for interrupt on each GPIO pin
61-
if((GPIOIntStatus((unsigned long)gpio_port, true) & pin_mask) > 0){
61+
if ((GPIOIntStatus((unsigned long)gpio_port, true) & pin_mask) > 0) {
6262
gpio_irq_event event = (gpio_irq_event)GPIOIntTypeGet((unsigned long)gpio_port, pin_mask);
63-
if(event == GPIO_RISING_EDGE){
63+
if (event == GPIO_RISING_EDGE) {
6464
event = IRQ_RISE;
65-
}
66-
else if(event == GPIO_FALLING_EDGE){
65+
} else if (event == GPIO_FALLING_EDGE) {
6766
event = IRQ_FALL;
6867
}
6968

70-
if(channel_ids[chan_base+i] == 0)
69+
if (channel_ids[chan_base + i] == 0) {
7170
continue;
71+
}
7272

73-
irq_handler(channel_ids[chan_base+i], (gpio_irq_event)event);
73+
irq_handler(channel_ids[chan_base + i], (gpio_irq_event)event);
7474

7575
}
7676
GPIOIntClear((unsigned long)gpio_port, pin_mask);
77-
pin_mask = pin_mask<<1;
78-
}
77+
pin_mask = pin_mask << 1;
78+
}
7979

8080
}
8181

82-
void gpio_irqA0(void) {
82+
void gpio_irqA0(void)
83+
{
8384
handle_interrupt_in(CC3220SF_GPIOA0_BASE);
8485
}
8586

@@ -98,21 +99,23 @@ void gpio_irqA3(void)
9899
handle_interrupt_in(CC3220SF_GPIOA3_BASE);
99100
}
100101

101-
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
102-
if (pin == NC) return -1;
102+
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
103+
{
104+
if (pin == NC) {
105+
return -1;
106+
}
107+
103108

104-
105109

106110
unsigned long gpio_base = (unsigned long)pinmap_peripheral(pin, PinMap_GPIO);
107111
unsigned long ch_num = pinmap_find_function(pin, PinMap_GPIO);
108112
obj->baseAddr = gpio_base;
109113
obj->pin = pin;
110114
obj->ch = ch_num;
111-
obj->pin_mask = 1<<(ch_num%8);
115+
obj->pin_mask = 1 << (ch_num % 8);
112116
irq_handler = handler;
113117
uint32_t vector = (uint32_t)gpio_irqA0;
114-
switch (gpio_base)
115-
{
118+
switch (gpio_base) {
116119
case CC3220SF_GPIOA0_BASE:
117120
vector = (uint32_t)gpio_irqA0;
118121
obj->irq_offset = INT_GPIOA0_IRQn;
@@ -137,37 +140,43 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
137140
NVIC_DisableIRQ((IRQn_Type)obj->irq_offset);
138141
NVIC_SetVector((IRQn_Type)obj->irq_offset, vector);
139142
NVIC_EnableIRQ((IRQn_Type)obj->irq_offset);
140-
143+
141144
return 0;
142145
}
143146

144-
void gpio_irq_free(gpio_irq_t *obj) {
147+
void gpio_irq_free(gpio_irq_t *obj)
148+
{
145149
channel_ids[obj->ch] = 0;
146150
GPIOIntDisable(obj->baseAddr, obj->pin_mask);
147151
}
148152

149-
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
153+
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
154+
{
150155

151-
if(enable){
156+
if (enable) {
152157
GPIOIntEnable(obj->baseAddr, obj->pin_mask);
153-
}
154-
else{
158+
} else {
155159
GPIOIntDisable(obj->baseAddr, obj->pin_mask);
156160
}
157161

158-
switch(event){
159-
case IRQ_RISE:GPIOIntTypeSet(obj->baseAddr,obj->pin_mask, GPIO_RISING_EDGE); break;
160-
case IRQ_FALL: GPIOIntTypeSet(obj->baseAddr,obj->pin_mask, GPIO_FALLING_EDGE); break;
161-
default: break;
162+
switch (event) {
163+
case IRQ_RISE:
164+
GPIOIntTypeSet(obj->baseAddr, obj->pin_mask, GPIO_RISING_EDGE);
165+
break;
166+
case IRQ_FALL:
167+
GPIOIntTypeSet(obj->baseAddr, obj->pin_mask, GPIO_FALLING_EDGE);
168+
break;
169+
default:
170+
break;
162171
}
163-
164-
165172
}
166173

167-
void gpio_irq_enable(gpio_irq_t *obj) {
174+
void gpio_irq_enable(gpio_irq_t *obj)
175+
{
168176
GPIOIntEnable(obj->baseAddr, obj->pin_mask);
169177
}
170178

171-
void gpio_irq_disable(gpio_irq_t *obj) {
179+
void gpio_irq_disable(gpio_irq_t *obj)
180+
{
172181
GPIOIntDisable(obj->baseAddr, obj->pin_mask);
173182
}

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