Skip to content

Commit cb95458

Browse files
committed
K64F: Update the DSPI SDK driver to support the new API to change DUMMY_DATA
Signed-off-by: Mahadevan Mahesh <[email protected]>
1 parent d5108e5 commit cb95458

File tree

4 files changed

+471
-212
lines changed

4 files changed

+471
-212
lines changed

targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_dspi.c

Lines changed: 69 additions & 59 deletions
Original file line numberDiff line numberDiff line change
@@ -1,32 +1,32 @@
11
/*
2-
* Copyright (c) 2015, Freescale Semiconductor, Inc.
3-
* All rights reserved.
4-
*
5-
* Redistribution and use in source and binary forms, with or without modification,
6-
* are permitted provided that the following conditions are met:
7-
*
8-
* o Redistributions of source code must retain the above copyright notice, this list
9-
* of conditions and the following disclaimer.
10-
*
11-
* o Redistributions in binary form must reproduce the above copyright notice, this
12-
* list of conditions and the following disclaimer in the documentation and/or
13-
* other materials provided with the distribution.
14-
*
15-
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
16-
* contributors may be used to endorse or promote products derived from this
17-
* software without specific prior written permission.
18-
*
19-
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
20-
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21-
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22-
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
23-
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24-
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25-
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26-
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27-
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28-
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29-
*/
2+
* Copyright (c) 2015, Freescale Semiconductor, Inc.
3+
* Copyright 2016-2017 NXP
4+
*
5+
* Redistribution and use in source and binary forms, with or without modification,
6+
* are permitted provided that the following conditions are met:
7+
*
8+
* o Redistributions of source code must retain the above copyright notice, this list
9+
* of conditions and the following disclaimer.
10+
*
11+
* o Redistributions in binary form must reproduce the above copyright notice, this
12+
* list of conditions and the following disclaimer in the documentation and/or
13+
* other materials provided with the distribution.
14+
*
15+
* o Neither the name of the copyright holder nor the names of its
16+
* contributors may be used to endorse or promote products derived from this
17+
* software without specific prior written permission.
18+
*
19+
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
20+
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
21+
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22+
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
23+
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24+
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25+
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
26+
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27+
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28+
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29+
*/
3030

3131
#include "fsl_dspi.h"
3232

@@ -65,27 +65,27 @@ static void DSPI_SetOnePcsPolarity(SPI_Type *base, dspi_which_pcs_t pcs, dspi_pc
6565

6666
/*!
6767
* @brief Master fill up the TX FIFO with data.
68-
* This is not a public API as it is called from other driver functions.
68+
* This is not a public API.
6969
*/
7070
static void DSPI_MasterTransferFillUpTxFifo(SPI_Type *base, dspi_master_handle_t *handle);
7171

7272
/*!
7373
* @brief Master finish up a transfer.
7474
* It would call back if there is callback function and set the state to idle.
75-
* This is not a public API as it is called from other driver functions.
75+
* This is not a public API.
7676
*/
7777
static void DSPI_MasterTransferComplete(SPI_Type *base, dspi_master_handle_t *handle);
7878

7979
/*!
8080
* @brief Slave fill up the TX FIFO with data.
81-
* This is not a public API as it is called from other driver functions.
81+
* This is not a public API.
8282
*/
8383
static void DSPI_SlaveTransferFillUpTxFifo(SPI_Type *base, dspi_slave_handle_t *handle);
8484

8585
/*!
8686
* @brief Slave finish up a transfer.
8787
* It would call back if there is callback function and set the state to idle.
88-
* This is not a public API as it is called from other driver functions.
88+
* This is not a public API.
8989
*/
9090
static void DSPI_SlaveTransferComplete(SPI_Type *base, dspi_slave_handle_t *handle);
9191

@@ -100,7 +100,7 @@ static void DSPI_CommonIRQHandler(SPI_Type *base, void *param);
100100
/*!
101101
* @brief Master prepare the transfer.
102102
* Basically it set up dspi_master_handle .
103-
* This is not a public API as it is called from other driver functions. fsl_dspi_edma.c also call this function.
103+
* This is not a public API.
104104
*/
105105
static void DSPI_MasterTransferPrepare(SPI_Type *base, dspi_master_handle_t *handle, dspi_transfer_t *transfer);
106106

@@ -129,14 +129,16 @@ static clock_ip_name_t const s_dspiClock[] = DSPI_CLOCKS;
129129
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
130130

131131
/*! @brief Pointers to dspi handles for each instance. */
132-
static void *g_dspiHandle[FSL_FEATURE_SOC_DSPI_COUNT];
132+
static void *g_dspiHandle[ARRAY_SIZE(s_dspiBases)];
133133

134134
/*! @brief Pointer to master IRQ handler for each instance. */
135135
static dspi_master_isr_t s_dspiMasterIsr;
136136

137137
/*! @brief Pointer to slave IRQ handler for each instance. */
138138
static dspi_slave_isr_t s_dspiSlaveIsr;
139139

140+
/* @brief Dummy data for each instance. This data is used when user's tx buffer is NULL*/
141+
volatile uint8_t s_dummyData[ARRAY_SIZE(s_dspiBases)] = {0};
140142
/**********************************************************************************************************************
141143
* Code
142144
*********************************************************************************************************************/
@@ -145,19 +147,25 @@ uint32_t DSPI_GetInstance(SPI_Type *base)
145147
uint32_t instance;
146148

147149
/* Find the instance index from base address mappings. */
148-
for (instance = 0; instance < FSL_FEATURE_SOC_DSPI_COUNT; instance++)
150+
for (instance = 0; instance < ARRAY_SIZE(s_dspiBases); instance++)
149151
{
150152
if (s_dspiBases[instance] == base)
151153
{
152154
break;
153155
}
154156
}
155157

156-
assert(instance < FSL_FEATURE_SOC_DSPI_COUNT);
158+
assert(instance < ARRAY_SIZE(s_dspiBases));
157159

158160
return instance;
159161
}
160162

163+
void DSPI_SetDummyData(SPI_Type *base, uint8_t dummyData)
164+
{
165+
uint32_t instance = DSPI_GetInstance(base);
166+
s_dummyData[instance] = dummyData;
167+
}
168+
161169
void DSPI_MasterInit(SPI_Type *base, const dspi_master_config_t *masterConfig, uint32_t srcClock_Hz)
162170
{
163171
assert(masterConfig);
@@ -202,6 +210,7 @@ void DSPI_MasterInit(SPI_Type *base, const dspi_master_config_t *masterConfig, u
202210
DSPI_MasterSetDelayTimes(base, masterConfig->whichCtar, kDSPI_BetweenTransfer, srcClock_Hz,
203211
masterConfig->ctarConfig.betweenTransferDelayInNanoSec);
204212

213+
DSPI_SetDummyData(base, DSPI_DUMMY_DATA);
205214
DSPI_StartTransfer(base);
206215
}
207216

@@ -262,6 +271,8 @@ void DSPI_SlaveInit(SPI_Type *base, const dspi_slave_config_t *slaveConfig)
262271
SPI_CTAR_SLAVE_CPOL(slaveConfig->ctarConfig.cpol) |
263272
SPI_CTAR_SLAVE_CPHA(slaveConfig->ctarConfig.cpha);
264273

274+
DSPI_SetDummyData(base, DSPI_DUMMY_DATA);
275+
265276
DSPI_StartTransfer(base);
266277
}
267278

@@ -582,7 +593,7 @@ status_t DSPI_MasterTransferBlocking(SPI_Type *base, dspi_transfer_t *transfer)
582593

583594
uint16_t wordToSend = 0;
584595
uint16_t wordReceived = 0;
585-
uint8_t dummyData = DSPI_DUMMY_DATA;
596+
uint8_t dummyData = s_dummyData[DSPI_GetInstance(base)];
586597
uint8_t bitsPerFrame;
587598

588599
uint32_t command;
@@ -897,21 +908,21 @@ status_t DSPI_MasterTransferNonBlocking(SPI_Type *base, dspi_master_handle_t *ha
897908
handle->state = kDSPI_Busy;
898909

899910
DSPI_MasterTransferPrepare(base, handle, transfer);
900-
DSPI_StartTransfer(base);
901911

902912
/* Enable the NVIC for DSPI peripheral. */
903913
EnableIRQ(s_dspiIRQ[DSPI_GetInstance(base)]);
904914

905-
DSPI_MasterTransferFillUpTxFifo(base, handle);
906-
907915
/* RX FIFO Drain request: RFDF_RE to enable RFDF interrupt
908916
* Since SPI is a synchronous interface, we only need to enable the RX interrupt.
909917
* The IRQ handler will get the status of RX and TX interrupt flags.
910918
*/
911919
s_dspiMasterIsr = DSPI_MasterTransferHandleIRQ;
912920

913921
DSPI_EnableInterrupts(base, kDSPI_RxFifoDrainRequestInterruptEnable);
922+
DSPI_StartTransfer(base);
914923

924+
/* Fill up the Tx FIFO to trigger the transfer. */
925+
DSPI_MasterTransferFillUpTxFifo(base, handle);
915926
return kStatus_Success;
916927
}
917928

@@ -952,21 +963,20 @@ static void DSPI_MasterTransferComplete(SPI_Type *base, dspi_master_handle_t *ha
952963
status = kStatus_Success;
953964
}
954965

966+
handle->state = kDSPI_Idle;
967+
955968
if (handle->callback)
956969
{
957970
handle->callback(base, handle, status, handle->userData);
958971
}
959-
960-
/* The transfer is complete.*/
961-
handle->state = kDSPI_Idle;
962972
}
963973

964974
static void DSPI_MasterTransferFillUpTxFifo(SPI_Type *base, dspi_master_handle_t *handle)
965975
{
966976
assert(handle);
967977

968978
uint16_t wordToSend = 0;
969-
uint8_t dummyData = DSPI_DUMMY_DATA;
979+
uint8_t dummyData = s_dummyData[DSPI_GetInstance(base)];
970980

971981
/* If bits/frame is greater than one byte */
972982
if (handle->bitsPerFrame > 8)
@@ -1257,11 +1267,6 @@ status_t DSPI_SlaveTransferNonBlocking(SPI_Type *base, dspi_slave_handle_t *hand
12571267
DSPI_FlushFifo(base, true, true);
12581268
DSPI_ClearStatusFlags(base, kDSPI_AllStatusFlag);
12591269

1260-
DSPI_StartTransfer(base);
1261-
1262-
/* Prepare data to transmit */
1263-
DSPI_SlaveTransferFillUpTxFifo(base, handle);
1264-
12651270
s_dspiSlaveIsr = DSPI_SlaveTransferHandleIRQ;
12661271

12671272
/* Enable RX FIFO drain request, the slave only use this interrupt */
@@ -1278,6 +1283,11 @@ status_t DSPI_SlaveTransferNonBlocking(SPI_Type *base, dspi_slave_handle_t *hand
12781283
DSPI_EnableInterrupts(base, kDSPI_TxFifoUnderflowInterruptEnable);
12791284
}
12801285

1286+
DSPI_StartTransfer(base);
1287+
1288+
/* Prepare data to transmit */
1289+
DSPI_SlaveTransferFillUpTxFifo(base, handle);
1290+
12811291
return kStatus_Success;
12821292
}
12831293

@@ -1306,7 +1316,7 @@ static void DSPI_SlaveTransferFillUpTxFifo(SPI_Type *base, dspi_slave_handle_t *
13061316
assert(handle);
13071317

13081318
uint16_t transmitData = 0;
1309-
uint8_t dummyPattern = DSPI_DUMMY_DATA;
1319+
uint8_t dummyPattern = s_dummyData[DSPI_GetInstance(base)];
13101320

13111321
/* Service the transmitter, if transmit buffer provided, transmit the data,
13121322
* else transmit dummy pattern
@@ -1413,12 +1423,12 @@ static void DSPI_SlaveTransferComplete(SPI_Type *base, dspi_slave_handle_t *hand
14131423
status = kStatus_Success;
14141424
}
14151425

1426+
handle->state = kDSPI_Idle;
1427+
14161428
if (handle->callback)
14171429
{
14181430
handle->callback(base, handle, status, handle->userData);
14191431
}
1420-
1421-
handle->state = kDSPI_Idle;
14221432
}
14231433

14241434
void DSPI_SlaveTransferAbort(SPI_Type *base, dspi_slave_handle_t *handle)
@@ -1440,7 +1450,7 @@ void DSPI_SlaveTransferHandleIRQ(SPI_Type *base, dspi_slave_handle_t *handle)
14401450
{
14411451
assert(handle);
14421452

1443-
uint8_t dummyPattern = DSPI_DUMMY_DATA;
1453+
uint8_t dummyPattern = s_dummyData[DSPI_GetInstance(base)];
14441454
uint32_t dataReceived;
14451455
uint32_t dataSend = 0;
14461456

@@ -1617,47 +1627,47 @@ static void DSPI_CommonIRQHandler(SPI_Type *base, void *param)
16171627
}
16181628
}
16191629

1620-
#if (FSL_FEATURE_SOC_DSPI_COUNT > 0)
1630+
#if defined(SPI0)
16211631
void SPI0_DriverIRQHandler(void)
16221632
{
16231633
assert(g_dspiHandle[0]);
16241634
DSPI_CommonIRQHandler(SPI0, g_dspiHandle[0]);
16251635
}
16261636
#endif
16271637

1628-
#if (FSL_FEATURE_SOC_DSPI_COUNT > 1)
1638+
#if defined(SPI1)
16291639
void SPI1_DriverIRQHandler(void)
16301640
{
16311641
assert(g_dspiHandle[1]);
16321642
DSPI_CommonIRQHandler(SPI1, g_dspiHandle[1]);
16331643
}
16341644
#endif
16351645

1636-
#if (FSL_FEATURE_SOC_DSPI_COUNT > 2)
1646+
#if defined(SPI2)
16371647
void SPI2_DriverIRQHandler(void)
16381648
{
16391649
assert(g_dspiHandle[2]);
16401650
DSPI_CommonIRQHandler(SPI2, g_dspiHandle[2]);
16411651
}
16421652
#endif
16431653

1644-
#if (FSL_FEATURE_SOC_DSPI_COUNT > 3)
1654+
#if defined(SPI3)
16451655
void SPI3_DriverIRQHandler(void)
16461656
{
16471657
assert(g_dspiHandle[3]);
16481658
DSPI_CommonIRQHandler(SPI3, g_dspiHandle[3]);
16491659
}
16501660
#endif
16511661

1652-
#if (FSL_FEATURE_SOC_DSPI_COUNT > 4)
1662+
#if defined(SPI4)
16531663
void SPI4_DriverIRQHandler(void)
16541664
{
16551665
assert(g_dspiHandle[4]);
16561666
DSPI_CommonIRQHandler(SPI4, g_dspiHandle[4]);
16571667
}
16581668
#endif
16591669

1660-
#if (FSL_FEATURE_SOC_DSPI_COUNT > 5)
1670+
#if defined(SPI5)
16611671
void SPI5_DriverIRQHandler(void)
16621672
{
16631673
assert(g_dspiHandle[5]);

0 commit comments

Comments
 (0)