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Tharazi97Tharazi97
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fix TT_M3HQ build problem with i2c
1 parent aa56f86 commit ce58505

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+64
-45
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1 file changed

+64
-45
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‎targets/TARGET_TT/TARGET_TT_M3HQ/i2c_api.c

Lines changed: 64 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,12 @@
2121
#include "pinmap.h"
2222
#include "gpio_include.h"
2323

24+
#if DEVICE_I2C_ASYNCH
25+
#define I2C_S(obj) (struct i2c_s *) (&((obj)->i2c))
26+
#else
27+
#define I2C_S(obj) (struct i2c_s *) (obj)
28+
#endif
29+
2430
static const PinMap PinMap_I2C_SDA[] = {
2531
{PC1, I2C_0, PIN_DATA(1, 2)},
2632
{PA5, I2C_1, PIN_DATA(1, 2)},
@@ -56,7 +62,9 @@ static void i2c_start_bit(i2c_t *obj);
5662
// Initialize the I2C peripheral. It sets the default parameters for I2C
5763
void i2c_init(i2c_t *obj, PinName sda, PinName scl)
5864
{
59-
MBED_ASSERT(obj != NULL);
65+
struct i2c_s *obj_s = I2C_S(obj);
66+
MBED_ASSERT(obj_s != NULL);
67+
6068
I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
6169
I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
6270
I2CName i2c_name = (I2CName)pinmap_merge(i2c_sda, i2c_scl);
@@ -66,21 +74,21 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl)
6674
case I2C_0:
6775
TSB_CG_FSYSENB_IPENB11 = ENABLE;
6876
TSB_CG_FSYSENA_IPENA02 = ENABLE;
69-
obj->i2c = TSB_I2C0;
77+
obj_s->i2c = TSB_I2C0;
7078
break;
7179
case I2C_1:
7280
TSB_CG_FSYSENB_IPENB12 = ENABLE;
7381
TSB_CG_FSYSENA_IPENA00 = ENABLE;
74-
obj->i2c = TSB_I2C1;
82+
obj_s->i2c = TSB_I2C1;
7583
break;
7684
case I2C_2:
7785
TSB_CG_FSYSENB_IPENB13 = ENABLE;
7886
TSB_CG_FSYSENA_IPENA10 = ENABLE;
79-
obj->i2c = TSB_I2C2;
87+
obj_s->i2c = TSB_I2C2;
8088
case I2C_3:
8189
TSB_CG_FSYSENB_IPENB14 = ENABLE;
8290
TSB_CG_FSYSENA_IPENA15 = ENABLE;
83-
obj->i2c = TSB_I2C3;
91+
obj_s->i2c = TSB_I2C3;
8492
break;
8593
default:
8694
error("I2C is not available");
@@ -97,15 +105,16 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl)
97105

98106
i2c_reset(obj);
99107
i2c_frequency(obj, 100000);
100-
obj->i2c->CR2 = (I2CxCR2_I2CM_ENABLE | I2CxCR2_TRX | I2CxCR2_PIN_CLEAR |
108+
obj_s->i2c->CR2 = (I2CxCR2_I2CM_ENABLE | I2CxCR2_TRX | I2CxCR2_PIN_CLEAR |
101109
I2CxCR2_INIT);
102-
obj->i2c->OP = I2CxOP_INIT;
103-
obj->i2c->IE = I2CxIE_CLEAR;
110+
obj_s->i2c->OP = I2CxOP_INIT;
111+
obj_s->i2c->IE = I2CxIE_CLEAR;
104112
}
105113

106114
// Configure the I2C frequency
107115
void i2c_frequency(i2c_t *obj, int hz)
108116
{
117+
struct i2c_s *obj_s = I2C_S(obj);
109118
uint64_t sck, tmp_sck;
110119
uint64_t prsck, tmp_prsck;
111120
uint64_t fscl, tmp_fscl;
@@ -134,8 +143,8 @@ void i2c_frequency(i2c_t *obj, int hz)
134143
clk.prsck = (tmp_prsck < 32) ? (uint32_t)(tmp_prsck - 1) : 0;
135144
}
136145

137-
obj->i2c->CR1 = (I2CxCR1_ACK | clk.sck);
138-
obj->i2c->PRS = (I2CxPRS_PRCK & clk.prsck);
146+
obj_s->i2c->CR1 = (I2CxCR1_ACK | clk.sck);
147+
obj_s->i2c->PRS = (I2CxPRS_PRCK & clk.prsck);
139148
}
140149

141150
int i2c_start(i2c_t *obj)
@@ -146,10 +155,11 @@ int i2c_start(i2c_t *obj)
146155

147156
int i2c_stop(i2c_t *obj)
148157
{
158+
struct i2c_s *obj_s = I2C_S(obj);
149159
uint32_t timeout = I2C_TIMEOUT;
150160

151-
obj->i2c->CR2 = I2CxCR2_STOP_CONDITION;
152-
while ((obj->i2c->SR & I2CxSR_BB) == I2CxSR_BB) {
161+
obj_s->i2c->CR2 = I2CxCR2_STOP_CONDITION;
162+
while ((obj_s->i2c->SR & I2CxSR_BB) == I2CxSR_BB) {
153163
if (timeout == 0)
154164
break;
155165
timeout--;
@@ -159,8 +169,9 @@ int i2c_stop(i2c_t *obj)
159169

160170
void i2c_reset(i2c_t *obj)
161171
{
162-
obj->i2c->CR2 = I2CxCR2_SWRES_10;
163-
obj->i2c->CR2 = I2CxCR2_SWRES_01;
172+
struct i2c_s *obj_s = I2C_S(obj);
173+
obj_s->i2c->CR2 = I2CxCR2_SWRES_10;
174+
obj_s->i2c->CR2 = I2CxCR2_SWRES_01;
164175
}
165176

166177
int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
@@ -218,41 +229,43 @@ int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
218229

219230
int i2c_byte_read(i2c_t *obj, int last)
220231
{
232+
struct i2c_s *obj_s = I2C_S(obj);
221233
int32_t result;
222234

223-
obj->i2c->ST = I2CxST_CLEAR;
235+
obj_s->i2c->ST = I2CxST_CLEAR;
224236
if (last) {
225-
obj->i2c->OP |= I2CxOP_MFACK;
237+
obj_s->i2c->OP |= I2CxOP_MFACK;
226238
} else {
227-
obj->i2c->OP &= ~I2CxOP_MFACK;
239+
obj_s->i2c->OP &= ~I2CxOP_MFACK;
228240
}
229-
obj->i2c->DBR = (0 & I2CxDBR_DB_MASK);
241+
obj_s->i2c->DBR = (0 & I2CxDBR_DB_MASK);
230242
if (wait_status(obj) < 0) {
231243
result = -1;
232244
} else {
233-
result = (int32_t)(obj->i2c->DBR & I2CxDBR_DB_MASK);
245+
result = (int32_t)(obj_s->i2c->DBR & I2CxDBR_DB_MASK);
234246
}
235247
return (result);
236248
}
237249

238250
int i2c_byte_write(i2c_t *obj, int data)
239251
{
252+
struct i2c_s *obj_s = I2C_S(obj);
240253
int32_t result;
241254

242-
obj->i2c->ST = I2CxST_CLEAR;
255+
obj_s->i2c->ST = I2CxST_CLEAR;
243256
if (start_flag == 1) {
244-
obj->i2c->DBR = (data & I2CxDBR_DB_MASK);
257+
obj_s->i2c->DBR = (data & I2CxDBR_DB_MASK);
245258
i2c_start_bit(obj);
246259
start_flag = 0;
247260
} else {
248-
obj->i2c->DBR = (data & I2CxDBR_DB_MASK);
261+
obj_s->i2c->DBR = (data & I2CxDBR_DB_MASK);
249262
}
250263

251264
if (wait_status(obj) < 0) {
252265
return (-1);
253266
}
254267

255-
if (!((obj->i2c->SR & I2CxSR_LRB) == I2CxSR_LRB)) {
268+
if (!((obj_s->i2c->SR & I2CxSR_LRB) == I2CxSR_LRB)) {
256269
result = 1;
257270
} else {
258271
result = 0;
@@ -262,21 +275,23 @@ int i2c_byte_write(i2c_t *obj, int data)
262275

263276
static void i2c_start_bit(i2c_t *obj) // Send START command
264277
{
278+
struct i2c_s *obj_s = I2C_S(obj);
265279
uint32_t opreg;
266-
opreg = obj->i2c->OP;
280+
opreg = obj_s->i2c->OP;
267281
opreg &= ~(I2CxOP_RSTA | I2CxOP_SREN);
268-
if ((obj->i2c->SR & I2CxSR_BB)) {
282+
if ((obj_s->i2c->SR & I2CxSR_BB)) {
269283
opreg |= I2CxOP_SREN;
270284
}
271-
obj->i2c->OP = opreg;
272-
obj->i2c->CR2 |= I2CxCR2_START_CONDITION;
285+
obj_s->i2c->OP = opreg;
286+
obj_s->i2c->CR2 |= I2CxCR2_START_CONDITION;
273287
}
274288

275289
static int32_t wait_status(i2c_t *p_obj)
276290
{
291+
struct i2c_s *p_obj_s = I2C_S(p_obj);
277292
volatile int32_t timeout;
278293
timeout = I2C_TIMEOUT;
279-
while (!((p_obj->i2c->ST & I2CxST_I2C) == I2CxST_I2C)) {
294+
while (!((p_obj_s->i2c->ST & I2CxST_I2C) == I2CxST_I2C)) {
280295
if ((timeout--) == 0) {
281296
return (-1);
282297
}
@@ -286,32 +301,34 @@ static int32_t wait_status(i2c_t *p_obj)
286301

287302
void i2c_slave_mode(i2c_t *obj, int enable_slave)
288303
{
304+
struct i2c_s *obj_s = I2C_S(obj);
289305
if (enable_slave) {
290-
obj->i2c->OP = I2CxOP_SLAVE_INIT;
291-
obj->i2c->CR1 = (I2CxCR1_ACK | clk.sck);
292-
obj->i2c->CR2 = (I2CxCR2_INIT | I2CxCR2_PIN_CLEAR);
293-
obj->i2c->PRS = (I2CxPRS_PRCK & clk.prsck);
294-
obj->i2c->AR = (obj->address & I2CAR_SA_MASK);
295-
obj->i2c->IE = I2CxIE_INTI2C;
306+
obj_s->i2c->OP = I2CxOP_SLAVE_INIT;
307+
obj_s->i2c->CR1 = (I2CxCR1_ACK | clk.sck);
308+
obj_s->i2c->CR2 = (I2CxCR2_INIT | I2CxCR2_PIN_CLEAR);
309+
obj_s->i2c->PRS = (I2CxPRS_PRCK & clk.prsck);
310+
obj_s->i2c->AR = (obj_s->address & I2CAR_SA_MASK);
311+
obj_s->i2c->IE = I2CxIE_INTI2C;
296312
} else {
297313
i2c_reset(obj);
298-
obj->i2c->CR2 = (I2CxCR2_I2CM_ENABLE | I2CxCR2_TRX | I2CxCR2_PIN_CLEAR |
314+
obj_s->i2c->CR2 = (I2CxCR2_I2CM_ENABLE | I2CxCR2_TRX | I2CxCR2_PIN_CLEAR |
299315
I2CxCR2_INIT);
300-
obj->i2c->OP = I2CxOP_INIT;
301-
obj->i2c->CR1 = (I2CxCR1_ACK | clk.sck);
302-
obj->i2c->PRS = (I2CxPRS_PRCK & clk.prsck);
303-
NVIC_DisableIRQ(obj->IRQn);
304-
NVIC_ClearPendingIRQ(obj->IRQn);
305-
obj->i2c->ST = I2CxST_CLEAR;
316+
obj_s->i2c->OP = I2CxOP_INIT;
317+
obj_s->i2c->CR1 = (I2CxCR1_ACK | clk.sck);
318+
obj_s->i2c->PRS = (I2CxPRS_PRCK & clk.prsck);
319+
NVIC_DisableIRQ(obj_s->IRQn);
320+
NVIC_ClearPendingIRQ(obj_s->IRQn);
321+
obj_s->i2c->ST = I2CxST_CLEAR;
306322
}
307323
}
308324

309325
int i2c_slave_receive(i2c_t *obj)
310326
{
327+
struct i2c_s *obj_s = I2C_S(obj);
311328
int32_t result = I2C_NO_DATA;
312329

313-
if ((obj->i2c->ST & I2CxST_I2C) && (obj->i2c->OP & I2CxOP_SAST)) {
314-
if ((obj->i2c->SR & I2CxSR_TRX) == I2CxSR_TRX) {
330+
if ((obj_s->i2c->ST & I2CxST_I2C) && (obj_s->i2c->OP & I2CxOP_SAST)) {
331+
if ((obj_s->i2c->SR & I2CxSR_TRX) == I2CxSR_TRX) {
315332
result = I2C_READ_ADDRESSED;
316333
} else {
317334
result = I2C_WRITE_ADDRESSED;
@@ -322,11 +339,12 @@ int i2c_slave_receive(i2c_t *obj)
322339

323340
int i2c_slave_read(i2c_t *obj, char *data, int length)
324341
{
342+
struct i2c_s *obj_s = I2C_S(obj);
325343
int32_t count = 0;
326344

327345
while (count < length) {
328346
int32_t pdata = i2c_byte_read(obj, ((count < (length - 1)) ? 0 : 1));
329-
if ((obj->i2c->SR & I2CxSR_TRX)) {
347+
if ((obj_s->i2c->SR & I2CxSR_TRX)) {
330348
return (count);
331349
} else {
332350
if (pdata < 0) {
@@ -354,7 +372,8 @@ int i2c_slave_write(i2c_t *obj, const char *data, int length)
354372

355373
void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask)
356374
{
357-
obj->address = address & I2CAR_SA_MASK;
375+
struct i2c_s *obj_s = I2C_S(obj);
376+
obj_s->address = address & I2CAR_SA_MASK;
358377
i2c_slave_mode(obj,1);
359378
}
360379

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