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Merge pull request #1001 from mfiore02/3_25_15_dragonfly_mdot_pullrequest
Updated hal & cmsis support for MTS Dragonfly and MTS mDot
2 parents d836f53 + 54f4391 commit cfb9dd1

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20 files changed

+198
-73
lines changed

20 files changed

+198
-73
lines changed

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_ARM_MICRO/stm32f411re.sct

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,9 +28,11 @@
2828
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2929

3030
; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
31-
LR_IROM1 0x08000000 0x80000 { ; load region size_region
31+
; FIRST 64 KB FLASH FOR BOOTLOADER
32+
; REST 448 KB FLASH FOR APPLICATION
33+
LR_IROM1 0x08010000 0x70000 { ; load region size_region
3234

33-
ER_IROM1 0x08000000 0x80000 { ; load address = execution address
35+
ER_IROM1 0x08010000 0x70000 { ; load address = execution address
3436
*.o (RESET, +First)
3537
*(InRoot$$Sections)
3638
.ANY (+RO)

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_ARM_STD/stm32f411re.sct

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,9 +28,11 @@
2828
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2929

3030
; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
31-
LR_IROM1 0x08000000 0x80000 { ; load region size_region
31+
; FIRST 64 KB FLASH FOR BOOTLOADER
32+
; REST 448 KB FLASH FOR APPLICATION
33+
LR_IROM1 0x08010000 0x70000 { ; load region size_region
3234

33-
ER_IROM1 0x08000000 0x80000 { ; load address = execution address
35+
ER_IROM1 0x08010000 0x70000 { ; load address = execution address
3436
*.o (RESET, +First)
3537
*(InRoot$$Sections)
3638
.ANY (+RO)

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_GCC_ARM/NUCLEO_F411RE.ld

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,9 @@
33
/* Linker script to configure memory regions. */
44
MEMORY
55
{
6-
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
6+
/* First 64kB of flash reserved for bootloader */
7+
/* Other 448kB for application */
8+
FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 448K
79
/* CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K */
810
RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 128k - 0x198
911
}

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* [ROM = 512kb = 0x80000] */
2-
define symbol __intvec_start__ = 0x08000000;
3-
define symbol __region_ROM_start__ = 0x08000000;
2+
define symbol __intvec_start__ = 0x08010000;
3+
define symbol __region_ROM_start__ = 0x08010000;
44
define symbol __region_ROM_end__ = 0x0807FFFF;
55

66
/* [RAM = 128kb = 0x20000] Vector table dynamic copy: 102 vectors = 408 bytes (0x198) to be reserved in RAM */
@@ -15,9 +15,10 @@ define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]
1515
define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__];
1616

1717
/* Stack and Heap */
18-
/*Heap 1/4 of ram and stack 1/8*/
19-
define symbol __size_cstack__ = 0x4000;
20-
define symbol __size_heap__ = 0x8000;
18+
/* Stack: 4kB - 408B for vector table */
19+
/* Heap: 96kB */
20+
define symbol __size_cstack__ = 0xe68;
21+
define symbol __size_heap__ = 0x18000;
2122
define block CSTACK with alignment = 8, size = __size_cstack__ { };
2223
define block HEAP with alignment = 8, size = __size_heap__ { };
2324
define block STACKHEAP with fixed order { block HEAP, block CSTACK };

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/cmsis_nvic.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@
3131
#include "cmsis_nvic.h"
3232

3333
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
34-
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
34+
#define NVIC_FLASH_VECTOR_ADDRESS (FLASH_BASE | VECT_TAB_OFFSET) // Initial vector position in flash
3535

3636
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
3737
uint32_t *vectors = (uint32_t *)SCB->VTOR;

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/system_stm32f4xx.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -124,8 +124,10 @@
124124
/*!< Uncomment the following line if you need to relocate your vector Table in
125125
Internal SRAM. */
126126
/* #define VECT_TAB_SRAM */
127+
#ifndef VECT_TAB_OFFSET
127128
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
128129
This value must be a multiple of 0x200. */
130+
#endif
129131
/******************************************************************************/
130132

131133
/**

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_ARM_MICRO/stm32f411re.sct

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,9 +28,11 @@
2828
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2929

3030
; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
31-
LR_IROM1 0x08000000 0x80000 { ; load region size_region
31+
; FIRST 64 KB FLASH FOR BOOTLOADER
32+
; REST 448 KB FLASH FOR APPLICATION
33+
LR_IROM1 0x08010000 0x70000 { ; load region size_region
3234

33-
ER_IROM1 0x08000000 0x80000 { ; load address = execution address
35+
ER_IROM1 0x08010000 0x70000 { ; load address = execution address
3436
*.o (RESET, +First)
3537
*(InRoot$$Sections)
3638
.ANY (+RO)

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_ARM_STD/stm32f411re.sct

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,9 +28,11 @@
2828
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2929

3030
; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
31-
LR_IROM1 0x08000000 0x80000 { ; load region size_region
31+
; FIRST 64 KB FLASH FOR BOOTLOADER
32+
; REST 448 KB FLASH FOR APPLICATION
33+
LR_IROM1 0x08010000 0x70000 { ; load region size_region
3234

33-
ER_IROM1 0x08000000 0x80000 { ; load address = execution address
35+
ER_IROM1 0x08010000 0x70000 { ; load address = execution address
3436
*.o (RESET, +First)
3537
*(InRoot$$Sections)
3638
.ANY (+RO)

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_GCC_ARM/STM32F411XE.ld

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,10 @@
11
/* Linker script to configure memory regions. */
22
MEMORY
33
{
4-
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
5-
RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 128k - 0x198
4+
/* First 64kB of flash reserved for bootloader */
5+
/* Other 448kB for application */
6+
FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 448K
7+
RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 128k - 0x198
68
}
79

810
/* Linker script to place sections and symbol values. Should be used together

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/TOOLCHAIN_IAR/stm32f411xe.icf

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/* [ROM = 512kb = 0x80000] */
22
define symbol __intvec_start__ = 0x08000000;
3-
define symbol __region_ROM_start__ = 0x08000000;
3+
define symbol __region_ROM_start__ = 0x08010000;
44
define symbol __region_ROM_end__ = 0x0807FFFF;
55

66
/* [RAM = 128kb = 0x20000] Vector table dynamic copy: 102 vectors = 408 bytes (0x198) to be reserved in RAM */

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/cmsis_nvic.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@
3131
#include "cmsis_nvic.h"
3232

3333
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) // Vectors positioned at start of RAM
34-
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
34+
#define NVIC_FLASH_VECTOR_ADDRESS (FLASH_BASE | VECT_TAB_OFFSET) // Initial vector position in flash
3535

3636
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
3737
uint32_t *vectors = (uint32_t *)SCB->VTOR;

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/system_stm32f4xx.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -125,8 +125,10 @@
125125
/*!< Uncomment the following line if you need to relocate your vector Table in
126126
Internal SRAM. */
127127
/* #define VECT_TAB_SRAM */
128+
#ifndef VECT_TAB_OFFSET
128129
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
129130
This value must be a multiple of 0x200. */
131+
#endif
130132
/******************************************************************************/
131133

132134
/**

‎libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/PinNames.h

Lines changed: 16 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -150,13 +150,24 @@ typedef enum {
150150
LED2 = D3,
151151
LED3 = D3,
152152
LED4 = D3,
153-
USER_BUTTON = PC_13,
154-
SERIAL_TX = PB_6,
155-
SERIAL_RX = PB_7,
156-
USBTX = SERIAL_TX,
157-
USBRX = SERIAL_RX,
153+
SERIAL_TX = D1,
154+
SERIAL_RX = D0,
155+
SERIAL_RTS = A1,
156+
SERIAL_CTS = A0,
157+
SERIAL_DCD = D5,
158+
SERIAL_DSR = D8,
159+
SERIAL_DTR = D4,
160+
SERIAL_RI = D9,
161+
USBTX = PB_6,
162+
USBRX = PB_7,
158163
RADIO_TX = PC_7,
159164
RADIO_RX = PC_6,
165+
RADIO_RTS = PB_10,
166+
RADIO_CTS = PB_12,
167+
RADIO_DCD = D5,
168+
RADIO_DSR = D8,
169+
RADIO_DTR = D4,
170+
RADIO_RI = D9,
160171
I2C_SCL = D15,
161172
I2C_SDA = D14,
162173
SPI_MOSI = PC_12,

‎libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/PeripheralNames.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -46,9 +46,9 @@ typedef enum {
4646
UART_6 = (int)USART6_BASE
4747
} UARTName;
4848

49-
#define STDIO_UART_TX PA_2
50-
#define STDIO_UART_RX PA_3
51-
#define STDIO_UART UART_2
49+
#define STDIO_UART_TX PA_9
50+
#define STDIO_UART_RX PA_10
51+
#define STDIO_UART UART_1
5252

5353
typedef enum {
5454
SPI_1 = (int)SPI1_BASE,

‎libraries/mbed/targets/hal/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/PinNames.h

Lines changed: 71 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -122,48 +122,79 @@ typedef enum {
122122
PH_1 = 0x71,
123123

124124
// Generic signals namings
125-
DOUT = PA_2,
126-
DIN = PA_3,
127-
AD0 = PB_1,
128-
AD1 = PB_0,
129-
AD2 = PA_5,
130-
AD3 = PA_4,
131-
AD4 = PA_7,
132-
AD5 = PC_1,
133-
AD6 = PA_1,
134-
DIO0 = PB_1,
135-
DIO1 = PB_0,
136-
DIO2 = PA_5,
137-
DIO3 = PA_4,
138-
DIO4 = PA_7,
139-
DIO5 = PC_1,
140-
DIO6 = PA_1,
141-
DO8 = PA_6,
142-
DI8 = PA_11,
143-
PWM0 = PA_8,
144-
PWM1 = PC_9,
145-
NCTS = PA_0,
146-
RTS = PA_1,
147-
NDTR = PA_11,
148-
RSSI = PA_8,
149-
SLEEPRQ = PA_11,
150-
ON_SLEEP = PA_12,
151-
ASSOCIATE = PC_1,
152-
153-
LED1 = PA_2,
154-
LED2 = PA_2,
155-
LED3 = PA_2,
156-
LED4 = PA_2,
157-
SERIAL_TX = PA_9,
158-
SERIAL_RX = PA_10,
159-
USBTX = PA_2,
160-
USBRX = PA_3,
125+
XBEE_DOUT = PA_2,
126+
XBEE_DIN = PA_3,
127+
XBEE_AD0 = PB_1,
128+
XBEE_AD1 = PB_0,
129+
XBEE_AD2 = PA_5,
130+
XBEE_AD3 = PA_4,
131+
XBEE_AD4 = PA_7,
132+
XBEE_AD5 = PC_1,
133+
XBEE_AD6 = PA_1,
134+
XBEE_DIO0 = PB_1,
135+
XBEE_DIO1 = PB_0,
136+
XBEE_DIO2 = PA_5,
137+
XBEE_DIO3 = PA_4,
138+
XBEE_DIO4 = PA_7,
139+
XBEE_DIO5 = PC_1,
140+
XBEE_DIO6 = PA_1,
141+
XBEE_DO8 = PA_6,
142+
XBEE_DI8 = PA_11,
143+
XBEE_PWM0 = PA_8,
144+
XBEE_PWM1 = PC_9,
145+
XBEE_CTS = PA_0,
146+
XBEE_RTS = PA_1,
147+
XBEE_DTR = PA_11,
148+
XBEE_RSSI = PA_8,
149+
XBEE_SLEEPRQ = PA_11,
150+
XBEE_ON_SLEEP = PC_13,
151+
XBEE_ASSOCIATE = PC_1,
152+
XBEE_USB_RES = PA_12,
153+
154+
// needed for mbed to build tests
155+
LED1 = PA_0,
156+
157+
// XBEE_DOUT/DIN, RS232 port on UDK board
158+
SERIAL_TX = PA_2,
159+
SERIAL_RX = PA_3,
160+
161+
// DB_TX/RX, USB port on UDK board
162+
DB_TX = PA_9,
163+
DB_RX = PA_10,
164+
USBTX = PA_9,
165+
USBRX = PA_10,
166+
167+
// Multiplexed with XBEE pins
161168
I2C_SCL = PA_8,
162169
I2C_SDA = PC_9,
163-
SPI_MOSI = PA_7,
164-
SPI_MISO = PA_6,
165-
SPI_SCK = PA_5,
166-
SPI_CS = PA_4,
170+
SPI1_MOSI = PA_7,
171+
SPI1_MISO = PA_6,
172+
SPI1_SCK = PA_5,
173+
SPI1_CS = PA_4,
174+
175+
// SPI flash
176+
SPI3_MOSI = PC_12,
177+
SPI3_MISO = PC_11,
178+
SPI3_SCK = PC_10,
179+
SPI3_CS = PC_6,
180+
FLASH_HOLD = PC_7,
181+
FLASH_WP = PC_8,
182+
183+
// LoRa
184+
LORA_RESET = PC_0,
185+
LORA_RXCTL = PC_2,
186+
LORA_TXCTL = PC_3,
187+
LORA_DIO0 = PB_5,
188+
LORA_DIO1 = PB_6,
189+
LORA_DIO2 = PB_7,
190+
LORA_DIO3 = PB_8,
191+
LORA_DIO4 = PB_9,
192+
LORA_DIO5 = PB_10,
193+
// LoRa/SPI2
194+
LORA_NSS = PB_12,
195+
LORA_SCK = PB_13,
196+
LORA_MISO = PB_14,
197+
LORA_MOSI = PB_15,
167198

168199
// Not connected
169200
NC = (int)0xFFFFFFFF

‎workspace_tools/bootloaders/MTS_DRAGONFLY_F411RE/bootloader.bin

53.7 KB
Binary file not shown.

‎workspace_tools/bootloaders/MTS_MDOT_F411RE/bootloader.bin

53.7 KB
Binary file not shown.

‎workspace_tools/export/iar_mts_dragonfly_f411re.ewp.tmpl

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -593,11 +593,11 @@
593593
</option>
594594
<option>
595595
<name>OCOutputOverride</name>
596-
<state>0</state>
596+
<state>1</state>
597597
</option>
598598
<option>
599599
<name>OOCOutputFile</name>
600-
<state>{{name}}.bin</state>
600+
<state>application.bin</state>
601601
</option>
602602
<option>
603603
<name>OOCCommandLineProducer</name>
@@ -627,7 +627,7 @@
627627
<archiveVersion>1</archiveVersion>
628628
<data>
629629
<prebuild></prebuild>
630-
<postbuild></postbuild>
630+
<postbuild>"$PROJ_DIR$\post-build.bat" "$TARGET_DIR$"</postbuild>
631631
</data>
632632
</settings>
633633
<settings>
@@ -711,7 +711,7 @@
711711
</option>
712712
<option>
713713
<name>IlinkIcfOverride</name>
714-
<state>0</state>
714+
<state>1</state>
715715
</option>
716716
<option>
717717
<name>IlinkIcfFile</name>

‎workspace_tools/paths.py

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,7 @@
2828

2929
TOOLS = join(ROOT, "workspace_tools")
3030
TOOLS_DATA = join(TOOLS, "data")
31+
TOOLS_BOOTLOADERS = join(TOOLS, "bootloaders")
3132

3233
# mbed libraries
3334
MBED_BASE = join(LIB_DIR, "mbed")

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