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Merge pull request #4015 from bcostm/dev_disco-l053c8_usb
DISCO_L053C8: Add support of USB Device
2 parents 6c6c2fa + 3302a37 commit d5058aa

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+160
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features/unsupported/USBDevice/USBDevice/USBEndpoints.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,7 @@ typedef enum {
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#include "USBEndpoints_KL25Z.h"
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#elif !defined(USB_STM_HAL) && defined(TARGET_STM32F4)
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#include "USBEndpoints_STM32F4.h"
48-
#elif defined (TARGET_STM32F4) || defined (TARGET_STM32F2) || defined (TARGET_STM32F7) || defined (TARGET_STM32F3) || defined(TARGET_STM32L4) || defined(TARGET_STM32F1)
48+
#elif defined (TARGET_STM32F4) || defined (TARGET_STM32F2) || defined (TARGET_STM32F7) || defined (TARGET_STM32F3) || defined(TARGET_STM32L0) || defined(TARGET_STM32L4) || defined(TARGET_STM32F1)
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#include "USBEndpoints_STM32.h"
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#elif defined (TARGET_RZ_A1H) || defined (TARGET_VK_RZ_A1H)
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#include "USBEndpoints_RZ_A1H.h"
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,134 @@
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/* Copyright (c) 2016 mbed.org, MIT License
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
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* and associated documentation files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
7+
* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all copies or
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* substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
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* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
14+
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
15+
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef USBHAL_STM32L053C8_H
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#define USBHAL_STM32L053C8_H
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#define USBHAL_IRQn USB_IRQn
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/* must be multiple of 4 bytes */
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#define NB_ENDPOINT 8
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#define MAXTRANSFER_SIZE 0x200
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#define FIFO_USB_RAM_SIZE (MAXTRANSFER_SIZE+MAX_PACKET_SIZE_EP0+MAX_PACKET_SIZE_EP1+MAX_PACKET_SIZE_EP2+MAX_PACKET_SIZE_EP3)
27+
#if (FIFO_USB_RAM_SIZE > 0x500)
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#error "FIFO dimensioning incorrect"
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#endif
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typedef struct
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{
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USBHAL *inst;
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void (USBHAL::*bus_reset)(void);
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void (USBHAL::*sof)(int frame);
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void (USBHAL::*connect_change)(unsigned int connected);
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void (USBHAL::*suspend_change)(unsigned int suspended);
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void (USBHAL::*ep0_setup)(void);
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void (USBHAL::*ep0_in)(void);
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void (USBHAL::*ep0_out)(void);
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void (USBHAL::*ep0_read)(void);
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bool (USBHAL::*ep_realise)(uint8_t endpoint, uint32_t maxPacket, uint32_t flags);
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bool (USBHAL::*epCallback[6])(void);
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uint8_t epComplete[2*NB_ENDPOINT];
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/* memorize dummy buffer used for reception */
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uint32_t pBufRx[MAXTRANSFER_SIZE>>2];
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uint32_t pBufRx0[MAX_PACKET_SIZE_EP0>>2];
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gpio_t usb_switch;
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}USBHAL_Private_t;
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uint32_t HAL_PCDEx_GetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo)
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{
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return 1024;
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}
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void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
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{
58+
USBHAL_Private_t *priv=((USBHAL_Private_t *)(hpcd->pData));
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gpio_write(&(priv->usb_switch),state);
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}
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void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
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{
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USBHAL_Private_t *priv=((USBHAL_Private_t *)(hpcd->pData));
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USBHAL *obj= priv->inst;
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uint32_t sofnum = (hpcd->Instance->FNR) & USB_FNR_FN;
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void (USBHAL::*func)(int frame) = priv->sof;
68+
(obj->*func)(sofnum);
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}
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USBHAL * USBHAL::instance;
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USBHAL::USBHAL(void)
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{
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/* init parameter */
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USBHAL_Private_t *HALPriv = new(USBHAL_Private_t);
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hpcd.Instance = USB;
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/* initialized Init to zero (constructor does not zero initialized the
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* area */
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/* initialized all field of init including 0 field */
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/* constructor does not fill with zero */
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memset(&hpcd.Init, 0, sizeof(hpcd.Init));
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hpcd.Init.dev_endpoints = NB_ENDPOINT;
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hpcd.Init.ep0_mps = MAX_PACKET_SIZE_EP0;
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hpcd.Init.phy_itface = PCD_PHY_EMBEDDED;
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hpcd.Init.Sof_enable = 1;
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hpcd.Init.speed = PCD_SPEED_FULL;
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/* pass instance for usage inside call back */
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HALPriv->inst = this;
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HALPriv->bus_reset = &USBHAL::busReset;
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HALPriv->suspend_change = &USBHAL::suspendStateChanged;
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HALPriv->connect_change = &USBHAL::connectStateChanged;
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HALPriv->sof = &USBHAL::SOF;
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HALPriv->ep0_setup = &USBHAL::EP0setupCallback;
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HALPriv->ep_realise = &USBHAL::realiseEndpoint;
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HALPriv->ep0_in = &USBHAL::EP0in;
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HALPriv->ep0_out = &USBHAL::EP0out;
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HALPriv->ep0_read = &USBHAL::EP0read;
99+
hpcd.pData = (void*)HALPriv;
100+
HALPriv->epCallback[0] = &USBHAL::EP1_OUT_callback;
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HALPriv->epCallback[1] = &USBHAL::EP1_IN_callback;
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HALPriv->epCallback[2] = &USBHAL::EP2_OUT_callback;
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HALPriv->epCallback[3] = &USBHAL::EP2_IN_callback;
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HALPriv->epCallback[4] = &USBHAL::EP3_OUT_callback;
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HALPriv->epCallback[5] = &USBHAL::EP3_IN_callback;
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instance = this;
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/* Configure USB DM pin. This is optional, and maintained only for user guidance. */
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__HAL_RCC_GPIOA_CLK_ENABLE();
110+
pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_USB));
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pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_USB));
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/* Enable USB Clock */
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__HAL_RCC_USB_CLK_ENABLE();
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/* Enable SYSCFG Clock */
117+
__HAL_RCC_SYSCFG_CLK_ENABLE();
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hpcd.State = HAL_PCD_STATE_RESET;
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HAL_PCD_Init(&hpcd);
120+
121+
/* hardcoded size of FIFO according definition*/
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HAL_PCDEx_PMAConfig(&hpcd , 0x00 , PCD_SNG_BUF, 0x30);
123+
HAL_PCDEx_PMAConfig(&hpcd , 0x80 , PCD_SNG_BUF, 0x70);
124+
#if 1
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HAL_PCDEx_PMAConfig(&hpcd , 0x3, PCD_DBL_BUF, 0x018000b0);
126+
#else
127+
HAL_PCDEx_PMAConfig(&hpcd , 0x3, PCD_SNG_BUF, 0x180);
128+
#endif
129+
HAL_PCDEx_PMAConfig(&hpcd , 0x83, PCD_SNG_BUF, 0xb0);
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NVIC_SetVector(USBHAL_IRQn,(uint32_t)&_usbisr);
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NVIC_SetPriority(USBHAL_IRQn, 1);
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HAL_PCD_Start(&hpcd);
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}
134+
#endif
Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
/* Copyright (c) 2016 mbed.org, MIT License
2+
*
3+
* Permission is hereby granted, free of charge, to any person obtaining a copy of this software
4+
* and associated documentation files (the "Software"), to deal in the Software without
5+
* restriction, including without limitation the rights to use, copy, modify, merge, publish,
6+
* distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
7+
* Software is furnished to do so, subject to the following conditions:
8+
*
9+
* The above copyright notice and this permission notice shall be included in all copies or
10+
* substantial portions of the Software.
11+
*
12+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
13+
* BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
14+
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
15+
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
16+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
17+
*/
18+
#include "USBHAL_STM32L053C8.h"

targets/TARGET_STM/TARGET_STM32L0/TARGET_DISCO_L053C8/device/system_stm32l0xx.c

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -377,10 +377,8 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
377377
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External 8 MHz clock on OSC_IN */
378378
}
379379
RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
380-
#if !defined (STM32L031xx) && !defined (STM32L041xx) && !defined(STM32L051xx) && !defined(STM32L061xx) && !defined(STM32L071xx) && !defined(STM32L081xx) && \
381-
!defined (STM32L011xx) && !defined (STM32L021xx)
382380
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; /* For USB and RNG clock */
383-
#endif
381+
384382
// PLLCLK = (8 MHz * 8)/2 = 32 MHz
385383
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
386384
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
@@ -391,6 +389,12 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
391389
return 0; // FAIL
392390
}
393391

392+
/* Select HSI48 as USB clock source */
393+
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
394+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
395+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
396+
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
397+
394398
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
395399
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
396400
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 32 MHz

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