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RTX: Support stacks larger than 64k
This issue was originally reported on the mbed site: http://developer.mbed.org/questions/5570/mbed-rtos-memory-utilization/ The cause of the 64k limitation is that even though the user can set a stack size larger than 64k in the osThreadDef_t::stacksize 32-bit field, this size is truncated to 16-bit when it is copied to the priv_stack field in the OS_TCB structure. This commit corrects that problem by making the OS_TCB::priv_stack field 32-bit. Due to word alignment, this introduces another 2 bytes of padding in the structure which I have made explicit with the addition of the reserved2 field. The tsk_stack field which follows priv_stack is referenced directly by assembly language code responsible for context switching. This context switching code used a fixed byte offset, TCB_TSTACK, to access this tsk_stack field. I had to update the TCB_TSTACK definition in various locations from 36 to 40 to account for the extra alignment padding and increased size of the priv_stack field. TESTING * GCC_ARM - mbedLPC1768 and mbedLPC11U24 * Online mbed Compiler - mbedLPC1768 and mbedLPC11U24 NOTES: I had to change assembly language code that was specific to IAR but I don't have that toolchain so those changes aren't tested. They do however follow the same pattern as the tested GCC modifications.
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libraries/rtos/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_GCC/HAL_CM0.s

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@@ -35,7 +35,7 @@
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.file "HAL_CM0.S"
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.syntax unified
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.equ TCB_TSTACK, 36
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.equ TCB_TSTACK, 40
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/*----------------------------------------------------------------------------

libraries/rtos/rtx/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_IAR/HAL_CM0.s

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NAME HAL_CM0.S
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#define TCB_TSTACK 36
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#define TCB_TSTACK 40
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EXTERN os_flags
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EXTERN os_tsk

libraries/rtos/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_GCC/HAL_CM0.s

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.file "HAL_CM0.S"
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.syntax unified
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.equ TCB_TSTACK, 36
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.equ TCB_TSTACK, 40
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/*----------------------------------------------------------------------------

libraries/rtos/rtx/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_IAR/HAL_CM0.s

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NAME HAL_CM0.S
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37-
#define TCB_TSTACK 36
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#define TCB_TSTACK 40
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EXTERN os_flags
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EXTERN os_tsk

libraries/rtos/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_GCC/HAL_CM3.s

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.file "HAL_CM3.S"
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.syntax unified
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.equ TCB_TSTACK, 36
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.equ TCB_TSTACK, 40
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/*----------------------------------------------------------------------------

libraries/rtos/rtx/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_IAR/HAL_CM3.s

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NAME HAL_CM3.S
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#define TCB_TSTACK 36
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#define TCB_TSTACK 40
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EXTERN os_flags
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EXTERN os_tsk

libraries/rtos/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_GCC/HAL_CM4.s

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@@ -36,7 +36,7 @@
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.syntax unified
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.equ TCB_STACKF, 32
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.equ TCB_TSTACK, 36
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.equ TCB_TSTACK, 40
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/*----------------------------------------------------------------------------

libraries/rtos/rtx/TARGET_CORTEX_M/TARGET_M4/TOOLCHAIN_IAR/HAL_CM4.s

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NAME HAL_CM4.S
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#define TCB_STACKF 32
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#define TCB_TSTACK 36
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#define TCB_TSTACK 40
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EXTERN os_flags
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EXTERN os_tsk

libraries/rtos/rtx/TARGET_CORTEX_M/os_tcb.h

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@@ -32,8 +32,9 @@ typedef struct OS_TCB {
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/* Hardware dependant part: specific for CM processor */
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U8 stack_frame; /* Stack frame: 0=Basic, 1=Extended */
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U8 reserved;
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U16 priv_stack; /* Private stack size in bytes */
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U8 reserved1;
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U16 reserved2;
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U32 priv_stack; /* Private stack size in bytes */
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U32 tsk_stack; /* Current task Stack pointer (R13) */
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U32 *stack; /* Pointer to Task Stack memory block */
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libraries/rtos/rtx/TARGET_CORTEX_M/rt_TypeDef.h

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@@ -41,7 +41,7 @@ typedef void *OS_ID;
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typedef U32 OS_RESULT;
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#define TCB_STACKF 32 /* 'stack_frame' offset */
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#define TCB_TSTACK 36 /* 'tsk_stack' offset */
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#define TCB_TSTACK 40 /* 'tsk_stack' offset */
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typedef struct OS_PSFE { /* Post Service Fifo Entry */
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void *id; /* Object Identification */

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