Edit on Toolchain linker files

Previous one were not working, using nucleol073RZ files

Author: Andrea Gilardoni

targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_GCC_ARM/STM32L071xx.ld

@@ -29,7 +29,7 @@
 #if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
     /* This value is normally defined by the tools
        to 0x1000 for bare metal and 0x400 for RTOS */
-    #define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
+    #define MBED_CONF_TARGET_BOOT_STACK_SIZE  0x400
 #endif
 
 /* Round up VECTORS_SIZE to 8 bytes */

targets/TARGET_STM/TARGET_STM32L0/TARGET_MCU_STM32L071xx/device/TOOLCHAIN_GCC_ARM/startup_stm32l071xx.S

@@ -1,29 +1,42 @@
-/* mbed Microcontroller Library
- * SPDX-License-Identifier: BSD-3-Clause
- ******************************************************************************
- *
- * Copyright (c) 2020 STMicroelectronics. 
- * All rights reserved.
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the 
- * License. You may obtain a copy of the License at:
- *                        opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- * @file      startup_stm32l071xx.s
- * @author    MCD Application Team
- * @brief     STM32L071xx Devices vector table for GCC toolchain.
- *            This module performs:
- *                - Set the initial SP
- *                - Set the initial PC == Reset_Handler,
- *                - Set the vector table entries with the exceptions ISR address
- *                - Branches to main in the C library (which eventually
- *                  calls main()).
- *            After Reset the Cortex-M0+ processor is in Thread mode,
- *            priority is Privileged, and the Stack is set to Main.
- ******************************************************************************
- */
+/**
+  ******************************************************************************
+  * @file      startup_stm32l073xx.s
+  * @author    MCD Application Team
+  * @brief     STM32L073xx Devices vector table for Atollic TrueSTUDIO toolchain.
+  *            This module performs:
+  *                - Set the initial SP
+  *                - Set the initial PC == Reset_Handler,
+  *                - Set the vector table entries with the exceptions ISR address
+  *                - Branches to main in the C library (which eventually
+  *                  calls main()).
+  *            After Reset the Cortex-M0+ processor is in Thread mode,
+  *            priority is Privileged, and the Stack is set to Main.
+  ******************************************************************************
+  *
+  * Redistribution and use in source and binary forms, with or without modification,
+  * are permitted provided that the following conditions are met:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
+  *
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+  *
+  ******************************************************************************
+  */
 
   .syntax unified
   .cpu cortex-m0plus
@@ -40,17 +53,13 @@ defined in linker script */
 .word  _sdata
 /* end address for the .data section. defined in linker script */
 .word  _edata
-/* start address for the .bss section. defined in linker script */
-.word  _sbss
-/* end address for the .bss section. defined in linker script */
-.word  _ebss
 
     .section  .text.Reset_Handler
   .weak  Reset_Handler
   .type  Reset_Handler, %function
-Reset_Handler:  
-   ldr   r0, =_estack
-   mov   sp, r0          /* set stack pointer */
+Reset_Handler:
+  ldr   r0, =_estack
+  mov   sp, r0          /* set stack pointer */
 
 /* Copy the data segment initializers from flash to SRAM */
   movs  r1, #0
@@ -68,29 +77,17 @@ LoopCopyDataInit:
   adds  r2, r0, r1
   cmp  r2, r3
   bcc  CopyDataInit
-  ldr  r2, =_sbss
-  b  LoopFillZerobss
-/* Zero fill the bss segment. */
-FillZerobss:
-  movs  r3, #0
-  str  r3, [r2]
-  adds r2, r2, #4
-
-
-LoopFillZerobss:
-  ldr  r3, = _ebss
-  cmp  r2, r3
-  bcc  FillZerobss
 
 /* Call the clock system intitialization function.*/
   bl  SystemInit
 /* Call static constructors */
-    bl __libc_init_array
+  //bl __libc_init_array
 /* Call the application's entry point.*/
-  bl  main
+  //bl  main
+  bl _start
 
 LoopForever:
-    b LoopForever
+  b LoopForever
 
 
 .size  Reset_Handler, .-Reset_Handler
@@ -141,11 +138,11 @@ g_pfnVectors:
   .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
   .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
   .word     FLASH_IRQHandler                  /* FLASH                        */
-  .word     RCC_IRQHandler                    /* RCC                          */
+  .word     RCC_CRS_IRQHandler                /* RCC and CRS                  */
   .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
   .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
   .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
-  .word     0                                 /* Reserved                     */
+  .word     TSC_IRQHandler                     /* TSC                           */
   .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
   .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
   .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
@@ -154,7 +151,7 @@ g_pfnVectors:
   .word     USART4_5_IRQHandler               /* USART4 and USART 5           */
   .word     TIM2_IRQHandler                   /* TIM2                         */
   .word     TIM3_IRQHandler                   /* TIM3                         */
-  .word     TIM6_IRQHandler                   /* TIM6 and DAC                 */
+  .word     TIM6_DAC_IRQHandler               /* TIM6 and DAC                 */
   .word     TIM7_IRQHandler 				          /* TIM7                         */
   .word     0              					          /* Reserved                     */
   .word     TIM21_IRQHandler                  /* TIM21                        */
@@ -166,9 +163,9 @@ g_pfnVectors:
   .word     SPI2_IRQHandler                   /* SPI2                         */
   .word     USART1_IRQHandler                 /* USART1                       */
   .word     USART2_IRQHandler                 /* USART2                       */
-  .word     LPUART1_IRQHandler                /* LPUART1                      */
-  .word     0                                 /* Reserved                     */
-  .word     0                                 /* Reserved                     */
+  .word     RNG_LPUART1_IRQHandler            /* RNG and LPUART1              */
+  .word     LCD_IRQHandler                    /* LCD                          */
+  .word     USB_IRQHandler                    /* USB                          */
 
 /*******************************************************************************
 *
@@ -205,8 +202,8 @@ g_pfnVectors:
    .weak      FLASH_IRQHandler
    .thumb_set FLASH_IRQHandler,Default_Handler
 
-   .weak      RCC_IRQHandler
-   .thumb_set RCC_IRQHandler,Default_Handler
+   .weak      RCC_CRS_IRQHandler
+   .thumb_set RCC_CRS_IRQHandler,Default_Handler
 
    .weak      EXTI0_1_IRQHandler
    .thumb_set EXTI0_1_IRQHandler,Default_Handler
@@ -217,6 +214,9 @@ g_pfnVectors:
    .weak      EXTI4_15_IRQHandler
    .thumb_set EXTI4_15_IRQHandler,Default_Handler
 
+   .weak      TSC_IRQHandler
+   .thumb_set TSC_IRQHandler,Default_Handler
+
    .weak      DMA1_Channel1_IRQHandler
    .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
 
@@ -241,8 +241,8 @@ g_pfnVectors:
    .weak      TIM3_IRQHandler
    .thumb_set TIM3_IRQHandler,Default_Handler
 
-   .weak      TIM6_IRQHandler
-   .thumb_set TIM6_IRQHandler,Default_Handler
+   .weak      TIM6_DAC_IRQHandler
+   .thumb_set TIM6_DAC_IRQHandler,Default_Handler
 
    .weak      TIM7_IRQHandler
    .thumb_set TIM7_IRQHandler,Default_Handler
@@ -274,8 +274,14 @@ g_pfnVectors:
    .weak      USART2_IRQHandler
    .thumb_set USART2_IRQHandler,Default_Handler
 
-   .weak      LPUART1_IRQHandler
-   .thumb_set LPUART1_IRQHandler,Default_Handler
+   .weak      RNG_LPUART1_IRQHandler
+   .thumb_set RNG_LPUART1_IRQHandler,Default_Handler
+
+   .weak      LCD_IRQHandler
+   .thumb_set LCD_IRQHandler,Default_Handler
+
+   .weak      USB_IRQHandler
+   .thumb_set USB_IRQHandler,Default_Handler