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Ensure CRP is set correctly for IAR, GCC and ARM
CRP value can be set through a macro in mbed_app such as "macros": [ "CRP=CRP_NONE" ]
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4 files changed

+50
-30
lines changed

4 files changed

+50
-30
lines changed

targets/TARGET_NXP/TARGET_LPC176X/device/CRP.c

Lines changed: 44 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,48 @@
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#if !defined(MBED_APP_START) // do not include CRP if there is a bootloader.
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long CRP_Key __attribute__((section(".ARM.__at_0x000002FC "))) = 0xFFFFFFFF;
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#include "mbed_toolchain.h"
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/* Code Read Protection
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NONE 0xFFFFFFFF - No code protection.
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CRP1 0x12345678 - Write to RAM command can not access RAM below 0x10000200.
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- Read Memory command: disabled.
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- Copy RAM to Flash command: cannot write to Sector 0.
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- "Go" command: disabled.
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- Erase sector(s) command: can erase any individual sector except
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sector 0 only, or can erase all sectors at once.
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- Compare command: disabled
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CRP2 0x87654321 - Write to RAM command: disabled.
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- Copy RAM to Flash: disabled.
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- Erase command: only allows erase of all sectors.
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CRP3 0x43218765 - Access to chip via the SWD pins is disabled. ISP entry
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by pulling PIO0_1 LOW is disabled if a valid user code is
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present in flash sector 0.
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Caution: If CRP3 is selected, no future factory testing can be
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performed on the device.
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*/
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#if !defined(APPLICATION_ADDR) // Relocate CRP if there is a bootloader.
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#define APPLICATION_ADDR 0
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#endif
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#define CRP_NONE 0xFFFFFFFF
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#define CRP_1 0x12345678
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#define CRP_2 0x87654321
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#define CRP_3 0x43218765
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#ifndef CRP
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#define CRP CRP_NONE
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#endif
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#if defined (__ICCARM__)
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__root const long CRP_Key@APPLICATION_ADDR + 0x000002FC = CRP;
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#elif defined (__ARMCC_VERSION)
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const long CRP_Key __attribute__((used)) __attribute__((at(APPLICATION_ADDR+0x000002FC))) = CRP;
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#elif defined (__GNUC__)
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const long CRP_Key __attribute__((used)) __attribute__((section(".CRPSection"))) = CRP;
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#endif

targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_MICRO/startup_LPC17xx.S

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -99,12 +99,6 @@ __Vectors DCD __initial_sp ; Top of Stack
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DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL)
100100

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IF :LNOT::DEF:NO_CRP
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AREA |.ARM.__at_0x02FC|, CODE, READONLY
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CRP_Key DCD 0xFFFFFFFF
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ENDIF
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AREA |.text|, CODE, READONLY
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110104

targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,10 @@ SECTIONS
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.text :
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{
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KEEP(*(.isr_vector))
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/* Code Read Protect data */
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. = 0x000002FC ;
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KEEP(*(.CRPSection))
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/* End of Code Read Protect */
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*(.text*)
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KEEP(*(.init))
@@ -71,6 +75,8 @@ SECTIONS
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*(.rodata*)
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KEEP(*(.eh_frame*))
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} > FLASH
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.ARM.extab :

targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_IAR/startup_LPC17xx.S

Lines changed: 0 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -350,26 +350,4 @@ USBActivity_IRQHandler
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CANActivity_IRQHandler
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B CANActivity_IRQHandler
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#ifndef SRAM
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SECTION .crp:CODE:ROOT(2)
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DATA
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/* Code Read Protection
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CRP1 0x12345678 - Write to RAM command can not access RAM below 0x10000200.
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- Read Memory command: disabled.
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- Copy RAM to Flash command: cannot write to Sector 0.
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- "Go" command: disabled.
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- Erase sector(s) command: can erase any individual sector except
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sector 0 only, or can erase all sectors at once.
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- Compare command: disabled
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CRP2 0x87654321 - Write to RAM command: disabled.
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- Copy RAM to Flash: disabled.
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- Erase command: only allows erase of all sectors.
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CRP3 0x43218765 - Access to chip via the SWD pins is disabled. ISP entry
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by pulling PIO0_1 LOW is disabled if a valid user code is
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present in flash sector 0.
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Caution: If CRP3 is selected, no future factory testing can be
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performed on the device.
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*/
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DCD 0xFFFFFFFF
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#endif
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END

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