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Ashok Rao0xc0170
Ashok Rao
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0xc0170
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Adding STM S2_LP as a new target
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‎features/netsocket/emac-drivers/TARGET_STM_EMAC/TARGET_STM32F4/TARGET_MTB_STM_S2LP/stm32f4_eth_conf.c

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/* mbed Microcontroller Library
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* Copyright (c) 2017 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "stm32f4xx_hal.h"
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void _eth_config_mac(ETH_HandleTypeDef *heth)
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{
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ETH_MACInitTypeDef macconf = {
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.Watchdog = ETH_WATCHDOG_ENABLE,
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.Jabber = ETH_JABBER_ENABLE,
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.InterFrameGap = ETH_INTERFRAMEGAP_96BIT,
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.CarrierSense = ETH_CARRIERSENCE_ENABLE,
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.ReceiveOwn = ETH_RECEIVEOWN_ENABLE,
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.LoopbackMode = ETH_LOOPBACKMODE_DISABLE,
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.ChecksumOffload = ETH_CHECKSUMOFFLAOD_ENABLE,
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.RetryTransmission = ETH_RETRYTRANSMISSION_DISABLE,
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.AutomaticPadCRCStrip = ETH_AUTOMATICPADCRCSTRIP_DISABLE,
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.BackOffLimit = ETH_BACKOFFLIMIT_10,
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.DeferralCheck = ETH_DEFFERRALCHECK_DISABLE,
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.ReceiveAll = ETH_RECEIVEAll_DISABLE,
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.SourceAddrFilter = ETH_SOURCEADDRFILTER_DISABLE,
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.PassControlFrames = ETH_PASSCONTROLFRAMES_BLOCKALL,
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.BroadcastFramesReception = ETH_BROADCASTFRAMESRECEPTION_ENABLE,
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.DestinationAddrFilter = ETH_DESTINATIONADDRFILTER_NORMAL,
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.PromiscuousMode = ETH_PROMISCUOUS_MODE_DISABLE,
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.MulticastFramesFilter = ETH_MULTICASTFRAMESFILTER_NONE, // Disable multicast filter
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.UnicastFramesFilter = ETH_UNICASTFRAMESFILTER_PERFECT,
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.HashTableHigh = 0x0U,
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.HashTableLow = 0x0U,
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.PauseTime = 0x0U,
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.ZeroQuantaPause = ETH_ZEROQUANTAPAUSE_DISABLE,
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.PauseLowThreshold = ETH_PAUSELOWTHRESHOLD_MINUS4,
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.UnicastPauseFrameDetect = ETH_UNICASTPAUSEFRAMEDETECT_DISABLE,
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.ReceiveFlowControl = ETH_RECEIVEFLOWCONTROL_DISABLE,
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.TransmitFlowControl = ETH_TRANSMITFLOWCONTROL_DISABLE,
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.VLANTagComparison = ETH_VLANTAGCOMPARISON_16BIT,
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.VLANTagIdentifier = 0x0U,
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};
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if (heth->Init.ChecksumMode == ETH_CHECKSUM_BY_HARDWARE) {
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macconf.ChecksumOffload = ETH_CHECKSUMOFFLAOD_ENABLE;
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} else {
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macconf.ChecksumOffload = ETH_CHECKSUMOFFLAOD_DISABLE;
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}
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(void) HAL_ETH_ConfigMAC(heth, &macconf);
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}

‎features/netsocket/emac-drivers/TARGET_STM_EMAC/TARGET_STM32F4/TARGET_MTB_STM_S2LP/stm32f4_eth_init.c

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/* mbed Microcontroller Library
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* Copyright (c) 2018, STMicroelectronics
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef USE_USER_DEFINED_HAL_ETH_MSPINIT
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#include "stm32f4xx_hal.h"
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/**
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* Override HAL Eth Init function
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*/
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void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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if (heth->Instance == ETH) {
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/* Enable GPIOs clocks */
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOB_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOG_CLK_ENABLE();
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/** ETH GPIO Configuration
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RMII_REF_CLK ----------------------> PA1
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RMII_MDIO -------------------------> PA2
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RMII_MDC --------------------------> PC1
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RMII_MII_CRS_DV -------------------> PA7
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RMII_MII_RXD0 ---------------------> PC4
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RMII_MII_RXD1 ---------------------> PC5
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RMII_MII_RXER ---------------------> PG2
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RMII_MII_TX_EN --------------------> PG11
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RMII_MII_TXD0 ---------------------> PG13
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RMII_MII_TXD1 ---------------------> PB13
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*/
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/* Configure PA1, PA2 and PA7 */
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GPIO_InitStructure.Speed = GPIO_SPEED_HIGH;
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GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStructure.Pull = GPIO_NOPULL;
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GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
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GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
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/* Configure PB13 */
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GPIO_InitStructure.Pin = GPIO_PIN_13;
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HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
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/* Configure PC1, PC4 and PC5 */
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GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
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/* Configure PG2, PG11 and PG13 */
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GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13;
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HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
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/* Enable the Ethernet global Interrupt */
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HAL_NVIC_SetPriority(ETH_IRQn, 0x7, 0);
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HAL_NVIC_EnableIRQ(ETH_IRQn);
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/* Enable ETHERNET clock */
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__HAL_RCC_ETH_CLK_ENABLE();
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}
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}
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/**
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* Override HAL Eth DeInit function
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*/
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void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
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{
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if (heth->Instance == ETH) {
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/* Peripheral clock disable */
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__HAL_RCC_ETH_CLK_DISABLE();
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/** ETH GPIO Configuration
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RMII_REF_CLK ----------------------> PA1
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RMII_MDIO -------------------------> PA2
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RMII_MDC --------------------------> PC1
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RMII_MII_CRS_DV -------------------> PA7
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RMII_MII_RXD0 ---------------------> PC4
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RMII_MII_RXD1 ---------------------> PC5
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RMII_MII_RXER ---------------------> PG2
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RMII_MII_TX_EN --------------------> PG11
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RMII_MII_TXD0 ---------------------> PG13
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RMII_MII_TXD1 ---------------------> PB13
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*/
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HAL_GPIO_DeInit(GPIOA, GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7);
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HAL_GPIO_DeInit(GPIOB, GPIO_PIN_13);
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HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5);
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HAL_GPIO_DeInit(GPIOG, GPIO_PIN_2 | GPIO_PIN_11 | GPIO_PIN_13);
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/* Disable the Ethernet global Interrupt */
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NVIC_DisableIRQ(ETH_IRQn);
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}
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}
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#endif /* USE_USER_DEFINED_HAL_ETH_MSPINIT */

‎targets/targets.json

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"device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
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"detect_code": ["0467"],
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"release_versions": ["5"],
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"device_name": "STM32F429VI",
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"device_name": "STM32F429ZI",
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"bootloader_supported": true
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},
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"NUCLEO_F439ZI": {

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