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TomoYamanakaTomoYamanaka
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Modify IRQ handler processing without RTOS at Cortex-A GCC Compiler
In case of unusing RTOS, IRQ handler executes "while(1)" and it causes a program freeze. Therefore, I revised this processing.
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4 files changed

+196
-48
lines changed

4 files changed

+196
-48
lines changed

‎targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_GCC_ARM/startup_RZ1ALU.S

Lines changed: 1 addition & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -223,27 +223,4 @@ sf_boot:
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.pool
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.size Reset_Handler, . - Reset_Handler
225225

226-
227-
.text
228-
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/* Macro to define default handlers. Default handler
230-
* will be weak symbol and just dead loops. They can be
231-
* overwritten by other handlers */
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.macro def_default_handler handler_name
233-
.align 1
234-
.thumb_func
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.weak \handler_name
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.type \handler_name, %function
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\handler_name :
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b .
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.size \handler_name, . - \handler_name
240-
.endm
241-
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def_default_handler Undef_Handler
243-
def_default_handler SVC_Handler
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def_default_handler PAbt_Handler
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def_default_handler DAbt_Handler
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def_default_handler IRQ_Handler
247-
def_default_handler FIQ_Handler
248-
249-
.END
226+
.end

‎targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_GCC_ARM/weak_handler.S

Lines changed: 97 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,97 @@
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/*
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* Copyright (c) 2013-2018 Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
16+
* limitations under the License.
17+
*
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* -----------------------------------------------------------------------------
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*
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* Project: CMSIS-RTOS RTX
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* Title: Cortex-A Exception handlers
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*
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* -----------------------------------------------------------------------------
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*/
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.file "irq_weak.S"
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.syntax unified
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.equ MODE_SVC, 0x13
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.arm
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.section ".text"
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.align 4
34+
35+
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/* Macro to define default handlers. Default handler
37+
* will be weak symbol and just dead loops. They can be
38+
* overwritten by other handlers */
39+
.macro def_default_handler handler_name
40+
.align 1
41+
.thumb_func
42+
.weak \handler_name
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.type \handler_name, %function
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\handler_name :
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b .
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.size \handler_name, . - \handler_name
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.endm
48+
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def_default_handler Undef_Handler
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def_default_handler SVC_Handler
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def_default_handler PAbt_Handler
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def_default_handler DAbt_Handler
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def_default_handler FIQ_Handler
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55+
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.weak IRQ_Handler
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.type IRQ_Handler, %function
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.global IRQ_Handler
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.fnstart
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.cantunwind
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IRQ_Handler:
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SUB LR, LR, #4 // Pre-adjust LR
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SRSFD SP!, #MODE_SVC // Save LR_irq and SPSR_irq on to the SVC stack
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CPS #MODE_SVC // Change to SVC mode
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PUSH {R0-R3, R12, LR} // Save APCS corruptible registers
67+
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MOV R3, SP // Move SP into R3
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AND R3, R3, #4 // Get stack adjustment to ensure 8-byte alignment
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SUB SP, SP, R3 // Adjust stack
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PUSH {R3, R4} // Store stack adjustment(R3) and user data(R4)
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BLX IRQ_GetActiveIRQ // Retrieve interrupt ID into R0
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MOV R4, R0 // Move interrupt ID to R4
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BLX IRQ_GetHandler // Retrieve interrupt handler address for current ID
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CMP R0, #0 // Check if handler address is 0
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BEQ IRQ_End // If 0, end interrupt and return
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CPSIE i // Re-enable interrupts
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BLX R0 // Call IRQ handler
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CPSID i // Disable interrupts
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IRQ_End:
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MOV R0, R4 // Move interrupt ID to R0
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BLX IRQ_EndOfInterrupt // Signal end of interrupt
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POP {R3, R4} // Restore stack adjustment(R3) and user data(R4)
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ADD SP, SP, R3 // Unadjust stack
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POP {R0-R3, R12, LR} // Restore stacked APCS registers
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RFEFD SP! // Return from IRQ handler
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.fnend
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.size IRQ_Handler, .-IRQ_Handler
96+
97+
.end

‎targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_GCC_ARM/startup_RZ1AH.S

Lines changed: 1 addition & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -223,27 +223,4 @@ sf_boot:
223223
.pool
224224
.size Reset_Handler, . - Reset_Handler
225225

226-
227-
.text
228-
229-
/* Macro to define default handlers. Default handler
230-
* will be weak symbol and just dead loops. They can be
231-
* overwritten by other handlers */
232-
.macro def_default_handler handler_name
233-
.align 1
234-
.thumb_func
235-
.weak \handler_name
236-
.type \handler_name, %function
237-
\handler_name :
238-
b .
239-
.size \handler_name, . - \handler_name
240-
.endm
241-
242-
def_default_handler Undef_Handler
243-
def_default_handler SVC_Handler
244-
def_default_handler PAbt_Handler
245-
def_default_handler DAbt_Handler
246-
def_default_handler IRQ_Handler
247-
def_default_handler FIQ_Handler
248-
249-
.END
226+
.end

‎targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_GCC_ARM/weak_handler.S

Lines changed: 97 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,97 @@
1+
/*
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* Copyright (c) 2013-2018 Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
8+
* You may obtain a copy of the License at
9+
*
10+
* www.apache.org/licenses/LICENSE-2.0
11+
*
12+
* Unless required by applicable law or agreed to in writing, software
13+
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
14+
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15+
* See the License for the specific language governing permissions and
16+
* limitations under the License.
17+
*
18+
* -----------------------------------------------------------------------------
19+
*
20+
* Project: CMSIS-RTOS RTX
21+
* Title: Cortex-A Exception handlers
22+
*
23+
* -----------------------------------------------------------------------------
24+
*/
25+
26+
.file "irq_weak.S"
27+
.syntax unified
28+
29+
.equ MODE_SVC, 0x13
30+
31+
.arm
32+
.section ".text"
33+
.align 4
34+
35+
36+
/* Macro to define default handlers. Default handler
37+
* will be weak symbol and just dead loops. They can be
38+
* overwritten by other handlers */
39+
.macro def_default_handler handler_name
40+
.align 1
41+
.thumb_func
42+
.weak \handler_name
43+
.type \handler_name, %function
44+
\handler_name :
45+
b .
46+
.size \handler_name, . - \handler_name
47+
.endm
48+
49+
def_default_handler Undef_Handler
50+
def_default_handler SVC_Handler
51+
def_default_handler PAbt_Handler
52+
def_default_handler DAbt_Handler
53+
def_default_handler FIQ_Handler
54+
55+
56+
.weak IRQ_Handler
57+
.type IRQ_Handler, %function
58+
.global IRQ_Handler
59+
.fnstart
60+
.cantunwind
61+
IRQ_Handler:
62+
63+
SUB LR, LR, #4 // Pre-adjust LR
64+
SRSFD SP!, #MODE_SVC // Save LR_irq and SPSR_irq on to the SVC stack
65+
CPS #MODE_SVC // Change to SVC mode
66+
PUSH {R0-R3, R12, LR} // Save APCS corruptible registers
67+
68+
MOV R3, SP // Move SP into R3
69+
AND R3, R3, #4 // Get stack adjustment to ensure 8-byte alignment
70+
SUB SP, SP, R3 // Adjust stack
71+
PUSH {R3, R4} // Store stack adjustment(R3) and user data(R4)
72+
73+
BLX IRQ_GetActiveIRQ // Retrieve interrupt ID into R0
74+
MOV R4, R0 // Move interrupt ID to R4
75+
76+
BLX IRQ_GetHandler // Retrieve interrupt handler address for current ID
77+
CMP R0, #0 // Check if handler address is 0
78+
BEQ IRQ_End // If 0, end interrupt and return
79+
80+
CPSIE i // Re-enable interrupts
81+
BLX R0 // Call IRQ handler
82+
CPSID i // Disable interrupts
83+
84+
IRQ_End:
85+
MOV R0, R4 // Move interrupt ID to R0
86+
BLX IRQ_EndOfInterrupt // Signal end of interrupt
87+
88+
POP {R3, R4} // Restore stack adjustment(R3) and user data(R4)
89+
ADD SP, SP, R3 // Unadjust stack
90+
91+
POP {R0-R3, R12, LR} // Restore stacked APCS registers
92+
RFEFD SP! // Return from IRQ handler
93+
94+
.fnend
95+
.size IRQ_Handler, .-IRQ_Handler
96+
97+
.end

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