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Merge pull request #4163 from adustm/STM_aes_l486rg
STM32L486RG/mbedtls: add aes hw acceleration
2 parents 036778b + e2c96e9 commit dea489e

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3 files changed

+99
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‎features/mbedtls/targets/TARGET_STM/TARGET_STM32L4/TARGET_NUCLEO_L486RG/mbedtls_device.h

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
/*
2+
* mbedtls_device.h
3+
*******************************************************************************
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* Copyright (c) 2017, STMicroelectronics
5+
* SPDX-License-Identifier: Apache-2.0
6+
*
7+
* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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*/
20+
#ifndef MBEDTLS_DEVICE_H
21+
#define MBEDTLS_DEVICE_H
22+
23+
#define MBEDTLS_AES_ALT
24+
25+
#endif /* MBEDTLS_DEVICE_H */

‎features/mbedtls/targets/TARGET_STM/aes_alt.c

Lines changed: 73 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -23,22 +23,34 @@
2323

2424
#if defined(MBEDTLS_AES_ALT)
2525

26+
#if defined(TARGET_STM32L486xG)
27+
//the following defines are provided to maintain compatibility between STM32 families
28+
#define __HAL_RCC_CRYP_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
29+
#define __HAL_RCC_CRYP_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
30+
#define __HAL_RCC_CRYP_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
31+
#define CRYP AES
32+
#endif
33+
2634
static int aes_set_key( mbedtls_aes_context *ctx, const unsigned char *key, unsigned int keybits )
2735
{
28-
switch( keybits )
29-
{
36+
switch( keybits ) {
3037
case 128:
31-
ctx->hcryp_aes.Init.KeySize = CRYP_KEYSIZE_128B;
32-
memcpy(ctx->aes_key, key, 16);
33-
break;
38+
ctx->hcryp_aes.Init.KeySize = CRYP_KEYSIZE_128B;
39+
memcpy(ctx->aes_key, key, 16);
40+
break;
3441
case 192:
35-
ctx->hcryp_aes.Init.KeySize = CRYP_KEYSIZE_192B;
36-
memcpy(ctx->aes_key, key, 24);
37-
break;
42+
#if defined (TARGET_STM32L486xG)
43+
return(MBEDTLS_ERR_AES_INVALID_KEY_LENGTH);
44+
#else
45+
ctx->hcryp_aes.Init.KeySize = CRYP_KEYSIZE_192B;
46+
memcpy(ctx->aes_key, key, 24);
47+
break;
48+
#endif
49+
3850
case 256:
39-
ctx->hcryp_aes.Init.KeySize = CRYP_KEYSIZE_256B;
40-
memcpy(ctx->aes_key, key, 32);
41-
break;
51+
ctx->hcryp_aes.Init.KeySize = CRYP_KEYSIZE_256B;
52+
memcpy(ctx->aes_key, key, 32);
53+
break;
4254
default : return( MBEDTLS_ERR_AES_INVALID_KEY_LENGTH );
4355
}
4456

@@ -52,6 +64,9 @@ static int aes_set_key( mbedtls_aes_context *ctx, const unsigned char *key, unsi
5264
__HAL_RCC_CRYP_CLK_ENABLE();
5365

5466
ctx->hcryp_aes.Init.pKey = ctx->aes_key;
67+
#if defined (TARGET_STM32L486xG)
68+
ctx->hcryp_aes.Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
69+
#endif
5570
if (HAL_CRYP_Init(&ctx->hcryp_aes) == HAL_ERROR)
5671
return (HAL_ERROR);
5772

@@ -62,7 +77,8 @@ static int aes_set_key( mbedtls_aes_context *ctx, const unsigned char *key, unsi
6277
}
6378

6479
/* Implementation that should never be optimized out by the compiler */
65-
static void mbedtls_zeroize( void *v, size_t n ) {
80+
static void mbedtls_zeroize( void *v, size_t n )
81+
{
6682
volatile unsigned char *p = (unsigned char*)v; while( n-- ) *p++ = 0;
6783
}
6884

@@ -114,14 +130,11 @@ int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx,
114130
/* allow multi-instance of CRYP use: restore context for CRYP hw module */
115131
ctx->hcryp_aes.Instance->CR = ctx->ctx_save_cr;
116132

117-
if(mode == MBEDTLS_AES_DECRYPT) /* AES decryption */
118-
{
133+
if(mode == MBEDTLS_AES_DECRYPT) { /* AES decryption */
119134
ctx->hcryp_aes.Init.DataType = CRYP_DATATYPE_8B;
120135
ctx->hcryp_aes.Init.pKey = ctx->aes_key;
121136
mbedtls_aes_decrypt( ctx, input, output );
122-
}
123-
else /* AES encryption */
124-
{
137+
} else { /* AES encryption */
125138
ctx->hcryp_aes.Init.DataType = CRYP_DATATYPE_8B;
126139
ctx->hcryp_aes.Init.pKey = ctx->aes_key;
127140
mbedtls_aes_encrypt( ctx, input, output );
@@ -133,6 +146,31 @@ int mbedtls_aes_crypt_ecb( mbedtls_aes_context *ctx,
133146
}
134147

135148
#if defined(MBEDTLS_CIPHER_MODE_CBC)
149+
#if defined (TARGET_STM32L486xG)
150+
static int st_hal_cryp_cbc( mbedtls_aes_context *ctx, uint32_t opmode, size_t length,
151+
unsigned char iv[16], uint8_t *input, uint8_t *output)
152+
{
153+
int status = 0;
154+
ctx->hcryp_aes.Init.pInitVect = &iv[0]; // used in process, not in the init
155+
if ((ctx->hcryp_aes.Init.OperatingMode != opmode) || \
156+
(ctx->hcryp_aes.Init.ChainingMode != CRYP_CHAINMODE_AES_CBC) || \
157+
(ctx->hcryp_aes.Init.KeyWriteFlag != CRYP_KEY_WRITE_ENABLE)) {
158+
159+
/* Re-initialize AES IP with proper parameters */
160+
if (HAL_CRYP_DeInit(&ctx->hcryp_aes) != HAL_OK)
161+
return HAL_ERROR;
162+
ctx->hcryp_aes.Init.OperatingMode = opmode;
163+
ctx->hcryp_aes.Init.ChainingMode = CRYP_CHAINMODE_AES_CBC;
164+
ctx->hcryp_aes.Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
165+
if (HAL_CRYP_Init(&ctx->hcryp_aes) != HAL_OK)
166+
return HAL_ERROR;
167+
}
168+
169+
status = HAL_CRYPEx_AES(&ctx->hcryp_aes, input, length, output, 10);
170+
171+
return status;
172+
}
173+
#endif /* TARGET_STM32L486xG */
136174

137175
int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx,
138176
int mode,
@@ -141,22 +179,24 @@ int mbedtls_aes_crypt_cbc( mbedtls_aes_context *ctx,
141179
const unsigned char *input,
142180
unsigned char *output )
143181
{
144-
int status=0;
182+
int status = 0;
145183
if( length % 16 )
146184
return( MBEDTLS_ERR_AES_INVALID_INPUT_LENGTH );
147-
148-
if( mode == MBEDTLS_AES_DECRYPT )
149-
{
150-
ctx->hcryp_aes.Init.pInitVect = &iv[0]; // used in process, not in the init
151-
152-
status = HAL_CRYP_AESCBC_Decrypt(&ctx->hcryp_aes, (uint8_t *)input, length, (uint8_t *)output, 10);
185+
#if defined (TARGET_STM32L486xG)
186+
if( mode == MBEDTLS_AES_DECRYPT ) {
187+
status = st_hal_cryp_cbc(ctx, CRYP_ALGOMODE_KEYDERIVATION_DECRYPT, length, iv, (uint8_t *)input, (uint8_t *)output);
188+
} else {
189+
status = st_hal_cryp_cbc(ctx, CRYP_ALGOMODE_ENCRYPT, length, iv, (uint8_t *)input, (uint8_t *)output);
153190
}
154-
else
155-
{
156-
ctx->hcryp_aes.Init.pInitVect = &iv[0]; // used in process, not in the init
157-
191+
#else
192+
ctx->hcryp_aes.Init.pInitVect = &iv[0];
193+
194+
if( mode == MBEDTLS_AES_DECRYPT ) {
195+
status = HAL_CRYP_AESCBC_Decrypt(&ctx->hcryp_aes, (uint8_t *)input, length, (uint8_t *)output, 10);
196+
} else {
158197
status = HAL_CRYP_AESCBC_Encrypt(&ctx->hcryp_aes, (uint8_t *)input, length, (uint8_t *)output, 10);
159198
}
199+
#endif
160200
return( status );
161201
}
162202
#endif /* MBEDTLS_CIPHER_MODE_CBC */
@@ -173,10 +213,8 @@ int mbedtls_aes_crypt_cfb128( mbedtls_aes_context *ctx,
173213
int c;
174214
size_t n = *iv_off;
175215

176-
if( mode == MBEDTLS_AES_DECRYPT )
177-
{
178-
while( length-- )
179-
{
216+
if( mode == MBEDTLS_AES_DECRYPT ) {
217+
while( length-- ) {
180218
if( n == 0 )
181219
mbedtls_aes_crypt_ecb( ctx, MBEDTLS_AES_ENCRYPT, iv, iv );
182220

@@ -186,11 +224,8 @@ int mbedtls_aes_crypt_cfb128( mbedtls_aes_context *ctx,
186224

187225
n = ( n + 1 ) & 0x0F;
188226
}
189-
}
190-
else
191-
{
192-
while( length-- )
193-
{
227+
} else {
228+
while( length-- ) {
194229
if( n == 0 )
195230
mbedtls_aes_crypt_ecb( ctx, MBEDTLS_AES_ENCRYPT, iv, iv );
196231

@@ -216,8 +251,7 @@ int mbedtls_aes_crypt_cfb8( mbedtls_aes_context *ctx,
216251
unsigned char c;
217252
unsigned char ov[17];
218253

219-
while( length-- )
220-
{
254+
while( length-- ) {
221255
memcpy( ov, iv, 16 );
222256
mbedtls_aes_crypt_ecb( ctx, MBEDTLS_AES_ENCRYPT, iv, iv );
223257

‎targets/targets.json

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1190,7 +1190,7 @@
11901190
"core": "Cortex-M4F",
11911191
"extra_labels_add": ["STM32L4", "STM32L486RG", "STM32L486xG"],
11921192
"detect_code": ["0827"],
1193-
"macros_add": ["USBHOST_OTHER"],
1193+
"macros_add": ["USBHOST_OTHER", "MBEDTLS_CONFIG_HW_SUPPORT"],
11941194
"device_has_add": ["ANALOGOUT", "CAN", "LOWPOWERTIMER", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
11951195
"release_versions": ["2", "5"],
11961196
"device_name": "STM32L486RG"

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