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Merge pull request #4063 from LMESTM/17q2_L4_bootloader
17q2 l4 bootloader
2 parents 9b37e52 + 2b52e32 commit df11d57

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9 files changed

+85
-12
lines changed

9 files changed

+85
-12
lines changed

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_DISCO_L476VG/system_stm32l4xx.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -84,6 +84,7 @@
8484

8585
#include "stm32l4xx.h"
8686
#include "hal_tick.h"
87+
#include "nvic_addr.h"
8788

8889
#if !defined (HSE_VALUE)
8990
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
@@ -215,7 +216,7 @@ void SystemInit(void)
215216
#ifdef VECT_TAB_SRAM
216217
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
217218
#else
218-
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
219+
SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
219220
#endif
220221

221222
/* Configure the Cube driver */

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/TARGET_NUCLEO_L476RG/system_stm32l4xx.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -84,6 +84,7 @@
8484

8585
#include "stm32l4xx.h"
8686
#include "hal_tick.h"
87+
#include "nvic_addr.h"
8788

8889
#if !defined (HSE_VALUE)
8990
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
@@ -215,7 +216,7 @@ void SystemInit(void)
215216
#ifdef VECT_TAB_SRAM
216217
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
217218
#else
218-
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
219+
SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS;; /* Vector Table Relocation in Internal FLASH */
219220
#endif
220221

221222
/* Configure the Cube driver */

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_MICRO/stm32l476xx.sct

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
#! armcc -E
12
; Scatter-Loading Description File
23
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
34
; Copyright (c) 2015, STMicroelectronics
@@ -27,10 +28,18 @@
2728
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2829
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2930

31+
#if !defined(MBED_APP_START)
32+
#define MBED_APP_START 0x08000000
33+
#endif
34+
35+
#if !defined(MBED_APP_SIZE)
36+
#define MBED_APP_SIZE 0x200000
37+
#endif
38+
3039
; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
31-
LR_IROM1 0x08000000 0x100000 { ; load region size_region
40+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
3241

33-
ER_IROM1 0x08000000 0x100000 { ; load address = execution address
42+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
3443
*.o (RESET, +First)
3544
*(InRoot$$Sections)
3645
.ANY (+RO)

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_STD/stm32l476xx.sct

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
#! armcc -E
12
; Scatter-Loading Description File
23
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
34
; Copyright (c) 2015, STMicroelectronics
@@ -27,10 +28,18 @@
2728
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2829
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2930

31+
#if !defined(MBED_APP_START)
32+
#define MBED_APP_START 0x08000000
33+
#endif
34+
35+
#if !defined(MBED_APP_SIZE)
36+
#define MBED_APP_SIZE 0x200000
37+
#endif
38+
3039
; 1MB FLASH (0x100000) + 128KB SRAM (0x20000)
31-
LR_IROM1 0x08000000 0x100000 { ; load region size_region
40+
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
3241

33-
ER_IROM1 0x08000000 0x100000 { ; load address = execution address
42+
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
3443
*.o (RESET, +First)
3544
*(InRoot$$Sections)
3645
.ANY (+RO)

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_GCC_ARM/STM32L476XX.ld

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,16 @@
1+
#if !defined(MBED_APP_START)
2+
#define MBED_APP_START 0x08000000
3+
#endif
4+
5+
#if !defined(MBED_APP_SIZE)
6+
#define MBED_APP_SIZE 2048k
7+
#endif
8+
19
/* Linker script to configure memory regions. */
210
MEMORY
311
{
4-
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
12+
VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x400
13+
FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x400
514
SRAM2 (rwx) : ORIGIN = 0x10000188, LENGTH = 32k - 0x188
615
SRAM1 (rwx) : ORIGIN = 0x20000000, LENGTH = 96k
716
}

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_IAR/stm32l476xx.icf

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,10 @@
1+
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
2+
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x200000; }
3+
14
/* [ROM = 1024kb = 0x100000] */
2-
define symbol __intvec_start__ = 0x08000000;
3-
define symbol __region_ROM_start__ = 0x08000000;
4-
define symbol __region_ROM_end__ = 0x080FFFFF;
5+
define symbol __intvec_start__ = MBED_APP_START;
6+
define symbol __region_ROM_start__ = MBED_APP_START;
7+
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
58

69
/* [RAM = 96kb + 32kb = 0x20000] */
710
/* Vector table dynamic copy: Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM */

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/cmsis_nvic.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,9 +29,9 @@
2929
*******************************************************************************
3030
*/
3131
#include "cmsis_nvic.h"
32+
#include "nvic_addr.h"
3233

3334
#define NVIC_RAM_VECTOR_ADDRESS (0x10000000) // Vectors positioned at start of SRAM2
34-
#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000) // Initial vector position in flash
3535

3636
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
3737
uint32_t *vectors = (uint32_t *)SCB->VTOR;

‎targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/nvic_addr.h

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2017-2017 ARM Limited
3+
*
4+
* Licensed under the Apache License, Version 2.0 (the "License");
5+
* you may not use this file except in compliance with the License.
6+
* You may obtain a copy of the License at
7+
*
8+
* http://www.apache.org/licenses/LICENSE-2.0
9+
*
10+
* Unless required by applicable law or agreed to in writing, software
11+
* distributed under the License is distributed on an "AS IS" BASIS,
12+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+
* See the License for the specific language governing permissions and
14+
* limitations under the License.
15+
*/
16+
#ifndef NVIC_ADDR_H
17+
#define NVIC_ADDR_H
18+
19+
#ifdef __cplusplus
20+
extern "C" {
21+
#endif
22+
23+
#if defined(__ICCARM__)
24+
#pragma section=".intvec"
25+
#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)__section_begin(".intvec"))
26+
#elif defined(__CC_ARM)
27+
extern uint32_t Load$$LR$$LR_IROM1$$Base[];
28+
#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)Load$$LR$$LR_IROM1$$Base)
29+
#elif defined(__GNUC__)
30+
extern uint32_t g_pfnVectors[];
31+
#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)g_pfnVectors)
32+
#else
33+
#error "Flash vector address not set for this toolchain"
34+
#endif
35+
36+
#ifdef __cplusplus
37+
}
38+
#endif
39+
40+
#endif

‎targets/targets.json

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1079,7 +1079,8 @@
10791079
"macros": ["TRANSACTION_QUEUE_SIZE_SPI=2","USBHOST_OTHER"],
10801080
"device_has": ["ANALOGIN", "ANALOGOUT", "CAN", "I2C", "I2CSLAVE", "I2C_ASYNCH", "INTERRUPTIN", "LOWPOWERTIMER", "PORTIN", "PORTINOUT", "PORTOUT", "PWMOUT", "RTC", "SERIAL", "SERIAL_ASYNCH", "SERIAL_FC", "SLEEP", "SPI", "SPISLAVE", "SPI_ASYNCH", "STDIO_MESSAGES", "TRNG", "FLASH"],
10811081
"release_versions": ["2", "5"],
1082-
"device_name": "STM32L476RG"
1082+
"device_name": "STM32L476RG",
1083+
"bootloader_supported": true
10831084
},
10841085
"NUCLEO_L486RG": {
10851086
"supported_form_factors": ["ARDUINO", "MORPHO"],

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