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Merge pull request #1 from mbedmicro/master
Bring mbed up to date
2 parents 155a897 + 16156f5 commit e06fc12

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‎libraries/USBDevice/USBDevice/USBHAL_STM32F4.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -307,7 +307,13 @@ void USBHAL::_usbisr(void) {
307307

308308

309309
void USBHAL::usbisr(void) {
310+
if (OTG_FS->GREGS.GINTSTS & (1 << 11)) { // USB Suspend
311+
suspendStateChanged(1);
312+
};
313+
310314
if (OTG_FS->GREGS.GINTSTS & (1 << 12)) { // USB Reset
315+
suspendStateChanged(0);
316+
311317
// Set SNAK bits
312318
OTG_FS->OUTEP_REGS[0].DOEPCTL |= (1 << 27);
313319
OTG_FS->OUTEP_REGS[1].DOEPCTL |= (1 << 27);

‎libraries/mbed/api/SerialBase.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -105,6 +105,8 @@ class SerialBase {
105105
if((mptr != NULL) && (tptr != NULL)) {
106106
_irq[type].attach(tptr, mptr);
107107
serial_irq_set(&_serial, (SerialIrq)type, 1);
108+
} else {
109+
serial_irq_set(&_serial, (SerialIrq)type, 0);
108110
}
109111
}
110112

‎libraries/mbed/api/mbed.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616
#ifndef MBED_H
1717
#define MBED_H
1818

19-
#define MBED_LIBRARY_VERSION 97
19+
#define MBED_LIBRARY_VERSION 98
2020

2121
#include "platform.h"
2222

‎libraries/mbed/hal/can_api.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -45,8 +45,8 @@ typedef enum {
4545
MODE_RESET,
4646
MODE_NORMAL,
4747
MODE_SILENT,
48-
MODE_TEST_GLOBAL,
4948
MODE_TEST_LOCAL,
49+
MODE_TEST_GLOBAL,
5050
MODE_TEST_SILENT
5151
} CanMode;
5252

‎libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_16K/nRF51822.sct

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -12,13 +12,13 @@
1212
;
1313
;WITH SOFTDEVICE:
1414

15-
LR_IROM1 0x18000 0x0028000 {
16-
ER_IROM1 0x18000 0x0028000 {
15+
LR_IROM1 0x1C000 0x0024000 {
16+
ER_IROM1 0x1C000 0x0024000 {
1717
*.o (RESET, +First)
1818
*(InRoot$$Sections)
1919
.ANY (+RO)
2020
}
21-
RW_IRAM1 0x20002000 0x00002000 {
21+
RW_IRAM1 0x20002800 0x00001800 {
2222
.ANY (+RW +ZI)
2323
}
2424
}

‎libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_ARM_STD/TARGET_MCU_NORDIC_32K/nRF51822.sct

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -12,13 +12,13 @@
1212
;
1313
;WITH SOFTDEVICE:
1414

15-
LR_IROM1 0x18000 0x0028000 {
16-
ER_IROM1 0x18000 0x0028000 {
15+
LR_IROM1 0x1C000 0x0024000 {
16+
ER_IROM1 0x1C000 0x0024000 {
1717
*.o (RESET, +First)
1818
*(InRoot$$Sections)
1919
.ANY (+RO)
2020
}
21-
RW_IRAM1 0x20002000 0x00006000 {
21+
RW_IRAM1 0x20002800 0x00005800 {
2222
.ANY (+RW +ZI)
2323
}
2424
}

‎libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_16K/NRF51822.ld

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22

33
MEMORY
44
{
5-
FLASH (rx) : ORIGIN = 0x00018000, LENGTH = 0x28000
6-
RAM (rwx) : ORIGIN = 0x20002000, LENGTH = 0x2000
5+
FLASH (rx) : ORIGIN = 0x0001C000, LENGTH = 0x24000
6+
RAM (rwx) : ORIGIN = 0x20002800, LENGTH = 0x1800
77
}
88

99
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")

‎libraries/mbed/targets/cmsis/TARGET_NORDIC/TARGET_MCU_NRF51822/TOOLCHAIN_GCC_ARM/TARGET_MCU_NORDIC_32K/NRF51822.ld

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22

33
MEMORY
44
{
5-
FLASH (rx) : ORIGIN = 0x00018000, LENGTH = 0x28000
6-
RAM (rwx) : ORIGIN = 0x20002000, LENGTH = 0x6000
5+
FLASH (rx) : ORIGIN = 0x0001C000, LENGTH = 0x24000
6+
RAM (rwx) : ORIGIN = 0x20002800, LENGTH = 0x5800
77
}
88

99
OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F401VC/TOOLCHAIN_GCC_ARM/startup_stm32f401xc.s

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
******************************************************************************
33
* @file startup_stm32f401xc.s
44
* @author MCD Application Team
5-
* @version V2.1.0
6-
* @date 19-June-2014
5+
* @version V2.3.0
6+
* @date 02-March-2015
77
* @brief STM32F401xCxx Devices vector table for Atollic TrueSTUDIO toolchain.
88
* This module performs:
99
* - Set the initial SP
@@ -16,7 +16,7 @@
1616
******************************************************************************
1717
* @attention
1818
*
19-
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
19+
* <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
2020
*
2121
* Redistribution and use in source and binary forms, with or without modification,
2222
* are permitted provided that the following conditions are met:

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F401VC/stm32f401xe.h renamed to ‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F401VC/stm32f401xc.h

Lines changed: 45 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,10 @@
11
/**
22
******************************************************************************
3-
* @file stm32f401xe.h
3+
* @file stm32f401xc.h
44
* @author MCD Application Team
5-
* @version V2.1.0
6-
* @date 19-June-2014
7-
* @brief CMSIS STM32F401xExx Device Peripheral Access Layer Header File.
5+
* @version V2.3.0
6+
* @date 02-March-2015
7+
* @brief CMSIS STM32F401xCxx Device Peripheral Access Layer Header File.
88
*
99
* This file contains:
1010
* - Data structures and the address mapping for all peripherals
@@ -14,7 +14,7 @@
1414
******************************************************************************
1515
* @attention
1616
*
17-
* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
17+
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
1818
*
1919
* Redistribution and use in source and binary forms, with or without modification,
2020
* are permitted provided that the following conditions are met:
@@ -45,12 +45,12 @@
4545
* @{
4646
*/
4747

48-
/** @addtogroup stm32f401xe
48+
/** @addtogroup stm32f401xc
4949
* @{
5050
*/
5151

52-
#ifndef __STM32F401xE_H
53-
#define __STM32F401xE_H
52+
#ifndef __STM32F401xC_H
53+
#define __STM32F401xC_H
5454

5555
#ifdef __cplusplus
5656
extern "C" {
@@ -290,8 +290,7 @@ typedef struct
290290
__IO uint32_t PUPDR; /*!< GPIO port pull-up/pull-down register, Address offset: 0x0C */
291291
__IO uint32_t IDR; /*!< GPIO port input data register, Address offset: 0x10 */
292292
__IO uint32_t ODR; /*!< GPIO port output data register, Address offset: 0x14 */
293-
__IO uint16_t BSRRL; /*!< GPIO port bit set/reset low register, Address offset: 0x18 */
294-
__IO uint16_t BSRRH; /*!< GPIO port bit set/reset high register, Address offset: 0x1A */
293+
__IO uint32_t BSRR; /*!< GPIO port bit set/reset register, Address offset: 0x18 */
295294
__IO uint32_t LCKR; /*!< GPIO port configuration lock register, Address offset: 0x1C */
296295
__IO uint32_t AFR[2]; /*!< GPIO alternate function registers, Address offset: 0x20-0x24 */
297296
} GPIO_TypeDef;
@@ -536,7 +535,7 @@ typedef struct
536535
__IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */
537536
__IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */
538537
} WWDG_TypeDef;
539-
538+
540539
/**
541540
* @brief __USB_OTG_Core_register
542541
*/
@@ -675,7 +674,7 @@ USB_OTG_HostChannelTypeDef;
675674
#define SRAM3_BB_BASE ((uint32_t)0x22020000) /*!< SRAM3(64 KB) base address in the bit-band region */
676675
#define PERIPH_BB_BASE ((uint32_t)0x42000000) /*!< Peripheral base address in the bit-band region */
677676
#define BKPSRAM_BB_BASE ((uint32_t)0x42024000) /*!< Backup SRAM(4 KB) base address in the bit-band region */
678-
#define FLASH_END ((uint32_t)0x0807FFFF) /*!< FLASH end address */
677+
#define FLASH_END ((uint32_t)0x0803FFFF) /*!< FLASH end address */
679678

680679
/* Legacy defines */
681680
#define SRAM_BASE SRAM1_BASE
@@ -1423,6 +1422,9 @@ USB_OTG_HostChannelTypeDef;
14231422
#define EXTI_IMR_MR17 ((uint32_t)0x00020000) /*!< Interrupt Mask on line 17 */
14241423
#define EXTI_IMR_MR18 ((uint32_t)0x00040000) /*!< Interrupt Mask on line 18 */
14251424
#define EXTI_IMR_MR19 ((uint32_t)0x00080000) /*!< Interrupt Mask on line 19 */
1425+
#define EXTI_IMR_MR20 ((uint32_t)0x00100000) /*!< Interrupt Mask on line 20 */
1426+
#define EXTI_IMR_MR21 ((uint32_t)0x00200000) /*!< Interrupt Mask on line 21 */
1427+
#define EXTI_IMR_MR22 ((uint32_t)0x00400000) /*!< Interrupt Mask on line 22 */
14261428

14271429
/******************* Bit definition for EXTI_EMR register *******************/
14281430
#define EXTI_EMR_MR0 ((uint32_t)0x00000001) /*!< Event Mask on line 0 */
@@ -1445,6 +1447,9 @@ USB_OTG_HostChannelTypeDef;
14451447
#define EXTI_EMR_MR17 ((uint32_t)0x00020000) /*!< Event Mask on line 17 */
14461448
#define EXTI_EMR_MR18 ((uint32_t)0x00040000) /*!< Event Mask on line 18 */
14471449
#define EXTI_EMR_MR19 ((uint32_t)0x00080000) /*!< Event Mask on line 19 */
1450+
#define EXTI_EMR_MR20 ((uint32_t)0x00100000) /*!< Event Mask on line 20 */
1451+
#define EXTI_EMR_MR21 ((uint32_t)0x00200000) /*!< Event Mask on line 21 */
1452+
#define EXTI_EMR_MR22 ((uint32_t)0x00400000) /*!< Event Mask on line 22 */
14481453

14491454
/****************** Bit definition for EXTI_RTSR register *******************/
14501455
#define EXTI_RTSR_TR0 ((uint32_t)0x00000001) /*!< Rising trigger event configuration bit of line 0 */
@@ -1467,6 +1472,9 @@ USB_OTG_HostChannelTypeDef;
14671472
#define EXTI_RTSR_TR17 ((uint32_t)0x00020000) /*!< Rising trigger event configuration bit of line 17 */
14681473
#define EXTI_RTSR_TR18 ((uint32_t)0x00040000) /*!< Rising trigger event configuration bit of line 18 */
14691474
#define EXTI_RTSR_TR19 ((uint32_t)0x00080000) /*!< Rising trigger event configuration bit of line 19 */
1475+
#define EXTI_RTSR_TR20 ((uint32_t)0x00100000) /*!< Rising trigger event configuration bit of line 20 */
1476+
#define EXTI_RTSR_TR21 ((uint32_t)0x00200000) /*!< Rising trigger event configuration bit of line 21 */
1477+
#define EXTI_RTSR_TR22 ((uint32_t)0x00400000) /*!< Rising trigger event configuration bit of line 22 */
14701478

14711479
/****************** Bit definition for EXTI_FTSR register *******************/
14721480
#define EXTI_FTSR_TR0 ((uint32_t)0x00000001) /*!< Falling trigger event configuration bit of line 0 */
@@ -1489,6 +1497,9 @@ USB_OTG_HostChannelTypeDef;
14891497
#define EXTI_FTSR_TR17 ((uint32_t)0x00020000) /*!< Falling trigger event configuration bit of line 17 */
14901498
#define EXTI_FTSR_TR18 ((uint32_t)0x00040000) /*!< Falling trigger event configuration bit of line 18 */
14911499
#define EXTI_FTSR_TR19 ((uint32_t)0x00080000) /*!< Falling trigger event configuration bit of line 19 */
1500+
#define EXTI_FTSR_TR20 ((uint32_t)0x00100000) /*!< Falling trigger event configuration bit of line 20 */
1501+
#define EXTI_FTSR_TR21 ((uint32_t)0x00200000) /*!< Falling trigger event configuration bit of line 21 */
1502+
#define EXTI_FTSR_TR22 ((uint32_t)0x00400000) /*!< Falling trigger event configuration bit of line 22 */
14921503

14931504
/****************** Bit definition for EXTI_SWIER register ******************/
14941505
#define EXTI_SWIER_SWIER0 ((uint32_t)0x00000001) /*!< Software Interrupt on line 0 */
@@ -1511,6 +1522,9 @@ USB_OTG_HostChannelTypeDef;
15111522
#define EXTI_SWIER_SWIER17 ((uint32_t)0x00020000) /*!< Software Interrupt on line 17 */
15121523
#define EXTI_SWIER_SWIER18 ((uint32_t)0x00040000) /*!< Software Interrupt on line 18 */
15131524
#define EXTI_SWIER_SWIER19 ((uint32_t)0x00080000) /*!< Software Interrupt on line 19 */
1525+
#define EXTI_SWIER_SWIER20 ((uint32_t)0x00100000) /*!< Software Interrupt on line 20 */
1526+
#define EXTI_SWIER_SWIER21 ((uint32_t)0x00200000) /*!< Software Interrupt on line 21 */
1527+
#define EXTI_SWIER_SWIER22 ((uint32_t)0x00400000) /*!< Software Interrupt on line 22 */
15141528

15151529
/******************* Bit definition for EXTI_PR register ********************/
15161530
#define EXTI_PR_PR0 ((uint32_t)0x00000001) /*!< Pending bit for line 0 */
@@ -1533,6 +1547,9 @@ USB_OTG_HostChannelTypeDef;
15331547
#define EXTI_PR_PR17 ((uint32_t)0x00020000) /*!< Pending bit for line 17 */
15341548
#define EXTI_PR_PR18 ((uint32_t)0x00040000) /*!< Pending bit for line 18 */
15351549
#define EXTI_PR_PR19 ((uint32_t)0x00080000) /*!< Pending bit for line 19 */
1550+
#define EXTI_PR_PR20 ((uint32_t)0x00100000) /*!< Pending bit for line 20 */
1551+
#define EXTI_PR_PR21 ((uint32_t)0x00200000) /*!< Pending bit for line 21 */
1552+
#define EXTI_PR_PR22 ((uint32_t)0x00400000) /*!< Pending bit for line 22 */
15361553

15371554
/******************************************************************************/
15381555
/* */
@@ -1954,7 +1971,7 @@ USB_OTG_HostChannelTypeDef;
19541971
#define GPIO_BSRR_BR_14 ((uint32_t)0x40000000)
19551972
#define GPIO_BSRR_BR_15 ((uint32_t)0x80000000)
19561973

1957-
/****************** Bit definition for GPIO_LCKR register ********************/
1974+
/****************** Bit definition for GPIO_LCKR register *********************/
19581975
#define GPIO_LCKR_LCK0 ((uint32_t)0x00000001)
19591976
#define GPIO_LCKR_LCK1 ((uint32_t)0x00000002)
19601977
#define GPIO_LCKR_LCK2 ((uint32_t)0x00000004)
@@ -2125,7 +2142,7 @@ USB_OTG_HostChannelTypeDef;
21252142
#define PWR_CR_LPLVDS ((uint32_t)0x00000400) /*!< Low Power Regulator Low Voltage in Deep Sleep mode */
21262143
#define PWR_CR_MRLVDS ((uint32_t)0x00000800) /*!< Main Regulator Low Voltage in Deep Sleep mode */
21272144
#define PWR_CR_ADCDC1 ((uint32_t)0x00002000) /*!< Refer to AN4073 on how to use this bit */
2128-
#define PWR_CR_VOS ((uint32_t)0x0000C000) /*!< VOS[1:0] bits (Regulator voltage scaling output selection) */
2145+
#define PWR_CR_VOS ((uint32_t)0x0000C000) /*!< VOS[1:0] bits (Regulator voltage scaling output selection) */
21292146
#define PWR_CR_VOS_0 ((uint32_t)0x00004000) /*!< Bit 0 */
21302147
#define PWR_CR_VOS_1 ((uint32_t)0x00008000) /*!< Bit 1 */
21312148

@@ -4511,14 +4528,14 @@ USB_OTG_HostChannelTypeDef;
45114528
((INSTANCE) == I2C3))
45124529

45134530
/******************************** I2S Instances *******************************/
4514-
#define IS_I2S_INSTANCE(INSTANCE) (((INSTANCE) == SPI2) || \
4531+
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI2) || \
45154532
((INSTANCE) == SPI3))
45164533

45174534
/*************************** I2S Extended Instances ***************************/
4518-
#define IS_I2S_INSTANCE_EXT(PERIPH) (((INSTANCE) == SPI2) || \
4519-
((INSTANCE) == SPI3) || \
4520-
((INSTANCE) == I2S2ext) || \
4521-
((INSTANCE) == I2S3ext))
4535+
#define IS_I2S_ALL_INSTANCE_EXT(PERIPH) (((INSTANCE) == SPI2) || \
4536+
((INSTANCE) == SPI3) || \
4537+
((INSTANCE) == I2S2ext) || \
4538+
((INSTANCE) == I2S3ext))
45224539

45234540
/****************************** RTC Instances *********************************/
45244541
#define IS_RTC_ALL_INSTANCE(INSTANCE) ((INSTANCE) == RTC)
@@ -4728,6 +4745,14 @@ USB_OTG_HostChannelTypeDef;
47284745
/****************************** WWDG Instances ********************************/
47294746
#define IS_WWDG_ALL_INSTANCE(INSTANCE) ((INSTANCE) == WWDG)
47304747

4748+
/****************************** SDIO Instances ********************************/
4749+
#define IS_SDIO_ALL_INSTANCE(INSTANCE) ((INSTANCE) == SDIO)
4750+
4751+
/****************************** USB Exported Constants ************************/
4752+
#define USB_OTG_FS_HOST_MAX_CHANNEL_NBR 8
4753+
#define USB_OTG_FS_MAX_IN_ENDPOINTS 4 /* Including EP0 */
4754+
#define USB_OTG_FS_MAX_OUT_ENDPOINTS 4 /* Including EP0 */
4755+
#define USB_OTG_FS_TOTAL_FIFO_SIZE 1280 /* in Bytes */
47314756

47324757
/**
47334758
* @}
@@ -4745,7 +4770,7 @@ USB_OTG_HostChannelTypeDef;
47454770
}
47464771
#endif /* __cplusplus */
47474772

4748-
#endif /* __STM32F401xE_H */
4773+
#endif /* __STM32F401xC_H */
47494774

47504775

47514776

‎libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_DISCO_F401VC/stm32f4xx.h

Lines changed: 21 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -2,8 +2,8 @@
22
******************************************************************************
33
* @file stm32f4xx.h
44
* @author MCD Application Team
5-
* @version V2.1.0
6-
* @date 19-June-2014
5+
* @version V2.3.0
6+
* @date 02-March-2015
77
* @brief CMSIS STM32F4xx Device Peripheral Access Layer Header File.
88
*
99
* The file is the unique include file that the application programmer
@@ -18,7 +18,7 @@
1818
******************************************************************************
1919
* @attention
2020
*
21-
* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
21+
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
2222
*
2323
* Redistribution and use in source and binary forms, with or without modification,
2424
* are permitted provided that the following conditions are met:
@@ -63,13 +63,20 @@
6363
/** @addtogroup Library_configuration_section
6464
* @{
6565
*/
66+
67+
/**
68+
* @brief STM32 Family
69+
*/
70+
#if !defined (STM32F4)
71+
#define STM32F4
72+
#endif /* STM32F4 */
6673

6774
/* Uncomment the line below according to the target STM32 device used in your
6875
application
6976
*/
7077
#if !defined (STM32F405xx) && !defined (STM32F415xx) && !defined (STM32F407xx) && !defined (STM32F417xx) && \
7178
!defined (STM32F427xx) && !defined (STM32F437xx) && !defined (STM32F429xx) && !defined (STM32F439xx) && \
72-
!defined (STM32F401xC) && !defined (STM32F401xE) && !defined (STM32F411xE)
79+
!defined (STM32F401xC) && !defined (STM32F401xE) && !defined (STM32F411xE) && !defined (STM32F446xx)
7380
/* #define STM32F405xx */ /*!< STM32F405RG, STM32F405VG and STM32F405ZG Devices */
7481
/* #define STM32F415xx */ /*!< STM32F415RG, STM32F415VG and STM32F415ZG Devices */
7582
/* #define STM32F407xx */ /*!< STM32F407VG, STM32F407VE, STM32F407ZG, STM32F407ZE, STM32F407IG and STM32F407IE Devices */
@@ -80,9 +87,11 @@
8087
STM32F439NI, STM32F429IG and STM32F429II Devices */
8188
/* #define STM32F439xx */ /*!< STM32F439VG, STM32F439VI, STM32F439ZG, STM32F439ZI, STM32F439BG, STM32F439BI, STM32F439NG,
8289
STM32F439NI, STM32F439IG and STM32F439II Devices */
83-
/* #define STM32F401xC */ /*!< STM32F401CB, STM32F401CC, STM32F401RB, STM32F401RC, STM32F401VB and STM32F401VC Devices */
84-
#define STM32F401xE /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */
85-
/* #define STM32F411xE */ /*!< STM32F411CD, STM32F411RD, STM32F411VD, STM32F411CE, STM32F411RE and STM32F411VE Devices */
90+
#define STM32F401xC /*!< STM32F401CB, STM32F401CC, STM32F401RB, STM32F401RC, STM32F401VB and STM32F401VC Devices */
91+
/* #define STM32F401xE */ /*!< STM32F401CD, STM32F401RD, STM32F401VD, STM32F401CE, STM32F401RE and STM32F401VE Devices */
92+
/* #define STM32F411xE */ /*!< STM32F411CD, STM32F411RD, STM32F411VD, STM32F411CE, STM32F411RE and STM32F411VE Devices */
93+
/* #define STM32F446xx */ /*!< STM32F446MC, STM32F446ME, STM32F446RC, STM32F446RE, STM32F446VC, STM32F446VE, STM32F446ZC,
94+
and STM32F446ZE Devices */
8695
#endif
8796

8897
/* Tip: To avoid modifying this file each time you need to switch between these
@@ -94,14 +103,14 @@
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In this case, these drivers will not be included and the application code will
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be based on direct access to peripherals registers
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*/
97-
#define USE_HAL_DRIVER
106+
#define USE_HAL_DRIVER
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#endif /* USE_HAL_DRIVER */
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/**
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* @brief CMSIS Device version number V2.1.0
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* @brief CMSIS Device version number V2.3.0
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*/
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#define __STM32F4xx_CMSIS_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
104-
#define __STM32F4xx_CMSIS_DEVICE_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
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#define __STM32F4xx_CMSIS_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
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#define __STM32F4xx_CMSIS_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
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#define __STM32F4xx_CMSIS_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
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#define __STM32F4xx_CMSIS_DEVICE_VERSION ((__STM32F4xx_CMSIS_DEVICE_VERSION_MAIN << 24)\
@@ -139,6 +148,8 @@
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#include "stm32f401xe.h"
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#elif defined(STM32F411xE)
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#include "stm32f411xe.h"
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#elif defined(STM32F446xx)
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#include "stm32f446xx.h"
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#else
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#error "Please select first the target STM32F4xx device used in your application (in stm32f4xx.h file)"
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#endif

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