[NANO130] Fix issues in Greentea test

Author: ccchang12

TESTS/mbedmicro-rtos-mbed/semaphore/main.cpp

@@ -41,6 +41,8 @@
     #define STACK_SIZE 768
 #elif defined(TARGET_XDOT_L151CC)
     #define STACK_SIZE 1024
+#elif defined(TARGET_NANO130KE3BN) && defined(TOOLCHAIN_IAR)
+    #define STACK_SIZE DEFAULT_STACK_SIZE/2
 #else
     #define STACK_SIZE DEFAULT_STACK_SIZE
 #endif

rtos/rtx/TARGET_CORTEX_M/RTX_CM_lib.h

@@ -361,6 +361,8 @@ extern void pre_main (void);
 static uint32_t thread_stack_main[DEFAULT_STACK_SIZE / sizeof(uint32_t)];
 #elif defined(TARGET_XDOT_L151CC)
 static uint32_t thread_stack_main[DEFAULT_STACK_SIZE * 6 / sizeof(uint32_t)];
+#elif defined(TARGET_NANO130KE3BN) && !defined(TOOLCHAIN_ARM_MICRO)
+static uint32_t thread_stack_main[DEFAULT_STACK_SIZE / sizeof(uint32_t)];
 #else
 static uint32_t thread_stack_main[DEFAULT_STACK_SIZE * 2 / sizeof(uint32_t)];
 #endif

targets/TARGET_NUVOTON/TARGET_NANO100/TARGET_NUMAKER_PFM_NANO130/objects.h

@@ -31,6 +31,7 @@ struct gpio_irq_s {
     PinName     pin;
     uint32_t    irq_handler;
     uint32_t    irq_id;
+    struct gpio_irq_s   *next;
 };
 
 struct port_s {

targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM_MICRO/NANO130.sct

@@ -13,9 +13,6 @@ LR_IROM1 0x00000000 {
   ARM_LIB_STACK 0x20000000 EMPTY 0x800 {
   }
 
-  ;ER_IRAMVEC 0x20000800 EMPTY (4*(16 + 32)) {  ; Reserve for vectors
-  ;}
-  
   RW_IRAM1 AlignExpr(+0, 16) {  ; 16 byte-aligned
    .ANY (+RW +ZI)
   }

targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM_STD/NANO130.sct

@@ -13,9 +13,6 @@ LR_IROM1 0x00000000 {
   ARM_LIB_STACK 0x20000000 EMPTY 0x800 {
   }
 
-  ;ER_IRAMVEC 0x20000800 EMPTY (4*(16 + 32)) {  ; Reserve for vectors
-  ;}
-  
   RW_IRAM1 AlignExpr(+0, 16) {  ; 16 byte-aligned
    .ANY (+RW +ZI)
   }

targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/NANO130.ld

@@ -140,15 +140,6 @@ SECTIONS
     __StackLimit = ADDR(.stack);
     PROVIDE(__stack = __StackTop);
 
-    /* Relocate vector table in SRAM */
-/*    .isr_vector.reloc (NOLOAD) :
-    {
-        . = ALIGN(1 << LOG2CEIL(__vector_size));
-        PROVIDE(__start_vector_table__ = .);
-        . += __vector_size;
-        PROVIDE(__end_vector_table__ = .);
-    } > RAM_INTERN
-*/    
     .data :
     {
         PROVIDE( __etext = LOADADDR(.data) );

targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_GCC_ARM/nano100_retarget.c

@@ -16,7 +16,7 @@
 extern uint32_t __mbed_sbrk_start;
 extern uint32_t __mbed_krbs_start;
 
-#define NU_HEAP_ALIGN       32
+#define NU_HEAP_ALIGN       4
 
 /**
  * The default implementation of _sbrk() (in common/retarget.cpp) for GCC_ARM requires one-region model (heap and stack share one region), which doesn't

targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf

@@ -5,9 +5,9 @@
 define symbol __ICFEDIT_intvec_start__ = 0x00000000;
 /*-Memory Regions-*/
 define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x00020000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x00020000 - 1;
 define symbol __ICFEDIT_region_IRAM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_IRAM_end__   = 0x20004000;
+define symbol __ICFEDIT_region_IRAM_end__   = 0x20004000 - 1;
 /*-Sizes-*/
 define symbol __ICFEDIT_size_cstack__ = 0x800;
 define symbol __ICFEDIT_size_heap__   = 0x1800;

targets/TARGET_NUVOTON/TARGET_NANO100/gpio_irq_api.c

@@ -27,7 +27,7 @@
 #define NU_MAX_PIN_PER_PORT     16
 
 struct nu_gpio_irq_var {
-    gpio_irq_t *    obj_arr[NU_MAX_PIN_PER_PORT];
+    gpio_irq_t *    obj_arr;
     //IRQn_Type       irq_n;
     uint32_t       gpio_n;
     void            (*vec)(void);
@@ -39,12 +39,12 @@ static void gpio_irq(struct nu_gpio_irq_var *var);
 
 //EINT0_IRQn
 static struct nu_gpio_irq_var gpio_irq_var_arr[] = {
-    {{NULL}, 0, GPABC_IRQHandler},
-    {{NULL}, 1, GPABC_IRQHandler},
-    {{NULL}, 2, GPABC_IRQHandler},
-    {{NULL}, 3, GPDEF_IRQHandler},
-    {{NULL}, 4, GPDEF_IRQHandler},
-    {{NULL}, 5, GPDEF_IRQHandler}
+    {NULL, 0, GPABC_IRQHandler},
+    {NULL, 1, GPABC_IRQHandler},
+    {NULL, 2, GPABC_IRQHandler},
+    {NULL, 3, GPDEF_IRQHandler},
+    {NULL, 4, GPDEF_IRQHandler},
+    {NULL, 5, GPDEF_IRQHandler}
 };
 
 #define NU_MAX_PORT     (sizeof (gpio_irq_var_arr) / sizeof (gpio_irq_var_arr[0]))
@@ -83,6 +83,7 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
     obj->pin = pin;
     obj->irq_handler = (uint32_t) handler;
     obj->irq_id = id;
+    obj->next = NULL;
 
     GPIO_T *gpio_base = NU_PORT_BASE(port_index);
     //gpio_set(pin);
@@ -120,7 +121,15 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
 
     struct nu_gpio_irq_var *var = gpio_irq_var_arr + port_index;
 
-    var->obj_arr[pin_index] = obj;
+    // Add obj to linked list
+    gpio_irq_t *cur_obj = var->obj_arr;
+    if (cur_obj == NULL) {
+        cur_obj = obj;
+    } else {
+        while (cur_obj->next != NULL)
+            cur_obj = cur_obj->next;
+        cur_obj->next = obj;
+    }
 
     // NOTE: InterruptIn requires IRQ enabled by default.
     gpio_irq_enable(obj);
@@ -138,7 +147,21 @@ void gpio_irq_free(gpio_irq_t *obj)
     NU_PORT_BASE(port_index)->IER = 0;
 
     MBED_ASSERT(pin_index < NU_MAX_PIN_PER_PORT);
-    var->obj_arr[pin_index] = NULL;
+    gpio_irq_t *pre_obj = var->obj_arr;
+    if (pre_obj->pin == obj->pin)
+        var->obj_arr = pre_obj->next;
+    else {
+        while (pre_obj->next) {
+            gpio_irq_t *cur_obj = pre_obj->next;
+            if (cur_obj->pin == obj->pin) {
+                pre_obj->next = cur_obj->next;
+                break;
+            }
+            pre_obj = pre_obj->next;
+        }
+        if (pre_obj->next == NULL)
+            error("cannot find obj in gpio_irq_free()");
+    }
 }
 
 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
@@ -170,7 +193,6 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
 
 void gpio_irq_enable(gpio_irq_t *obj)
 {
-    //uint32_t pin_index = NU_PINNAME_TO_PIN(obj->pin);
     uint32_t port_index = NU_PINNAME_TO_PORT(obj->pin);
     struct nu_gpio_irq_var *var = gpio_irq_var_arr + port_index;
 
@@ -180,7 +202,6 @@ void gpio_irq_enable(gpio_irq_t *obj)
 
 void gpio_irq_disable(gpio_irq_t *obj)
 {
-    //uint32_t pin_index = NU_PINNAME_TO_PIN(obj->pin);
     uint32_t port_index = NU_PINNAME_TO_PORT(obj->pin);
     struct nu_gpio_irq_var *var = gpio_irq_var_arr + port_index;
 
@@ -215,18 +236,26 @@ static void gpio_irq(struct nu_gpio_irq_var *var)
     uint32_t ier = gpio_base->IER;
     while (isrc) {
         int pin_index = nu_ctz(isrc);
-        gpio_irq_t *obj = var->obj_arr[pin_index];
+        PinName pin = port_pin(port_index, pin_index);
+        gpio_irq_t *obj = var->obj_arr;
+        while (obj) {
+            if (obj->pin == pin)
+                break;
+            obj = obj->next;
+        }
+        if (obj == NULL)
+            error("cannot find obj in gpio_irq()");
         if (ier & (GPIO_INT_RISING << pin_index)) {
             if (GPIO_PIN_ADDR(port_index, pin_index)) {
-                if (obj->irq_handler) {
+                if (obj && obj->irq_handler) {
                     ((gpio_irq_handler) obj->irq_handler)(obj->irq_id, IRQ_RISE);
                 }
             }
         }
 
         if (ier & (GPIO_INT_FALLING << pin_index)) {   
             if (! GPIO_PIN_ADDR(port_index, pin_index)) {
-                if (obj->irq_handler) {
+                if (obj && obj->irq_handler) {
                     ((gpio_irq_handler) obj->irq_handler)(obj->irq_id, IRQ_FALL);
                 }
             }

targets/TARGET_NUVOTON/mbed_rtx.h

@@ -92,10 +92,10 @@
 #elif defined(TARGET_NUMAKER_PFM_NANO130)
 
 #ifndef OS_TASKCNT
-#define OS_TASKCNT              14
+#define OS_TASKCNT              6
 #endif
 #ifndef OS_MAINSTKSIZE
-#define OS_MAINSTKSIZE          256
+#define OS_MAINSTKSIZE          128
 #endif
 #ifndef OS_CLOCK
 #define OS_CLOCK                42000000

targets/targets.json

@@ -2628,7 +2628,7 @@
     "NUMAKER_PFM_NANO130": {
         "core": "Cortex-M0",
         "default_toolchain": "ARM",
-        "extra_labels": ["NUVOTON", "NANO100", "NUMAKER_PFM_NANO130"],
+        "extra_labels": ["NUVOTON", "NANO100", "NANO130KE3BN"],
         "is_disk_virtual": true,
         "supported_toolchains": ["ARM", "uARM", "GCC_ARM", "IAR"],
         "inherits": ["Target"],