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STM32F7 USB: add patch in CubeF7 hal driver
1 parent 15f9389 commit e37ee0f

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4 files changed

+335
-48
lines changed

4 files changed

+335
-48
lines changed

‎targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c

Lines changed: 153 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -102,6 +102,7 @@
102102
* @{
103103
*/
104104
static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum);
105+
static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd); // MBED PATCH
105106
/**
106107
* @}
107108
*/
@@ -148,8 +149,9 @@ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
148149
{
149150
/* Allocate lock resource and initialize it */
150151
hpcd->Lock = HAL_UNLOCKED;
151-
for (i = 0; i < hpcd->Init.dev_endpoints ; i++)
152-
hpcd->EPLock[i].Lock = HAL_UNLOCKED;
152+
for (i = 0; i < hpcd->Init.dev_endpoints ; i++) { // MBED PATCH
153+
hpcd->EPLock[i].Lock = HAL_UNLOCKED;
154+
}
153155
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
154156
HAL_PCD_MspInit(hpcd);
155157
}
@@ -300,10 +302,10 @@ __weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd)
300302
*/
301303
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
302304
{
303-
__HAL_LOCK(hpcd);
305+
// MBED PATCH __HAL_LOCK(hpcd);
304306
USB_DevConnect (hpcd->Instance);
305307
__HAL_PCD_ENABLE(hpcd);
306-
__HAL_UNLOCK(hpcd);
308+
// MBED PATCH __HAL_UNLOCK(hpcd);
307309
return HAL_OK;
308310
}
309311

@@ -314,11 +316,11 @@ HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
314316
*/
315317
HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd)
316318
{
317-
__HAL_LOCK(hpcd);
319+
// MBED PATCH __HAL_LOCK(hpcd);
318320
__HAL_PCD_DISABLE(hpcd);
319321
USB_StopDevice(hpcd->Instance);
320322
USB_DevDisconnect (hpcd->Instance);
321-
__HAL_UNLOCK(hpcd);
323+
// MBED PATCH __HAL_UNLOCK(hpcd);
322324
return HAL_OK;
323325
}
324326

@@ -393,6 +395,13 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
393395
}
394396
}
395397

398+
// MBED PATCH
399+
if (( epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD)
400+
{
401+
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD);
402+
}
403+
// MBED PATCH
404+
396405
if(( epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP)
397406
{
398407
/* setup/out transaction management for Core ID >= 310A */
@@ -440,7 +449,8 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
440449
if(( epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC)
441450
{
442451
fifoemptymsk = 0x1 << epnum;
443-
atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); // MBED: changed
452+
453+
atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); // MBED PATCH
444454

445455
CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_XFRC);
446456

@@ -662,25 +672,7 @@ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
662672
/* Handle RxQLevel Interrupt */
663673
if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
664674
{
665-
USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
666-
temp = USBx->GRXSTSP;
667-
ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM];
668-
669-
if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT)
670-
{
671-
if((temp & USB_OTG_GRXSTSP_BCNT) != 0)
672-
{
673-
USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4);
674-
ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
675-
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
676-
}
677-
}
678-
else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT)
679-
{
680-
USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8);
681-
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4;
682-
}
683-
USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
675+
PCD_ReadRxFifo(hpcd); // MBED PATCH
684676
}
685677

686678
/* Handle SOF Interrupt */
@@ -988,9 +980,9 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint
988980
ep->data_pid_start = 0;
989981
}
990982

991-
__HAL_LOCK(hpcd);
983+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7FU]); // MBED PATCH
992984
USB_ActivateEndpoint(hpcd->Instance , ep);
993-
__HAL_UNLOCK(hpcd);
985+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7FU]); // MBED PATCH
994986
return ret;
995987
}
996988

@@ -1017,9 +1009,9 @@ HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
10171009

10181010
ep->is_in = (0x80 & ep_addr) != 0;
10191011

1020-
__HAL_LOCK(hpcd);
1012+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7FU]); // MBED PATCH
10211013
USB_DeactivateEndpoint(hpcd->Instance , ep);
1022-
__HAL_UNLOCK(hpcd);
1014+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7FU]); // MBED PATCH
10231015
return HAL_OK;
10241016
}
10251017

@@ -1050,7 +1042,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, u
10501042
ep->dma_addr = (uint32_t)pBuf;
10511043
}
10521044

1053-
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED:added
1045+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
10541046

10551047
if ((ep_addr & 0x7F) == 0)
10561048
{
@@ -1061,7 +1053,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, u
10611053
USB_EPStartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable);
10621054
}
10631055

1064-
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: added
1056+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
10651057

10661058
return HAL_OK;
10671059
}
@@ -1102,7 +1094,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
11021094
ep->dma_addr = (uint32_t)pBuf;
11031095
}
11041096

1105-
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: added
1097+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
11061098

11071099
if ((ep_addr & 0x7F) == 0)
11081100
{
@@ -1113,11 +1105,91 @@ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
11131105
USB_EPStartXfer(hpcd->Instance, ep, hpcd->Init.dma_enable);
11141106
}
11151107

1116-
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: added
1108+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
11171109

11181110
return HAL_OK;
11191111
}
11201112

1113+
// MBED PATCH
1114+
/**
1115+
* @brief Abort a transaction.
1116+
* @param hpcd: PCD handle
1117+
* @param ep_addr: endpoint address
1118+
* @retval HAL status
1119+
*/
1120+
HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
1121+
{
1122+
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
1123+
HAL_StatusTypeDef ret = HAL_OK;
1124+
USB_OTG_EPTypeDef *ep;
1125+
1126+
if ((0x80 & ep_addr) == 0x80)
1127+
{
1128+
ep = &hpcd->IN_ep[ep_addr & 0x7F];
1129+
}
1130+
else
1131+
{
1132+
ep = &hpcd->OUT_ep[ep_addr];
1133+
}
1134+
1135+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1136+
1137+
ep->num = ep_addr & 0x7F;
1138+
ep->is_in = ((ep_addr & 0x80) == 0x80);
1139+
1140+
USB_EPSetNak(hpcd->Instance, ep);
1141+
1142+
if ((0x80 & ep_addr) == 0x80)
1143+
{
1144+
ret = USB_EPStopXfer(hpcd->Instance , ep);
1145+
if (ret == HAL_OK)
1146+
{
1147+
ret = USB_FlushTxFifo(hpcd->Instance, ep_addr & 0x7F);
1148+
}
1149+
}
1150+
else
1151+
{
1152+
/* Set global NAK */
1153+
USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK;
1154+
1155+
/* Read all entries from the fifo so global NAK takes effect */
1156+
while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
1157+
{
1158+
PCD_ReadRxFifo(hpcd);
1159+
}
1160+
1161+
/* Stop the transfer */
1162+
ret = USB_EPStopXfer(hpcd->Instance , ep);
1163+
if (ret == HAL_BUSY)
1164+
{
1165+
/* If USB_EPStopXfer returns HAL_BUSY then a setup packet
1166+
* arrived after the rx fifo was processed but before USB_EPStopXfer
1167+
* was called. Process the rx fifo one more time to read the
1168+
* setup packet.
1169+
*
1170+
* Note - after the setup packet has been received no further
1171+
* packets will be received over USB. This is because the next
1172+
* phase (data or status) of the control transfer started by
1173+
* the setup packet will be naked until global nak is cleared.
1174+
*/
1175+
while (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
1176+
{
1177+
PCD_ReadRxFifo(hpcd);
1178+
}
1179+
1180+
ret = USB_EPStopXfer(hpcd->Instance , ep);
1181+
}
1182+
1183+
/* Clear global nak */
1184+
USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK;
1185+
}
1186+
1187+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]);
1188+
1189+
return ret;
1190+
}
1191+
// MBED PATCH
1192+
11211193
/**
11221194
* @brief Set a STALL condition over an endpoint.
11231195
* @param hpcd PCD handle
@@ -1146,16 +1218,15 @@ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
11461218
ep->num = ep_addr & 0x7F;
11471219
ep->is_in = ((ep_addr & 0x80) == 0x80);
11481220

1149-
1150-
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed
1221+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
11511222

11521223
USB_EPSetStall(hpcd->Instance , ep);
11531224
if((ep_addr & 0x7F) == 0)
11541225
{
11551226
USB_EP0_OutStart(hpcd->Instance, hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup);
11561227
}
11571228

1158-
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed
1229+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
11591230

11601231
return HAL_OK;
11611232
}
@@ -1188,9 +1259,11 @@ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
11881259
ep->num = ep_addr & 0x7F;
11891260
ep->is_in = ((ep_addr & 0x80) == 0x80);
11901261

1191-
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed
1262+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
1263+
11921264
USB_EPClearStall(hpcd->Instance , ep);
1193-
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed
1265+
1266+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
11941267

11951268
return HAL_OK;
11961269
}
@@ -1203,7 +1276,7 @@ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
12031276
*/
12041277
HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
12051278
{
1206-
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: changed
1279+
__HAL_LOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
12071280

12081281
if ((ep_addr & 0x80) == 0x80)
12091282
{
@@ -1214,7 +1287,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
12141287
USB_FlushRxFifo(hpcd->Instance);
12151288
}
12161289

1217-
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED: change
1290+
__HAL_UNLOCK(&hpcd->EPLock[ep_addr & 0x7F]); // MBED PATCH
12181291

12191292
return HAL_OK;
12201293
}
@@ -1337,13 +1410,51 @@ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t
13371410
if (ep->xfer_count >= ep->xfer_len)
13381411
{
13391412
fifoemptymsk = 0x1 << epnum;
1340-
atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); // MBED: changed
1413+
atomic_clr_u32(&USBx_DEVICE->DIEPEMPMSK, fifoemptymsk); // MBED PATCH
13411414

13421415
}
13431416

13441417
return HAL_OK;
13451418
}
13461419

1420+
// MBED PATCH
1421+
/**
1422+
* @brief Process the next RX fifo entry
1423+
* @param hpcd: PCD handle
1424+
* @retval HAL status
1425+
*/
1426+
static HAL_StatusTypeDef PCD_ReadRxFifo(PCD_HandleTypeDef *hpcd)
1427+
{
1428+
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
1429+
USB_OTG_EPTypeDef *ep;
1430+
uint32_t temp = 0;
1431+
1432+
USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
1433+
1434+
temp = USBx->GRXSTSP;
1435+
1436+
ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM];
1437+
1438+
if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_DATA_UPDT)
1439+
{
1440+
if((temp & USB_OTG_GRXSTSP_BCNT) != 0U)
1441+
{
1442+
USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4U);
1443+
ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U;
1444+
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U;
1445+
}
1446+
}
1447+
else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17U) == STS_SETUP_UPDT)
1448+
{
1449+
USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U);
1450+
ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4U;
1451+
}
1452+
USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
1453+
1454+
return HAL_OK;
1455+
}
1456+
// MBED PATCH
1457+
13471458
/**
13481459
* @}
13491460
*/

‎targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -286,6 +286,7 @@ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint
286286
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
287287
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
288288
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
289+
HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); // MBED PATCH
289290
uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
290291
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
291292
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);

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