[NRF5] coding style format.

Author: nvlsianpu

targets/TARGET_NORDIC/TARGET_NRF5/i2c_api.c

@@ -103,18 +103,18 @@ void SPI1_TWI1_IRQHandler(void);
 
 static const peripheral_handler_desc_t twi_handlers[TWI_COUNT] =
 {
-    #if TWI0_ENABLED
+#if TWI0_ENABLED
     {
         SPI0_TWI0_IRQn,
         (uint32_t) SPI0_TWI0_IRQHandler
     },
-    #endif
-    #if TWI1_ENABLED
+#endif
+#if TWI1_ENABLED
     {
         SPI1_TWI1_IRQn,
         (uint32_t) SPI1_TWI1_IRQHandler
     }
-    #endif
+#endif
 };
 #ifdef NRF51
     #define TWI_IRQ_PRIORITY  APP_IRQ_PRIORITY_LOW

targets/TARGET_NORDIC/TARGET_NRF5/us_ticker.c

@@ -138,32 +138,32 @@ void common_rtc_init(void)
     // events will be enabled or disabled as needed (such approach is more
     // energy efficient).
     nrf_rtc_int_enable(COMMON_RTC_INSTANCE,
-    #if DEVICE_LOWPOWERTIMER
-        LP_TICKER_INT_MASK |
-    #endif
-        US_TICKER_INT_MASK |
-        NRF_RTC_INT_OVERFLOW_MASK);
+#if DEVICE_LOWPOWERTIMER
+                       LP_TICKER_INT_MASK |
+#endif
+                       US_TICKER_INT_MASK |
+                       NRF_RTC_INT_OVERFLOW_MASK);
 
     // This event is enabled permanently, since overflow indications are needed
     // continuously.
     nrf_rtc_event_enable(COMMON_RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
     // All other relevant events are initially disabled.
     nrf_rtc_event_disable(COMMON_RTC_INSTANCE,
-    #if defined(TARGET_MCU_NRF51822)
-        OS_TICK_INT_MASK |
-    #endif
-    #if DEVICE_LOWPOWERTIMER
-        LP_TICKER_INT_MASK |
-    #endif
-        US_TICKER_INT_MASK);
+#if defined(TARGET_MCU_NRF51822)
+                          OS_TICK_INT_MASK |
+#endif
+#if DEVICE_LOWPOWERTIMER
+                          LP_TICKER_INT_MASK |
+#endif
+                          US_TICKER_INT_MASK);
 
     nrf_drv_common_irq_enable(nrf_drv_get_IRQn(COMMON_RTC_INSTANCE),
 #ifdef NRF51
-        APP_IRQ_PRIORITY_LOW
+                              APP_IRQ_PRIORITY_LOW
 #elif defined(NRF52) || defined(NRF52840_XXAA)
-        APP_IRQ_PRIORITY_LOWEST
+                              APP_IRQ_PRIORITY_LOWEST
 #endif
-        );
+                             );
 
     nrf_rtc_task_trigger(COMMON_RTC_INSTANCE, NRF_RTC_TASK_START);
 
@@ -311,7 +311,9 @@ static uint32_t previous_tick_cc_value = 0;
  */
 MBED_WEAK uint32_t const os_trv;
 MBED_WEAK uint32_t const os_clockrate;
-MBED_WEAK void OS_Tick_Handler() { }
+MBED_WEAK void OS_Tick_Handler(void)
+{
+}
 
 
 #if defined (__CC_ARM)         /* ARMCC Compiler */
@@ -452,7 +454,8 @@ __stackless __task void COMMON_RTC_IRQ_HANDLER(void)
  * Return the next number of clock cycle needed for the next tick.
  * @note This function has been carrefuly optimized for a systick occuring every 1000us.
  */
-static uint32_t get_next_tick_cc_delta() {
+static uint32_t get_next_tick_cc_delta()
+{
     uint32_t delta = 0;
 
     if (os_clockrate != 1000) {
@@ -488,7 +491,8 @@ static uint32_t get_next_tick_cc_delta() {
     return delta;
 }
 
-static inline void clear_tick_interrupt() {
+static inline void clear_tick_interrupt()
+{
     nrf_rtc_event_clear(COMMON_RTC_INSTANCE, OS_TICK_EVENT);
     nrf_rtc_event_disable(COMMON_RTC_INSTANCE, OS_TICK_INT_MASK);
 }
@@ -500,7 +504,8 @@ static inline void clear_tick_interrupt() {
  * @param  val   value to check
  * @return       true if the value is included in the range and false otherwise.
  */
-static inline bool is_in_wrapped_range(uint32_t begin, uint32_t end, uint32_t val) {
+static inline bool is_in_wrapped_range(uint32_t begin, uint32_t end, uint32_t val)
+{
     // regular case, begin < end
     // return true if  begin <= val < end
     if (begin < end) {
@@ -524,7 +529,8 @@ static inline bool is_in_wrapped_range(uint32_t begin, uint32_t end, uint32_t va
 /**
  * Register the next tick.
  */
-static void register_next_tick() {
+static void register_next_tick()
+{
     previous_tick_cc_value = nrf_rtc_cc_get(COMMON_RTC_INSTANCE, OS_TICK_CC_CHANNEL);
     uint32_t delta = get_next_tick_cc_delta();
     uint32_t new_compare_value = (previous_tick_cc_value + delta) & MAX_RTC_COUNTER_VAL;
@@ -583,8 +589,9 @@ void os_tick_irqack(void)
  * @note This function is exposed by RTX kernel.
  * @return 1 if the timer has overflowed and 0 otherwise.
  */
-uint32_t os_tick_ovf(void) {
-    uint32_t current_counter = nrf_rtc_counter_get(COMMON_RTC_INSTANCE);
+uint32_t os_tick_ovf(void)
+{
+    uint32_t current_counter    = nrf_rtc_counter_get(COMMON_RTC_INSTANCE);
     uint32_t next_tick_cc_value = nrf_rtc_cc_get(COMMON_RTC_INSTANCE, OS_TICK_CC_CHANNEL);
 
     return is_in_wrapped_range(previous_tick_cc_value, next_tick_cc_value, current_counter) ? 0 : 1;
@@ -599,8 +606,9 @@ uint32_t os_tick_ovf(void) {
  * descending order, even if the internal counter used is an ascending one.
  * @return the value of the alternative hardware timer.
  */
-uint32_t os_tick_val(void) {
-    uint32_t current_counter = nrf_rtc_counter_get(COMMON_RTC_INSTANCE);
+uint32_t os_tick_val(void)
+{
+    uint32_t current_counter    = nrf_rtc_counter_get(COMMON_RTC_INSTANCE);
     uint32_t next_tick_cc_value = nrf_rtc_cc_get(COMMON_RTC_INSTANCE, OS_TICK_CC_CHANNEL);
 
     // do not use os_tick_ovf because its counter value can be different