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Cruz Monrreal
authored
Merge pull request #10086 from davidsaada/david_lpc55s69_bootloader
Add bootloader support for the LPC55S69 board
2 parents d6088e5 + eb5cef8 commit e901dfa

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11 files changed

+1933
-14
lines changed

11 files changed

+1933
-14
lines changed

‎features/FEATURE_BOOTLOADER/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/mbed-bootloader-lpc55s69-v1_0_0.hex

Lines changed: 1877 additions & 0 deletions
Large diffs are not rendered by default.

‎features/FEATURE_BOOTLOADER/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/mbed_lib.json

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
1+
{
2+
"name": "bootloader_LPC55S69",
3+
"target_overrides": {
4+
"*": {
5+
"target.app_offset": "0x8400",
6+
"target.header_offset": "0x8000",
7+
"target.bootloader_img": "mbed-bootloader-lpc55s69-v1_0_0.hex"
8+
}
9+
}
10+
}

‎platform/mbed_application.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -106,7 +106,7 @@ static void powerdown_nvic()
106106
NVIC->ICER[i] = 0xFFFFFFFF;
107107
NVIC->ICPR[i] = 0xFFFFFFFF;
108108
for (j = 0; j < 8; j++) {
109-
#if defined(__CORTEX_M23)
109+
#if defined(__CORTEX_M23) || defined(__CORTEX_M33)
110110
NVIC->IPR[i * 8 + j] = 0x00000000;
111111
#else
112112
NVIC->IP[i * 8 + j] = 0x00000000;
@@ -132,7 +132,7 @@ static void powerdown_scb(uint32_t vtor)
132132
num_pri_reg = 12;
133133
#endif
134134
for (i = 0; i < num_pri_reg; i++) {
135-
#if defined(__CORTEX_M7) || defined(__CORTEX_M23)
135+
#if defined(__CORTEX_M7) || defined(__CORTEX_M23) || defined(__CORTEX_M33)
136136
SCB->SHPR[i] = 0x00;
137137
#else
138138
SCB->SHP[i] = 0x00;

‎platform/mbed_application.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@
2121
#include<stdint.h>
2222

2323
#if defined(__CORTEX_M0PLUS) || defined(__CORTEX_M3) || defined(__CORTEX_M4) || defined(__CORTEX_M7)\
24-
|| defined(__CORTEX_M23) || defined(__CORTEX_A9)
24+
|| defined(__CORTEX_M23) || defined(__CORTEX_A9) || defined(__CORTEX_M33)
2525
#define MBED_APPLICATION_SUPPORT 1
2626
#else
2727
#define MBED_APPLICATION_SUPPORT 0

‎targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_ARMC6/LPC55S69_cm33_core0_flash.sct

Lines changed: 11 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -57,10 +57,18 @@
5757
#define MBED_ROM_START NS_CODE_START
5858
#endif
5959

60+
#if !defined(MBED_APP_START)
61+
#define MBED_APP_START MBED_ROM_START
62+
#endif
63+
6064
#if !defined(MBED_ROM_SIZE)
6165
#define MBED_ROM_SIZE NS_CODE_SIZE
6266
#endif
6367

68+
#if !defined(MBED_APP_SIZE)
69+
#define MBED_APP_SIZE MBED_ROM_SIZE
70+
#endif
71+
6472
#if !defined(MBED_RAM_START)
6573
#define MBED_RAM_START NS_DATA_START
6674
#endif
@@ -70,11 +78,11 @@
7078
#endif
7179

7280

73-
#define m_interrupts_start MBED_ROM_START
81+
#define m_interrupts_start MBED_APP_START
7482
#define m_interrupts_size 0x140
7583

76-
#define m_text_start MBED_ROM_START + 0x140
77-
#define m_text_size MBED_ROM_SIZE - 0x140
84+
#define m_text_start MBED_APP_START + 0x140
85+
#define m_text_size MBED_APP_SIZE - 0x140
7886

7987
#define m_interrupts_ram_start MBED_RAM_START
8088
#define m_interrupts_ram_size __ram_vector_table_size__

‎targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_GCC_ARM/LPC55S69_cm33_core0_flash.ld

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -33,10 +33,18 @@ __ram_vector_table__ = 1;
3333
#define MBED_ROM_START NS_CODE_START
3434
#endif
3535

36+
#if !defined(MBED_APP_START)
37+
#define MBED_APP_START MBED_ROM_START
38+
#endif
39+
3640
#if !defined(MBED_ROM_SIZE)
3741
#define MBED_ROM_SIZE NS_CODE_SIZE
3842
#endif
3943

44+
#if !defined(MBED_APP_SIZE)
45+
#define MBED_APP_SIZE MBED_ROM_SIZE
46+
#endif
47+
4048
#if !defined(MBED_RAM_START)
4149
#define MBED_RAM_START NS_DATA_START
4250
#endif
@@ -56,8 +64,8 @@ M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x200 : 0x0;
5664

5765
MEMORY
5866
{
59-
m_interrupts (RX) : ORIGIN = MBED_ROM_START, LENGTH = 0x140
60-
m_text (RX) : ORIGIN = MBED_ROM_START + 0x140, LENGTH = MBED_ROM_SIZE - 0x140
67+
m_interrupts (RX) : ORIGIN = MBED_APP_START, LENGTH = 0x140
68+
m_text (RX) : ORIGIN = MBED_APP_START + 0x140, LENGTH = MBED_APP_SIZE - 0x140
6169
m_data (RW) : ORIGIN = MBED_RAM_START, LENGTH = MBED_RAM_SIZE
6270
m_usb_sram (RW) : ORIGIN = 0x40100000, LENGTH = 0x00004000
6371
}

‎targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/TOOLCHAIN_IAR/LPC55S69_cm33_core0_flash.icf

Lines changed: 12 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -34,10 +34,18 @@ if (!isdefinedsymbol(MBED_ROM_START)) {
3434
define symbol MBED_ROM_START = NS_CODE_START;
3535
}
3636

37+
if (!isdefinedsymbol(MBED_APP_START)) {
38+
define symbol MBED_APP_START = MBED_ROM_START;
39+
}
40+
3741
if (!isdefinedsymbol(MBED_ROM_SIZE)) {
3842
define symbol MBED_ROM_SIZE = NS_CODE_SIZE;
3943
}
4044

45+
if (!isdefinedsymbol(MBED_APP_SIZE)) {
46+
define symbol MBED_APP_SIZE = MBED_ROM_SIZE;
47+
}
48+
4149
if (!isdefinedsymbol(MBED_RAM_START)) {
4250
define symbol MBED_RAM_START = NS_DATA_START;
4351
}
@@ -72,11 +80,11 @@ if (isdefinedsymbol(__heap_size__)) {
7280
define symbol __size_heap__ = 0x0400;
7381
}
7482

75-
define symbol m_interrupts_start = MBED_ROM_START;
76-
define symbol m_interrupts_end = (MBED_ROM_START + 0x13F);
83+
define symbol m_interrupts_start = MBED_APP_START;
84+
define symbol m_interrupts_end = (MBED_APP_START + 0x13F);
7785

78-
define symbol m_text_start = (MBED_ROM_START + 0x140);
79-
define symbol m_text_end = (MBED_ROM_START + MBED_ROM_SIZE - 1);
86+
define symbol m_text_start = (MBED_APP_START + 0x140);
87+
define symbol m_text_end = (MBED_APP_START + MBED_APP_SIZE - 1);
8088

8189
define symbol m_interrupts_ram_start = MBED_RAM_START;
8290
define symbol m_interrupts_ram_end = (MBED_RAM_START + __ram_vector_table_size__ - 1);

‎targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/cmsis_nvic_virtual.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,9 @@
1717
*/
1818

1919
#include "cmsis_nvic_virtual.h"
20-
#include "psa/lifecycle.h"
20+
#include "mbed_toolchain.h"
21+
22+
MBED_NORETURN void mbed_psa_system_reset();
2123

2224
void __NVIC_TFMSystemReset(void)
2325
{

‎targets/targets.json

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2102,7 +2102,8 @@
21022102
"secure-ram-start": "0x30000000",
21032103
"secure-ram-size": "0x22000"
21042104
},
2105-
"OUTPUT_EXT": "hex"
2105+
"OUTPUT_EXT": "hex",
2106+
"bootloader_supported": true
21062107
},
21072108
"LPC55S69_S": {
21082109
"inherits": ["SPE_Target", "LPC55S69"],

‎tools/psa/__init__.py

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,8 @@
2121

2222
def find_secure_image(notify, resources, ns_image_path, configured_s_image_filename, image_type):
2323
""" Find secure image. """
24+
if configured_s_image_filename is None:
25+
return None
2426

2527
assert ns_image_path and configured_s_image_filename, 'ns_image_path and configured_s_image_path are mandatory'
2628
assert image_type in [FileType.BIN, FileType.HEX], 'image_type must be of type BIN or HEX'

‎tools/targets/LPC55S69.py

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,9 @@
2626

2727

2828
def lpc55s69_complete(t_self, non_secure_bin, secure_bin):
29+
if secure_bin is None:
30+
return None
31+
2932
assert os.path.isfile(secure_bin)
3033
assert os.path.isfile(non_secure_bin)
3134

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