Add header files to fpga tests, update test names

Author: mprse

TESTS/mbed_hal_fpga_ci_test_shield/analogin/analogin_fpga_test.h

@@ -0,0 +1,60 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2019 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/** \addtogroup hal_analogin_tests */
+/** @{*/
+
+#ifndef MBED_FPGA_ANALOG_IN_TEST_H
+#define MBED_FPGA_ANALOG_IN_TEST_H
+
+#if DEVICE_ANALOGIN
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Test that the alalogin can be initialized using all possible analogin pins.
+ *
+ * Given board provides analogin support.
+ * When analogin is initialized using valid analogin pin.
+ * Then the operation is successfull.
+ *
+ */
+void fpga_analogin_init_test(PinName pin);
+
+/** Test that analogin correctly interprets given input voltage.
+ *
+ * Given board provides analogin support.
+ * When 0.0/3.3 V is provided to analogin pin.
+ * Then analogin_read returns 0.0/1.0,
+ *      analogin_read_u16 returns 0/65535.
+ *
+ */
+void fpga_analogin_test(PinName pin);
+
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+/**@}*/

TESTS/mbed_hal_fpga_ci_test_shield/analogin/main.cpp

@@ -26,11 +26,11 @@
 #include "utest/utest.h"
 #include "unity/unity.h"
 #include "greentea-client/test_env.h"
-
 #include "mbed.h"
 #include "pinmap.h"
 #include "test_utils.h"
 #include "MbedTester.h"
+#include "analogin_fpga_test.h"
 
 using namespace utest::v1;
 
@@ -44,14 +44,14 @@ const PinList *restricted = pinmap_restricted_pins();
 
 MbedTester tester(form_factor, restricted);
 
-void analogin_init(PinName pin)
+void fpga_analogin_init_test(PinName pin)
 {
     analogin_t analogin;
 
     analogin_init(&analogin, pin);
 }
 
-void analogin_test(PinName pin)
+void fpga_analogin_test(PinName pin)
 {
     tester.reset();
     tester.pin_map_set(pin, MbedTester::LogicalPinGPIO0);
@@ -76,9 +76,9 @@ void analogin_test(PinName pin)
 
 Case cases[] = {
     // This will be run for all pins
-    Case("AnalogIn - init test", all_ports<AnaloginPort, DefaultFormFactor, analogin_init>),
+    Case("AnalogIn - init test", all_ports<AnaloginPort, DefaultFormFactor, fpga_analogin_init_test>),
     // This will be run for single pin
-    Case("AnalogIn - read test", all_ports<AnaloginPort, DefaultFormFactor, analogin_test>),
+    Case("AnalogIn - read test", all_ports<AnaloginPort, DefaultFormFactor, fpga_analogin_test>),
 };
 
 utest::v1::status_t greentea_test_setup(const size_t number_of_cases)

TESTS/mbed_hal_fpga_ci_test_shield/gpio/gpio_fpga_test.h

@@ -0,0 +1,48 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2019 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/** \addtogroup hal_gpio_tests */
+/** @{*/
+
+#ifndef MBED_FPGA_GPIO_TEST_H
+#define MBED_FPGA_GPIO_TEST_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Test that the gpio works correctly.
+ *
+ * Given board provides gpio.
+ * When gpio port is set as input port and logic 0/1 is provided on this port.
+ * Then gpio_read returns 0/1.
+ * When gpio port is set as output port and the output value is set to logic 0/1 by means of gpio_write.
+ * Then we have logic 0/1 on output.
+ *
+ */
+void fpga_gpio_inout_test();
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
+/**@}*/

TESTS/mbed_hal_fpga_ci_test_shield/gpio/main.cpp

@@ -25,11 +25,12 @@
 #include "unity/unity.h"
 #include "greentea-client/test_env.h"
 #include "mbed.h"
+#include "MbedTester.h"
+#include "pinmap.h"
+#include "gpio_fpga_test.h"
 
 using namespace utest::v1;
 
-#include "MbedTester.h"
-#include "pinmap.h"
 
 const PinList *form_factor = pinmap_ff_default_pins();
 const PinList *restricted = pinmap_restricted_pins();
@@ -64,7 +65,7 @@ void gpio_inout_test(PinName pin)
     tester.gpio_write(MbedTester::LogicalPinGPIO0, 0, false);
 }
 
-void gpio_inout_test()
+void fpga_gpio_inout_test()
 {
     for (int i = 0; i < form_factor->count; i++) {
         const PinName test_pin = form_factor->pins[i];
@@ -98,7 +99,7 @@ utest::v1::status_t teardown(const Case *const source, const size_t passed, cons
 }
 
 Case cases[] = {
-    Case("GPIO - inout", setup, gpio_inout_test, teardown),
+    Case("GPIO - inout", setup, fpga_gpio_inout_test, teardown),
 };
 
 utest::v1::status_t greentea_test_setup(const size_t number_of_cases)

TESTS/mbed_hal_fpga_ci_test_shield/gpio_irq/gpio_irq_fpga_test.h

@@ -0,0 +1,48 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2019 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/** \addtogroup hal_gpioirq_tests */
+/** @{*/
+
+#ifndef MBED_FPGA_GPIO_IRQ_TEST_H
+#define MBED_FPGA_GPIO_IRQ_TEST_H
+
+#if DEVICE_INTERRUPTIN
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Test that the gpio interrupt is generated correctly.
+ *
+ * Given board provides interrupt-in feature.
+ * When gpio interrupt is configured to fire on rasing/falling/both edge(s).
+ * Then on rasing/falling/any edge registered interrupt handler is called.
+ *
+ */
+void fpga_gpio_irq_test(PinName pin);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+/**@}*/

TESTS/mbed_hal_fpga_ci_test_shield/gpio_irq/main.cpp

@@ -27,12 +27,12 @@
 #include "unity/unity.h"
 #include "greentea-client/test_env.h"
 #include "mbed.h"
+#include "MbedTester.h"
+#include "pinmap.h"
+#include "gpio_irq_fpga_test.h"
 
 using namespace utest::v1;
 
-#include "mbed.h"
-#include "MbedTester.h"
-#include "pinmap.h"
 
 static uint32_t call_counter;
 void test_gpio_irq_handler(uint32_t id, gpio_irq_event event)
@@ -47,7 +47,7 @@ MbedTester tester(form_factor, restricted);
 #define WAIT() wait_us(10)
 
 
-void gpio_irq_test(PinName pin)
+void fpga_gpio_irq_test(PinName pin)
 {
     gpio_t gpio;
     // configure pin as input
@@ -246,7 +246,7 @@ void gpio_irq_test(PinName pin)
 }
 
 
-void gpio_irq_test()
+void fpga_gpio_irq_test()
 {
     for (uint32_t i = 0; i < form_factor->count; i++) {
         const PinName test_pin = form_factor->pins[i];
@@ -261,7 +261,7 @@ void gpio_irq_test()
         tester.pin_map_set(test_pin, MbedTester::LogicalPinGPIO0);
 
         printf("GPIO irq test on pin %3s (%3i)\r\n", pinmap_ff_default_pin_to_string(test_pin), test_pin);
-        gpio_irq_test(test_pin);
+        fpga_gpio_irq_test(test_pin);
     }
 }
 
@@ -280,7 +280,7 @@ utest::v1::status_t teardown(const Case *const source, const size_t passed, cons
 }
 
 Case cases[] = {
-    Case("GPIO - irq test", setup, gpio_irq_test, teardown)
+    Case("GPIO - irq test", setup, fpga_gpio_irq_test, teardown)
 };
 
 utest::v1::status_t greentea_test_setup(const size_t number_of_cases)

TESTS/mbed_hal_fpga_ci_test_shield/i2c/i2c_fpga_test.h

@@ -0,0 +1,86 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2019 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/** \addtogroup hal_GeneralI2C_tests */
+/** @{*/
+
+#ifndef MBED_FPGA_I2C_TEST_H
+#define MBED_FPGA_I2C_TEST_H
+
+#if DEVICE_I2C
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Test that the i2c-master can be initialized/de-initialized using all possible
+ *  i2c pins.
+ *
+ * Given board provides i2c-master support.
+ * When i2c-master is initialized (and then de-initialized) using valid set of i2c pins.
+ * Then the operation is successfull.
+ *
+ */
+void fpga_test_i2c_init_free(PinName sda, PinName scl);
+
+/** Test that I2C master is able to read data from I2C bus using i2c_byte_read.
+ *
+ * Given board provides I2C master support.
+ * When I2C master reads data from I2C bus using i2c_byte_read.
+ * Then data is successfully read.
+ *
+ */
+void fpga_i2c_test_byte_read(PinName sda, PinName scl);
+
+/** Test that I2C master is able to write data to I2C bus using i2c_byte_write.
+ *
+ * Given board provides I2C master support.
+ * When I2C master writes data to the I2C bus using i2c_byte_write.
+ * Then data is successfully transmitted.
+ *
+ */
+void fpga_i2c_test_byte_write(PinName sda, PinName scl);
+
+/** Test that I2C master is able to read data from I2C bus using i2c_read.
+ *
+ * Given board provides I2C master support.
+ * When I2C master reads data from I2C bus using i2c_read.
+ * Then data is successfully read.
+ *
+ */
+void fpga_i2c_test_read(PinName sda, PinName scl);
+
+/** Test that I2C master is able to write data to I2C bus using i2c_write.
+ *
+ * Given board provides I2C master support.
+ * When I2C master writes data to the I2C bus using i2c_write.
+ * Then data is successfully transmitted.
+ *
+ */
+void fpga_i2c_test_write(PinName sda, PinName scl);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+/**@}*/