Merge pull request #12690 from jeromecoutant/PR_GCC_ETEXT

0xc0170 · web-flow · commit eb2457f59d68 · 2020-03-31T09:27:05.000+02:00
STM32: solve GCC Unspecified RTOS error
diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_GCC_ARM/stm32g030xx.ld b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G030xx/TOOLCHAIN_GCC_ARM/stm32g030xx.ld
@@ -111,10 +111,7 @@ SECTIONS
     } > FLASH
     __exidx_end = .;
 
-    /* Location counter can end up 2byte aligned with narrow Thumb code but
-       __etext is assumed by startup code to be the LMA of a section in RAM
-       which must be 8-byte aligned */
-    __etext = ALIGN (8);
+    __etext = .;
     _sidata = .;
     
     .data : AT (__etext)
diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_GCC_ARM/stm32g031xx.ld b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G031xx/TOOLCHAIN_GCC_ARM/stm32g031xx.ld
@@ -111,10 +111,7 @@ SECTIONS
     } > FLASH
     __exidx_end = .;
 
-    /* Location counter can end up 2byte aligned with narrow Thumb code but
-       __etext is assumed by startup code to be the LMA of a section in RAM
-       which must be 8-byte aligned */
-    __etext = ALIGN (8);
+    __etext = .;
     _sidata = .;
     
     .data : AT (__etext)
diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_GCC_ARM/stm32g041xx.ld b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G041xx/TOOLCHAIN_GCC_ARM/stm32g041xx.ld
@@ -111,10 +111,7 @@ SECTIONS
     } > FLASH
     __exidx_end = .;
 
-    /* Location counter can end up 2byte aligned with narrow Thumb code but
-       __etext is assumed by startup code to be the LMA of a section in RAM
-       which must be 8-byte aligned */
-    __etext = ALIGN (8);
+    __etext = .;
     _sidata = .;
     
     .data : AT (__etext)
diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_GCC_ARM/stm32g070xx.ld b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G070xx/TOOLCHAIN_GCC_ARM/stm32g070xx.ld
@@ -111,10 +111,7 @@ SECTIONS
     } > FLASH
     __exidx_end = .;
 
-    /* Location counter can end up 2byte aligned with narrow Thumb code but
-       __etext is assumed by startup code to be the LMA of a section in RAM
-       which must be 8-byte aligned */
-    __etext = ALIGN (8);
+    __etext = .;
     _sidata = .;
     
     .data : AT (__etext)
diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/stm32g071xx.ld b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G071xx/TOOLCHAIN_GCC_ARM/stm32g071xx.ld
@@ -111,10 +111,7 @@ SECTIONS
     } > FLASH
     __exidx_end = .;
 
-    /* Location counter can end up 2byte aligned with narrow Thumb code but
-       __etext is assumed by startup code to be the LMA of a section in RAM
-       which must be 8-byte aligned */
-    __etext = ALIGN (8);
+    __etext = .;
     _sidata = .;
     
     .data : AT (__etext)
diff --git a/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_GCC_ARM/stm32g081xx.ld b/targets/TARGET_STM/TARGET_STM32G0/TARGET_STM32G081xx/TOOLCHAIN_GCC_ARM/stm32g081xx.ld
@@ -111,10 +111,7 @@ SECTIONS
     } > FLASH
     __exidx_end = .;
 
-    /* Location counter can end up 2byte aligned with narrow Thumb code but
-       __etext is assumed by startup code to be the LMA of a section in RAM
-       which must be 8-byte aligned */
-    __etext = ALIGN (8);
+    __etext = .;
     _sidata = .;
     
     .data : AT (__etext)
diff --git a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_GCC_ARM/stm32l552xx.ld b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L552xx/TOOLCHAIN_GCC_ARM/stm32l552xx.ld
@@ -111,10 +111,7 @@ SECTIONS
     } > FLASH
     __exidx_end = .;
 
-    /* Location counter can end up 2byte aligned with narrow Thumb code but
-       __etext is assumed by startup code to be the LMA of a section in RAM
-       which must be 8-byte aligned */
-    __etext = ALIGN (8);
+    __etext = .;
     _sidata = .;
     
     .data : AT (__etext)
diff --git a/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_GCC_ARM/stm32l562xx.ld b/targets/TARGET_STM/TARGET_STM32L5/TARGET_STM32L562xx/TOOLCHAIN_GCC_ARM/stm32l562xx.ld
@@ -111,10 +111,7 @@ SECTIONS
     } > FLASH
     __exidx_end = .;
 
-    /* Location counter can end up 2byte aligned with narrow Thumb code but
-       __etext is assumed by startup code to be the LMA of a section in RAM
-       which must be 8-byte aligned */
-    __etext = ALIGN (8);
+    __etext = .;
     _sidata = .;
     
     .data : AT (__etext)
diff --git a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_GCC_ARM/stm32wb50xx.ld b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB50xx/TOOLCHAIN_GCC_ARM/stm32wb50xx.ld
@@ -111,10 +111,7 @@ SECTIONS
     } > FLASH
     __exidx_end = .;
 
-    /* Location counter can end up 2byte aligned with narrow Thumb code but
-       __etext is assumed by startup code to be the LMA of a section in RAM
-       which must be 8-byte aligned */
-    __etext = ALIGN (8);
+    __etext = .;
     _sidata = .;
     
     .data : AT (__etext)
diff --git a/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_GCC_ARM/stm32wb55xx.ld b/targets/TARGET_STM/TARGET_STM32WB/TARGET_STM32WB55xx/TOOLCHAIN_GCC_ARM/stm32wb55xx.ld
@@ -115,10 +115,7 @@ SECTIONS
     } > FLASH
     __exidx_end = .;
 
-    /* Location counter can end up 2byte aligned with narrow Thumb code but
-       __etext is assumed by startup code to be the LMA of a section in RAM
-       which must be 8-byte aligned */
-    __etext = ALIGN (8);
+    __etext = .;
     _sidata = .;
     
     .data : AT (__etext)
