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jeromecoutantjeromecoutant
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TARGET_STM32L1 astyle
1 parent baf97d7 commit ecffec8

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19 files changed

+234
-191
lines changed

19 files changed

+234
-191
lines changed

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/PeripheralNames.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -50,9 +50,9 @@ typedef enum {
5050
UART_3 = (int)USART3_BASE
5151
} UARTName;
5252

53-
#define STDIO_UART_TX PA_2
54-
#define STDIO_UART_RX PA_3
55-
#define STDIO_UART UART_2
53+
#define STDIO_UART_TX PA_2
54+
#define STDIO_UART_RX PA_3
55+
#define STDIO_UART UART_2
5656

5757
typedef enum {
5858
SPI_1 = (int)SPI1_BASE,

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/PinNames.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -234,7 +234,7 @@ typedef enum {
234234

235235
I2C_SCL = I2C0_SCL,
236236
I2C_SDA = I2C0_SDA,
237-
237+
238238
} PinName;
239239

240240
#ifdef __cplusplus

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/xdot_eeprom.c

Lines changed: 19 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -34,13 +34,13 @@
3434
#define XDOT_EEPROM_SIZE 0x00002000
3535

3636
typedef union {
37-
uint32_t* w;
38-
uint8_t* b;
37+
uint32_t *w;
38+
uint8_t *b;
3939
} b2w;
4040

4141
typedef union {
42-
uint16_t* hw;
43-
uint8_t* b;
42+
uint16_t *hw;
43+
uint8_t *b;
4444
} b2hw;
4545

4646
enum {
@@ -49,7 +49,8 @@ enum {
4949
word_write
5050
};
5151

52-
static int xdot_eeprom_write_byte(uint32_t addr, uint8_t data) {
52+
static int xdot_eeprom_write_byte(uint32_t addr, uint8_t data)
53+
{
5354
if (addr > XDOT_EEPROM_SIZE - 1) {
5455
return -1;
5556
}
@@ -61,7 +62,8 @@ static int xdot_eeprom_write_byte(uint32_t addr, uint8_t data) {
6162
}
6263
}
6364

64-
static int xdot_eeprom_write_hword(uint32_t addr, uint16_t data) {
65+
static int xdot_eeprom_write_hword(uint32_t addr, uint16_t data)
66+
{
6567
if (addr > XDOT_EEPROM_SIZE - 2) {
6668
return -1;
6769
}
@@ -73,7 +75,8 @@ static int xdot_eeprom_write_hword(uint32_t addr, uint16_t data) {
7375
}
7476
}
7577

76-
static int xdot_eeprom_write_word(uint32_t addr, uint32_t data) {
78+
static int xdot_eeprom_write_word(uint32_t addr, uint32_t data)
79+
{
7780
if (addr > XDOT_EEPROM_SIZE - 4) {
7881
return -1;
7982
}
@@ -85,18 +88,20 @@ static int xdot_eeprom_write_word(uint32_t addr, uint32_t data) {
8588
}
8689
}
8790

88-
static int xdot_eeprom_read_byte(uint32_t addr, uint8_t* data) {
91+
static int xdot_eeprom_read_byte(uint32_t addr, uint8_t *data)
92+
{
8993
if (addr > XDOT_EEPROM_SIZE - 1) {
9094
return -1;
9195
}
9296

93-
*data = (*((uint8_t*)(XDOT_EEPROM_START + addr)));
97+
*data = (*((uint8_t *)(XDOT_EEPROM_START + addr)));
9498

9599
return 0;
96100
}
97101

98102

99-
int xdot_eeprom_write_buf(uint32_t addr, uint8_t* buf, uint32_t size) {
103+
int xdot_eeprom_write_buf(uint32_t addr, uint8_t *buf, uint32_t size)
104+
{
100105
uint32_t bytes_written = 0;
101106

102107
if (addr + size > XDOT_EEPROM_SIZE) {
@@ -133,7 +138,7 @@ int xdot_eeprom_write_buf(uint32_t addr, uint8_t* buf, uint32_t size) {
133138
}
134139
//printf("%smatch\r\n", mismatch[i] ? "mis" : "");
135140
}
136-
if (! (mismatch[0] || mismatch[1] || mismatch[2] || mismatch[3])) {
141+
if (!(mismatch[0] || mismatch[1] || mismatch[2] || mismatch[3])) {
137142
//printf("all match - no write necessary\r\n");
138143
bytes_written += 4;
139144
continue;
@@ -180,7 +185,7 @@ int xdot_eeprom_write_buf(uint32_t addr, uint8_t* buf, uint32_t size) {
180185
}
181186
//printf("%smatch\r\n", mismatch[i] ? "mis" : "");
182187
}
183-
if (! (mismatch[0] || mismatch[1])) {
188+
if (!(mismatch[0] || mismatch[1])) {
184189
//printf("all match - no write necessary\r\n");
185190
bytes_written += 2;
186191
continue;
@@ -261,7 +266,8 @@ int xdot_eeprom_write_buf(uint32_t addr, uint8_t* buf, uint32_t size) {
261266
return 0;
262267
}
263268

264-
int xdot_eeprom_read_buf(uint32_t addr, uint8_t* buf, uint32_t size) {
269+
int xdot_eeprom_read_buf(uint32_t addr, uint8_t *buf, uint32_t size)
270+
{
265271
if (addr + size > XDOT_EEPROM_SIZE) {
266272
return -1;
267273
}

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/xdot_eeprom.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -46,15 +46,15 @@ extern "C" {
4646
* valid addresses are 0x0000 - 0x1FFF
4747
* returns 0 if all data was successfully written otherwise -1
4848
*/
49-
int xdot_eeprom_write_buf(uint32_t addr, uint8_t* buf, uint32_t size);
49+
int xdot_eeprom_write_buf(uint32_t addr, uint8_t *buf, uint32_t size);
5050

5151
/* xdot_eeprom_read_buf
5252
* attempts to read size bytes into buf starting at addr
5353
* buf must be non-null and size bytes or larger
5454
* valid addresses are 0x0000 - 0x1FFF
5555
* returns 0 if all data was successfully read otherwise -1
5656
*/
57-
int xdot_eeprom_read_buf(uint32_t addr, uint8_t* buf, uint32_t size);
57+
int xdot_eeprom_read_buf(uint32_t addr, uint8_t *buf, uint32_t size);
5858

5959
#ifdef __cplusplus
6060
}

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/xdot_low_power.c

Lines changed: 26 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -37,15 +37,18 @@ static uint32_t portB[6];
3737
static uint32_t portC[6];
3838
static uint32_t portH[6];
3939

40-
void xdot_disable_systick_int() {
40+
void xdot_disable_systick_int()
41+
{
4142
SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
4243
}
4344

44-
void xdot_enable_systick_int() {
45+
void xdot_enable_systick_int()
46+
{
4547
SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;
4648
}
4749

48-
void xdot_save_gpio_state() {
50+
void xdot_save_gpio_state()
51+
{
4952
portA[0] = GPIOA->MODER;
5053
portA[1] = GPIOA->OTYPER;
5154
portA[2] = GPIOA->OSPEEDR;
@@ -75,7 +78,8 @@ void xdot_save_gpio_state() {
7578
portH[5] = GPIOH->AFR[1];
7679
}
7780

78-
void xdot_restore_gpio_state() {
81+
void xdot_restore_gpio_state()
82+
{
7983
GPIOA->MODER = portA[0];
8084
GPIOA->OTYPER = portA[1];
8185
GPIOA->OSPEEDR = portA[2];
@@ -105,7 +109,8 @@ void xdot_restore_gpio_state() {
105109
GPIOH->AFR[1] = portH[5];
106110
}
107111

108-
void xdot_enter_stop_mode() {
112+
void xdot_enter_stop_mode()
113+
{
109114
GPIO_InitTypeDef GPIO_InitStruct;
110115

111116
// disable ADC and DAC - they can consume power in stop mode
@@ -224,8 +229,8 @@ void xdot_enter_stop_mode() {
224229
HSERCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI;
225230
HSERCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External 24 MHz xtal on OSC_IN/OSC_OUT */
226231
HSERCC_OscInitStruct.HSIState = RCC_HSI_OFF;
227-
// SYSCLK = 32 MHz ((24 MHz * 4) / 3)
228-
// USBCLK = 48 MHz ((24 MHz * 4) / 2) --> USB OK
232+
// SYSCLK = 32 MHz ((24 MHz * 4) / 3)
233+
// USBCLK = 48 MHz ((24 MHz * 4) / 2) --> USB OK
229234
HSERCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
230235
HSERCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
231236
HSERCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL4;
@@ -249,12 +254,12 @@ void xdot_enter_stop_mode() {
249254
/* Enable the HSI for ADC peripherals */
250255
RCC_OscInitTypeDef HSIRCC_OscInitStruct;
251256
HAL_RCC_GetOscConfig(&HSIRCC_OscInitStruct);
252-
if ( HSIRCC_OscInitStruct.HSIState != RCC_HSI_ON ) {
257+
if (HSIRCC_OscInitStruct.HSIState != RCC_HSI_ON) {
253258
HSIRCC_OscInitStruct.HSIState = RCC_HSI_ON;
254259
HSIRCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
255260
HSIRCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
256261
HAL_StatusTypeDef ret = HAL_RCC_OscConfig(&HSIRCC_OscInitStruct);
257-
if ( ret != HAL_OK ) {
262+
if (ret != HAL_OK) {
258263
debug("HSI initialization failed - ADC will not function properly\r\n");
259264
}
260265
}
@@ -271,18 +276,22 @@ void xdot_enter_stop_mode() {
271276
DAC->CR |= DAC_CR_EN2;
272277
}
273278

274-
void xdot_enter_standby_mode() {
279+
void xdot_enter_standby_mode()
280+
{
275281
// enable ULP and enable fast wakeup
276282
HAL_PWREx_EnableUltraLowPower();
277283
HAL_PWREx_EnableFastWakeUp();
278284

279285
// disable HSI, MSI, and LSI if they are running
280-
if (RCC->CR & RCC_CR_HSION)
286+
if (RCC->CR & RCC_CR_HSION) {
281287
RCC->CR &= ~RCC_CR_HSION;
282-
if (RCC->CR & RCC_CR_MSION)
288+
}
289+
if (RCC->CR & RCC_CR_MSION) {
283290
RCC->CR &= ~RCC_CR_MSION;
284-
if (RCC->CSR & RCC_CSR_LSION)
291+
}
292+
if (RCC->CSR & RCC_CSR_LSION) {
285293
RCC->CSR &= ~RCC_CSR_LSION;
294+
}
286295

287296

288297
// make sure wakeup and standby flags are cleared
@@ -293,10 +302,12 @@ void xdot_enter_standby_mode() {
293302
HAL_PWR_EnterSTANDBYMode();
294303
}
295304

296-
void xdot_enable_standby_wake_pin() {
305+
void xdot_enable_standby_wake_pin()
306+
{
297307
HAL_PWR_EnableWakeUpPin(PWR_WAKEUP_PIN1);
298308
}
299309

300-
void xdot_disable_standby_wake_pin() {
310+
void xdot_disable_standby_wake_pin()
311+
{
301312
HAL_PWR_DisableWakeUpPin(PWR_WAKEUP_PIN1);
302313
}

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/PinNames.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -94,7 +94,7 @@ typedef enum {
9494
SPI_RF_MISO = PA_6,
9595
SPI_RF_SCK = PA_5,
9696
SPI_RF_CS = PB_0,
97-
SPI_RF_RESET= PB_13,
97+
SPI_RF_RESET = PB_13,
9898

9999
DIO0 = PA_11,
100100
DIO1 = PB_1,

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/PinNames.h

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -48,19 +48,19 @@ typedef enum {
4848
typedef enum {
4949
PA_0 = 0x00,
5050
PA_1 = 0x01,
51-
PA_1_ALT0 = PA_1|ALT0,
52-
PA_1_ALT1 = PA_1|ALT1,
51+
PA_1_ALT0 = PA_1 | ALT0,
52+
PA_1_ALT1 = PA_1 | ALT1,
5353
PA_2 = 0x02,
5454
PA_3 = 0x03,
5555
PA_4 = 0x04,
56-
PA_4_ALT0 = PA_4|ALT0,
56+
PA_4_ALT0 = PA_4 | ALT0,
5757
PA_5 = 0x05,
5858
PA_6 = 0x06,
59-
PA_6_ALT0 = PA_6|ALT0,
59+
PA_6_ALT0 = PA_6 | ALT0,
6060
PA_7 = 0x07,
61-
PA_7_ALT0 = PA_7|ALT0,
62-
PA_7_ALT1 = PA_7|ALT1,
63-
PA_7_ALT2 = PA_7|ALT2,
61+
PA_7_ALT0 = PA_7 | ALT0,
62+
PA_7_ALT1 = PA_7 | ALT1,
63+
PA_7_ALT2 = PA_7 | ALT2,
6464
PA_8 = 0x08,
6565
PA_9 = 0x09,
6666
PA_10 = 0x0A,
@@ -69,27 +69,27 @@ typedef enum {
6969
PA_13 = 0x0D,
7070
PA_14 = 0x0E,
7171
PA_15 = 0x0F,
72-
PA_15_ALT0 = PA_15|ALT0,
72+
PA_15_ALT0 = PA_15 | ALT0,
7373

7474
PB_0 = 0x10,
7575
PB_1 = 0x11,
7676
PB_2 = 0x12,
7777
PB_3 = 0x13,
78-
PB_3_ALT0 = PB_3|ALT0,
78+
PB_3_ALT0 = PB_3 | ALT0,
7979
PB_4 = 0x14,
80-
PB_4_ALT0 = PB_4|ALT0,
81-
PB_4_ALT1 = PB_4|ALT1,
80+
PB_4_ALT0 = PB_4 | ALT0,
81+
PB_4_ALT1 = PB_4 | ALT1,
8282
PB_5 = 0x15,
83-
PB_5_ALT0 = PB_5|ALT0,
84-
PB_5_ALT1 = PB_5|ALT1,
83+
PB_5_ALT0 = PB_5 | ALT0,
84+
PB_5_ALT1 = PB_5 | ALT1,
8585
PB_6 = 0x16,
8686
PB_7 = 0x17,
8787
PB_8 = 0x18,
88-
PB_8_ALT0 = PB_8|ALT0,
89-
PB_8_ALT1 = PB_8|ALT1,
88+
PB_8_ALT0 = PB_8 | ALT0,
89+
PB_8_ALT1 = PB_8 | ALT1,
9090
PB_9 = 0x19,
91-
PB_9_ALT0 = PB_9|ALT0,
92-
PB_9_ALT1 = PB_9|ALT1,
91+
PB_9_ALT0 = PB_9 | ALT0,
92+
PB_9_ALT1 = PB_9 | ALT1,
9393
PB_10 = 0x1A,
9494
PB_11 = 0x1B,
9595
PB_12 = 0x1C,
@@ -108,9 +108,9 @@ typedef enum {
108108
PC_8 = 0x28,
109109
PC_9 = 0x29,
110110
PC_10 = 0x2A,
111-
PC_10_ALT0 = PC_10|ALT0,
111+
PC_10_ALT0 = PC_10 | ALT0,
112112
PC_11 = 0x2B,
113-
PC_11_ALT0 = PC_11|ALT0,
113+
PC_11_ALT0 = PC_11 | ALT0,
114114
PC_12 = 0x2C,
115115
PC_13 = 0x2D,
116116
PC_14 = 0x2E,
@@ -181,17 +181,17 @@ typedef enum {
181181
SPI_CS = PB_6,
182182
PWM_OUT = PB_3,
183183

184-
/**** USB pins ****/
184+
/**** USB pins ****/
185185
USB_DM = PA_11,
186186
USB_DP = PA_12,
187187

188-
/**** OSCILLATOR pins ****/
188+
/**** OSCILLATOR pins ****/
189189
RCC_OSC32_IN = PC_14,
190190
RCC_OSC32_OUT = PC_15,
191191
RCC_OSC_IN = PH_0,
192192
RCC_OSC_OUT = PH_1,
193193

194-
/**** DEBUG pins ****/
194+
/**** DEBUG pins ****/
195195
SYS_JTCK_SWCLK = PA_14,
196196
SYS_JTDI = PA_15,
197197
SYS_JTDO_TRACESWO = PB_3,

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/PeripheralNames.h

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -51,20 +51,20 @@ typedef enum {
5151
} UARTName;
5252

5353
#if (MX_DEFAULT_SERIAL_PINS == 0)
54-
//Use B10/B11 as default serial port
55-
#define STDIO_UART_TX PB_10
56-
#define STDIO_UART_RX PB_11
57-
#define STDIO_UART UART_3
54+
//Use B10/B11 as default serial port
55+
#define STDIO_UART_TX PB_10
56+
#define STDIO_UART_RX PB_11
57+
#define STDIO_UART UART_3
5858
#elif (MX_DEFAULT_SERIAL_PINS == 1)
59-
//Use A2/A3 as default serial port
60-
#define STDIO_UART_TX PA_2
61-
#define STDIO_UART_RX PA_3
62-
#define STDIO_UART UART_2
59+
//Use A2/A3 as default serial port
60+
#define STDIO_UART_TX PA_2
61+
#define STDIO_UART_RX PA_3
62+
#define STDIO_UART UART_2
6363
#else
64-
//Use A2/A3 as default serial port
65-
#define STDIO_UART_TX PA_2
66-
#define STDIO_UART_RX PA_3
67-
#define STDIO_UART UART_2
64+
//Use A2/A3 as default serial port
65+
#define STDIO_UART_TX PA_2
66+
#define STDIO_UART_RX PA_3
67+
#define STDIO_UART UART_2
6868
#endif
6969

7070
typedef enum {

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