|
3215 | 3215 | "STM32H7",
|
3216 | 3216 | "STM32H743xI"
|
3217 | 3217 | ],
|
| 3218 | + "mbed_rom_start": "0x08000000", |
| 3219 | + "mbed_rom_size" : "0x200000", |
3218 | 3220 | "config": {
|
3219 | 3221 | "d11_configuration": {
|
3220 | 3222 | "help": "Value: PA_7 for the default board configuration, PB_5 in case of solder bridge update (SB121 off/ SB122 on)",
|
|
3264 | 3266 | "NUCLEO_H743ZI2": {
|
3265 | 3267 | "inherits": ["FAMILY_STM32"],
|
3266 | 3268 | "core": "Cortex-M7FD",
|
3267 |
| - "components_add": ["FLASHIAP"], |
3268 | 3269 | "mbed_rom_start": "0x08000000",
|
3269 | 3270 | "mbed_rom_size" : "0x200000",
|
3270 | 3271 | "extra_labels_add": [
|
|
3323 | 3324 | "components_add": ["FLASHIAP"],
|
3324 | 3325 | "mbed_rom_start": "0x08000000",
|
3325 | 3326 | "mbed_rom_size" : "0x100000",
|
| 3327 | + "mbed_ram_start": "0x24000000", |
| 3328 | + "mbed_ram_size" : "0x80000", |
3326 | 3329 | "extra_labels_add": [
|
3327 | 3330 | "STM32H7",
|
3328 | 3331 | "STM32H747xI",
|
|
3360 | 3363 | "MPU"
|
3361 | 3364 | ],
|
3362 | 3365 | "release_versions": ["2", "5"],
|
3363 |
| - "device_name": "STM32H747AGIx", |
| 3366 | + "device_name": "STM32H747XIHx", |
3364 | 3367 | "bootloader_supported": true
|
3365 | 3368 | },
|
3366 | 3369 | "DISCO_H747I_CM4": {
|
|
3372 | 3375 | "DISCO_H747I"
|
3373 | 3376 | ],
|
3374 | 3377 | "components_add": ["FLASHIAP"],
|
| 3378 | + "mbed_rom_start": "0x08100000", |
| 3379 | + "mbed_rom_size" : "0x100000", |
| 3380 | + "mbed_ram_start": "0x10000000", |
| 3381 | + "mbed_ram_size" : "0x48000", |
3375 | 3382 | "config": {
|
3376 | 3383 | "lpticker_lptim": {
|
3377 | 3384 | "help": "This target supports LPTIM. Set value 1 to use LPTIM for LPTICKER, or 0 to use RTC wakeup timer",
|
|
3396 | 3403 | "TRNG",
|
3397 | 3404 | "FLASH",
|
3398 | 3405 | "MPU"
|
3399 |
| - ] |
| 3406 | + ], |
| 3407 | + "device_name": "STM32H747XIHx", |
| 3408 | + "bootloader_supported": true |
3400 | 3409 | },
|
3401 | 3410 | "DISCO_H747I_CM7": {
|
3402 | 3411 | "inherits": ["DISCO_H747I"]
|
|
0 commit comments