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STM32F4: STM32Cube_FW_F4_V1.26.0 - STM32Cube_FW
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‎targets/TARGET_STM/README.md

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -65,7 +65,7 @@ This table summarizes the STM32Cube versions currently used in Mbed OS master br
6565
| F1 | 1.8.0 | https://github.com/STMicroelectronics/STM32CubeF1 |
6666
| F2 | 1.6.0 | https://github.com/STMicroelectronics/STM32CubeF2 |
6767
| F3 | 1.9.0 | https://github.com/STMicroelectronics/STM32CubeF3 |
68-
| F4 | 1.25.0 | https://github.com/STMicroelectronics/STM32CubeF4 |
68+
| F4 | 1.26.0 | https://github.com/STMicroelectronics/STM32CubeF4 |
6969
| F7 | 1.16.0 | https://github.com/STMicroelectronics/STM32CubeF7 |
7070
| G0 | 1.3.0 | https://github.com/STMicroelectronics/STM32CubeG0 |
7171
| G4 | 1.1.0 | https://github.com/STMicroelectronics/STM32CubeG4 |

‎targets/TARGET_STM/TARGET_STM32F4/STM32Cube_FW/CMSIS/stm32f401xc.h

Lines changed: 14 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -2281,17 +2281,18 @@ typedef struct
22812281
/* */
22822282
/******************************************************************************/
22832283
/******************* Bits definition for FLASH_ACR register *****************/
2284-
#define FLASH_ACR_LATENCY_Pos (0U)
2285-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
2286-
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
2287-
#define FLASH_ACR_LATENCY_0WS 0x00000000U
2288-
#define FLASH_ACR_LATENCY_1WS 0x00000001U
2289-
#define FLASH_ACR_LATENCY_2WS 0x00000002U
2290-
#define FLASH_ACR_LATENCY_3WS 0x00000003U
2291-
#define FLASH_ACR_LATENCY_4WS 0x00000004U
2292-
#define FLASH_ACR_LATENCY_5WS 0x00000005U
2293-
#define FLASH_ACR_LATENCY_6WS 0x00000006U
2294-
#define FLASH_ACR_LATENCY_7WS 0x00000007U
2284+
#define FLASH_ACR_LATENCY_Pos (0U)
2285+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
2286+
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
2287+
#define FLASH_ACR_LATENCY_0WS 0x00000000U
2288+
#define FLASH_ACR_LATENCY_1WS 0x00000001U
2289+
#define FLASH_ACR_LATENCY_2WS 0x00000002U
2290+
#define FLASH_ACR_LATENCY_3WS 0x00000003U
2291+
#define FLASH_ACR_LATENCY_4WS 0x00000004U
2292+
#define FLASH_ACR_LATENCY_5WS 0x00000005U
2293+
#define FLASH_ACR_LATENCY_6WS 0x00000006U
2294+
#define FLASH_ACR_LATENCY_7WS 0x00000007U
2295+
22952296

22962297
#define FLASH_ACR_PRFTEN_Pos (8U)
22972298
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
@@ -2538,7 +2539,7 @@ typedef struct
25382539
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
25392540
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
25402541
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
2541-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
2542+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
25422543
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
25432544
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
25442545
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -2569,7 +2570,7 @@ typedef struct
25692570
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
25702571
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
25712572
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
2572-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
2573+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
25732574
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
25742575
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
25752576
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

‎targets/TARGET_STM/TARGET_STM32F4/STM32Cube_FW/CMSIS/stm32f401xe.h

Lines changed: 14 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -2281,17 +2281,18 @@ typedef struct
22812281
/* */
22822282
/******************************************************************************/
22832283
/******************* Bits definition for FLASH_ACR register *****************/
2284-
#define FLASH_ACR_LATENCY_Pos (0U)
2285-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
2286-
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
2287-
#define FLASH_ACR_LATENCY_0WS 0x00000000U
2288-
#define FLASH_ACR_LATENCY_1WS 0x00000001U
2289-
#define FLASH_ACR_LATENCY_2WS 0x00000002U
2290-
#define FLASH_ACR_LATENCY_3WS 0x00000003U
2291-
#define FLASH_ACR_LATENCY_4WS 0x00000004U
2292-
#define FLASH_ACR_LATENCY_5WS 0x00000005U
2293-
#define FLASH_ACR_LATENCY_6WS 0x00000006U
2294-
#define FLASH_ACR_LATENCY_7WS 0x00000007U
2284+
#define FLASH_ACR_LATENCY_Pos (0U)
2285+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
2286+
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
2287+
#define FLASH_ACR_LATENCY_0WS 0x00000000U
2288+
#define FLASH_ACR_LATENCY_1WS 0x00000001U
2289+
#define FLASH_ACR_LATENCY_2WS 0x00000002U
2290+
#define FLASH_ACR_LATENCY_3WS 0x00000003U
2291+
#define FLASH_ACR_LATENCY_4WS 0x00000004U
2292+
#define FLASH_ACR_LATENCY_5WS 0x00000005U
2293+
#define FLASH_ACR_LATENCY_6WS 0x00000006U
2294+
#define FLASH_ACR_LATENCY_7WS 0x00000007U
2295+
22952296

22962297
#define FLASH_ACR_PRFTEN_Pos (8U)
22972298
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
@@ -2538,7 +2539,7 @@ typedef struct
25382539
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
25392540
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
25402541
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
2541-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
2542+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
25422543
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
25432544
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
25442545
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -2569,7 +2570,7 @@ typedef struct
25692570
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
25702571
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
25712572
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
2572-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
2573+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
25732574
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
25742575
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
25752576
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

‎targets/TARGET_STM/TARGET_STM32F4/STM32Cube_FW/CMSIS/stm32f405xx.h

Lines changed: 14 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -6373,17 +6373,18 @@ typedef struct
63736373
/* */
63746374
/******************************************************************************/
63756375
/******************* Bits definition for FLASH_ACR register *****************/
6376-
#define FLASH_ACR_LATENCY_Pos (0U)
6377-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
6378-
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
6379-
#define FLASH_ACR_LATENCY_0WS 0x00000000U
6380-
#define FLASH_ACR_LATENCY_1WS 0x00000001U
6381-
#define FLASH_ACR_LATENCY_2WS 0x00000002U
6382-
#define FLASH_ACR_LATENCY_3WS 0x00000003U
6383-
#define FLASH_ACR_LATENCY_4WS 0x00000004U
6384-
#define FLASH_ACR_LATENCY_5WS 0x00000005U
6385-
#define FLASH_ACR_LATENCY_6WS 0x00000006U
6386-
#define FLASH_ACR_LATENCY_7WS 0x00000007U
6376+
#define FLASH_ACR_LATENCY_Pos (0U)
6377+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
6378+
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
6379+
#define FLASH_ACR_LATENCY_0WS 0x00000000U
6380+
#define FLASH_ACR_LATENCY_1WS 0x00000001U
6381+
#define FLASH_ACR_LATENCY_2WS 0x00000002U
6382+
#define FLASH_ACR_LATENCY_3WS 0x00000003U
6383+
#define FLASH_ACR_LATENCY_4WS 0x00000004U
6384+
#define FLASH_ACR_LATENCY_5WS 0x00000005U
6385+
#define FLASH_ACR_LATENCY_6WS 0x00000006U
6386+
#define FLASH_ACR_LATENCY_7WS 0x00000007U
6387+
63876388

63886389
#define FLASH_ACR_PRFTEN_Pos (8U)
63896390
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
@@ -7822,7 +7823,7 @@ typedef struct
78227823
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
78237824
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
78247825
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
7825-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
7826+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
78267827
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
78277828
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
78287829
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -7853,7 +7854,7 @@ typedef struct
78537854
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
78547855
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
78557856
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
7856-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
7857+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
78577858
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
78587859
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
78597860
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

‎targets/TARGET_STM/TARGET_STM32F4/STM32Cube_FW/CMSIS/stm32f407xx.h

Lines changed: 14 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -6673,17 +6673,18 @@ typedef struct
66736673
/* */
66746674
/******************************************************************************/
66756675
/******************* Bits definition for FLASH_ACR register *****************/
6676-
#define FLASH_ACR_LATENCY_Pos (0U)
6677-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
6678-
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
6679-
#define FLASH_ACR_LATENCY_0WS 0x00000000U
6680-
#define FLASH_ACR_LATENCY_1WS 0x00000001U
6681-
#define FLASH_ACR_LATENCY_2WS 0x00000002U
6682-
#define FLASH_ACR_LATENCY_3WS 0x00000003U
6683-
#define FLASH_ACR_LATENCY_4WS 0x00000004U
6684-
#define FLASH_ACR_LATENCY_5WS 0x00000005U
6685-
#define FLASH_ACR_LATENCY_6WS 0x00000006U
6686-
#define FLASH_ACR_LATENCY_7WS 0x00000007U
6676+
#define FLASH_ACR_LATENCY_Pos (0U)
6677+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
6678+
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
6679+
#define FLASH_ACR_LATENCY_0WS 0x00000000U
6680+
#define FLASH_ACR_LATENCY_1WS 0x00000001U
6681+
#define FLASH_ACR_LATENCY_2WS 0x00000002U
6682+
#define FLASH_ACR_LATENCY_3WS 0x00000003U
6683+
#define FLASH_ACR_LATENCY_4WS 0x00000004U
6684+
#define FLASH_ACR_LATENCY_5WS 0x00000005U
6685+
#define FLASH_ACR_LATENCY_6WS 0x00000006U
6686+
#define FLASH_ACR_LATENCY_7WS 0x00000007U
6687+
66876688

66886689
#define FLASH_ACR_PRFTEN_Pos (8U)
66896690
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
@@ -8122,7 +8123,7 @@ typedef struct
81228123
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
81238124
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
81248125
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
8125-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
8126+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
81268127
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
81278128
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
81288129
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -8153,7 +8154,7 @@ typedef struct
81538154
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
81548155
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
81558156
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
8156-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
8157+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
81578158
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
81588159
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
81598160
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

‎targets/TARGET_STM/TARGET_STM32F4/STM32Cube_FW/CMSIS/stm32f410cx.h

Lines changed: 14 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -2360,17 +2360,18 @@ typedef struct
23602360
/* */
23612361
/******************************************************************************/
23622362
/******************* Bits definition for FLASH_ACR register *****************/
2363-
#define FLASH_ACR_LATENCY_Pos (0U)
2364-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
2365-
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
2366-
#define FLASH_ACR_LATENCY_0WS 0x00000000U
2367-
#define FLASH_ACR_LATENCY_1WS 0x00000001U
2368-
#define FLASH_ACR_LATENCY_2WS 0x00000002U
2369-
#define FLASH_ACR_LATENCY_3WS 0x00000003U
2370-
#define FLASH_ACR_LATENCY_4WS 0x00000004U
2371-
#define FLASH_ACR_LATENCY_5WS 0x00000005U
2372-
#define FLASH_ACR_LATENCY_6WS 0x00000006U
2373-
#define FLASH_ACR_LATENCY_7WS 0x00000007U
2363+
#define FLASH_ACR_LATENCY_Pos (0U)
2364+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
2365+
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
2366+
#define FLASH_ACR_LATENCY_0WS 0x00000000U
2367+
#define FLASH_ACR_LATENCY_1WS 0x00000001U
2368+
#define FLASH_ACR_LATENCY_2WS 0x00000002U
2369+
#define FLASH_ACR_LATENCY_3WS 0x00000003U
2370+
#define FLASH_ACR_LATENCY_4WS 0x00000004U
2371+
#define FLASH_ACR_LATENCY_5WS 0x00000005U
2372+
#define FLASH_ACR_LATENCY_6WS 0x00000006U
2373+
#define FLASH_ACR_LATENCY_7WS 0x00000007U
2374+
23742375

23752376
#define FLASH_ACR_PRFTEN_Pos (8U)
23762377
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
@@ -2617,7 +2618,7 @@ typedef struct
26172618
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
26182619
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
26192620
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
2620-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
2621+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
26212622
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
26222623
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
26232624
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -2648,7 +2649,7 @@ typedef struct
26482649
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
26492650
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
26502651
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
2651-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
2652+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
26522653
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
26532654
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
26542655
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

‎targets/TARGET_STM/TARGET_STM32F4/STM32Cube_FW/CMSIS/stm32f410rx.h

Lines changed: 14 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -2360,17 +2360,18 @@ typedef struct
23602360
/* */
23612361
/******************************************************************************/
23622362
/******************* Bits definition for FLASH_ACR register *****************/
2363-
#define FLASH_ACR_LATENCY_Pos (0U)
2364-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
2365-
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
2366-
#define FLASH_ACR_LATENCY_0WS 0x00000000U
2367-
#define FLASH_ACR_LATENCY_1WS 0x00000001U
2368-
#define FLASH_ACR_LATENCY_2WS 0x00000002U
2369-
#define FLASH_ACR_LATENCY_3WS 0x00000003U
2370-
#define FLASH_ACR_LATENCY_4WS 0x00000004U
2371-
#define FLASH_ACR_LATENCY_5WS 0x00000005U
2372-
#define FLASH_ACR_LATENCY_6WS 0x00000006U
2373-
#define FLASH_ACR_LATENCY_7WS 0x00000007U
2363+
#define FLASH_ACR_LATENCY_Pos (0U)
2364+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
2365+
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
2366+
#define FLASH_ACR_LATENCY_0WS 0x00000000U
2367+
#define FLASH_ACR_LATENCY_1WS 0x00000001U
2368+
#define FLASH_ACR_LATENCY_2WS 0x00000002U
2369+
#define FLASH_ACR_LATENCY_3WS 0x00000003U
2370+
#define FLASH_ACR_LATENCY_4WS 0x00000004U
2371+
#define FLASH_ACR_LATENCY_5WS 0x00000005U
2372+
#define FLASH_ACR_LATENCY_6WS 0x00000006U
2373+
#define FLASH_ACR_LATENCY_7WS 0x00000007U
2374+
23742375

23752376
#define FLASH_ACR_PRFTEN_Pos (8U)
23762377
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
@@ -2617,7 +2618,7 @@ typedef struct
26172618
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
26182619
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
26192620
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
2620-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
2621+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
26212622
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
26222623
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
26232624
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -2648,7 +2649,7 @@ typedef struct
26482649
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
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#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
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#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
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#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
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#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
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#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
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#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
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#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

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