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Cruz Monrreal
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Merge pull request #7201 from codeauroraforum/Fix_ADC_LPC54628
LPC54628: Update the ADC clock divider based on the input clock source
2 parents f54067d + 8c60982 commit f2b72b9

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+16
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targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC/analogin_api.c

Lines changed: 16 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -30,9 +30,13 @@ static ADC_Type *const adc_addrs[] = ADC_BASE_PTRS;
3030
extern void ADC_ClockPower_Configuration(void);
3131

3232
#define MAX_FADC 6000000
33+
#define MAX_ADC_CLOCK 80000000
3334

3435
void analogin_init(analogin_t *obj, PinName pin)
3536
{
37+
uint32_t clkval;
38+
uint32_t clkdiv = 1;
39+
3640
obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
3741
MBED_ASSERT(obj->adc != (ADCName)NC);
3842

@@ -42,23 +46,29 @@ void analogin_init(analogin_t *obj, PinName pin)
4246
uint32_t pin_number = pin & 0x1F;
4347
uint8_t port_number = pin / 32;
4448

45-
/* Clear the DIGIMODE bit */
46-
reg = IOCON->PIO[port_number][pin_number] & ~IOCON_PIO_DIGIMODE_MASK;
47-
IOCON->PIO[port_number][pin_number] = reg;
48-
4949
ADC_ClockPower_Configuration();
5050

51+
/* Ensure the ADC clock derived from the system clock is less than 80MHz */
52+
clkval = CLOCK_GetFreq(kCLOCK_CoreSysClk);
53+
while ((clkval / clkdiv) > MAX_ADC_CLOCK) {
54+
clkdiv++;
55+
}
56+
5157
/* Calibration after power up. */
5258
if (!(ADC_DoSelfCalibration(adc_addrs[instance]))) {
5359
/* Calibration failed */
5460
return;
5561
}
5662

5763
ADC_GetDefaultConfig(&adc_config);
58-
adc_config.clockDividerNumber = 1;
64+
adc_config.clockDividerNumber = clkdiv;
5965

6066
ADC_Init(adc_addrs[instance], &adc_config);
6167
pinmap_pinout(pin, PinMap_ADC);
68+
69+
/* Clear the DIGIMODE bit */
70+
reg = IOCON->PIO[port_number][pin_number] & ~IOCON_PIO_DIGIMODE_MASK;
71+
IOCON->PIO[port_number][pin_number] = reg;
6272
}
6373

6474
uint16_t analogin_read_u16(analogin_t *obj)
@@ -70,7 +80,7 @@ uint16_t analogin_read_u16(analogin_t *obj)
7080

7181
adcConvSeqConfigStruct.channelMask = (1U << channel);
7282
adcConvSeqConfigStruct.triggerMask = 0U;
73-
adcConvSeqConfigStruct.triggerPolarity = kADC_TriggerPolarityNegativeEdge;
83+
adcConvSeqConfigStruct.triggerPolarity = kADC_TriggerPolarityPositiveEdge;
7484
adcConvSeqConfigStruct.enableSingleStep = false;
7585
adcConvSeqConfigStruct.enableSyncBypass = false;
7686
adcConvSeqConfigStruct.interruptMode = kADC_InterruptForEachSequence;

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