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hjjeon0608hjjeon0608
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Add InterruptIn function.
Now we support InterruptIn.
1 parent f149bda commit f34ee0d

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7 files changed

+274
-70
lines changed

7 files changed

+274
-70
lines changed

‎libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/PinNames.h

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -53,9 +53,9 @@ extern "C" {
5353
#define WIZ_GPIO_OPEN_DRAIN (3) /*!< Open Drain activation */
5454

5555

56-
#define WIZ_AFNUM(X)(((uint32_t)(X) >> 8) & 0xF) // AF number (0=AF0, 1=AF1, 2=AF2, 3=AF3)
5756
#define WIZ_PORT(X) (((uint32_t)(X) >> 4) & 0xF) // port number (0=A, 1=B, 2=C, 3=D)
58-
#define WIZ_PIN(X) ((uint32_t)(X) & 0xF) // pin number
57+
#define WIZ_PIN_NUM(X) ((uint32_t)(X) & 0xF) // pin number
58+
#define WIZ_PIN_INDEX(X) (1 << ((uint32_t)(X) & 0xF)) // pin index : flag bit
5959

6060

6161
typedef enum {
@@ -100,25 +100,25 @@ typedef enum {
100100
PB_13 = 0x01D,
101101
PB_14 = 0x01E,
102102
PB_15 = 0x01F,
103-
104-
PC_0 = 0x120, // 0xx:U_CTS1, 1xx:GPIOC_0, 2xx:PWM0
105-
PC_1 = 0x121, // 0xx:U_RTS1, 1xx:GPIOC_1, 2xx:PWM1
103+
104+
PC_0 = 0x020, // 0xx:U_CTS1, 1xx:GPIOC_0, 2xx:PWM0
105+
PC_1 = 0x021, // 0xx:U_RTS1, 1xx:GPIOC_1, 2xx:PWM1
106106
PC_2 = 0x022,
107107
PC_3 = 0x023,
108-
PC_4 = 0x124, // 0xx:SDA1, 1xx:GPIOC_4, 2xx:PWM4
108+
PC_4 = 0x024, // 0xx:SDA1, 1xx:GPIOC_4, 2xx:PWM4
109109
PC_5 = 0x025,
110110
PC_6 = 0x026,
111111
PC_7 = 0x027,
112-
PC_8 = 0x128, // 0xx:PWM0, 1xx:GPIOC_8, 2xx:SCL0, 3xx:AIN7
113-
PC_9 = 0x129, // 0xx:PWM1, 1xx:GPIOC_9, 2xx:SDA0, 3xx:AIN6
114-
115-
PC_10 = 0x32A, // 0xx:U_TXD2, 1xx:GPIOC_10, 2xx:PWM2, 3xx:AIN5
116-
PC_11 = 0x32B, // 0xx:U_RXD2, 1xx:GPIOC_11, 2xx:PWM3, 3xx:AIN4
117-
PC_12 = 0x32C, // 0xx:AIN3, 1xx:GPIOC_12, 2xx:SSEL0, 3xx:AIN3
118-
PC_13 = 0x32D, // 0xx:AIN2, 1xx:GPIOC_13, 2xx:SCLK0, 3xx:AIN2
119-
PC_14 = 0x32E, // 0xx:AIN1, 1xx:GPIOC_14, 2xx:MISO0, 3xx:AIN1
120-
PC_15 = 0x32F, // 0xx:AIN0, 1xx:GPIOC_15, 2xx:MOSI0, 3xx:AIN0
121-
112+
PC_8 = 0x028, // 0xx:PWM0, 1xx:GPIOC_8, 2xx:SCL0, 3xx:AIN7
113+
PC_9 = 0x029, // 0xx:PWM1, 1xx:GPIOC_9, 2xx:SDA0, 3xx:AIN6
114+
115+
PC_10 = 0x02A, // 0xx:U_TXD2, 1xx:GPIOC_10, 2xx:PWM2, 3xx:AIN5
116+
PC_11 = 0x02B, // 0xx:U_RXD2, 1xx:GPIOC_11, 2xx:PWM3, 3xx:AIN4
117+
PC_12 = 0x02C, // 0xx:AIN3, 1xx:GPIOC_12, 2xx:SSEL0, 3xx:AIN3
118+
PC_13 = 0x02D, // 0xx:AIN2, 1xx:GPIOC_13, 2xx:SCLK0, 3xx:AIN2
119+
PC_14 = 0x02E, // 0xx:AIN1, 1xx:GPIOC_14, 2xx:MISO0, 3xx:AIN1
120+
PC_15 = 0x02F, // 0xx:AIN0, 1xx:GPIOC_15, 2xx:MOSI0, 3xx:AIN0
121+
122122
PD_0 = 0x030,
123123
PD_1 = 0x031,
124124
PD_2 = 0x032,

‎libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/objects.h

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,9 +43,13 @@ extern "C" {
4343

4444
struct gpio_irq_s {
4545
IRQn_Type irq_n;
46-
uint32_t irq_index;
4746
uint32_t event;
4847
PinName pin;
48+
uint32_t pin_index;
49+
uint32_t pin_num;
50+
uint32_t port_num;
51+
uint32_t rise_null;
52+
uint32_t fall_null;
4953
};
5054

5155
struct port_s {

‎libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/gpio_api.c

Lines changed: 14 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -34,28 +34,25 @@
3434

3535
extern uint32_t Get_GPIO_BaseAddress(uint32_t port_idx);
3636

37-
uint32_t gpio_set(PinName pin)
38-
{
39-
MBED_ASSERT(pin != (PinName)NC);
37+
//uint32_t gpio_set(PinName pin)
38+
//{
39+
// MBED_ASSERT(pin != (PinName)NC);
4040

41-
pin_function(pin, WIZ_PIN_DATA(WIZ_MODE_INPUT, WIZ_GPIO_NOPULL, 0));
41+
// //pin_function(pin, WIZ_PIN_DATA(WIZ_MODE_INPUT, WIZ_GPIO_NOPULL, 1));
4242

43-
return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask
44-
}
43+
// return (uint32_t)(1 << ((uint32_t)pin & 0xF)); // Return the pin mask
44+
//}
4545

4646
void gpio_init(gpio_t *obj, PinName pin)
4747
{
48-
obj->pin = pin;
4948
if (pin == (PinName)NC) {
5049
return;
5150
}
52-
53-
uint32_t port_index = WIZ_PORT(pin);
54-
55-
GPIO_TypeDef *gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(port_index);
56-
57-
// Fill GPIO object structure for future use
58-
obj->mask = gpio_set(pin);
51+
52+
obj->port_num = WIZ_PORT(pin);
53+
obj->pin_index = WIZ_PIN_INDEX(pin);
54+
obj->pin = pin;
55+
GPIO_TypeDef *gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(obj->port_num);
5956
obj->reg_data_in = &gpio->DATA;
6057
}
6158

@@ -69,9 +66,9 @@ void gpio_dir(gpio_t *obj, PinDirection direction)
6966
MBED_ASSERT(obj->pin != (PinName)NC);
7067
obj->direction = direction;
7168

72-
if (direction == PIN_OUTPUT) {
73-
pin_function(obj->pin, WIZ_PIN_DATA(WIZ_MODE_OUTPUT, WIZ_GPIO_NOPULL, 0));
69+
if (direction == PIN_OUTPUT) {
70+
pin_function(obj->pin, WIZ_PIN_DATA(WIZ_MODE_OUTPUT, WIZ_GPIO_NOPULL, 1));
7471
} else { // PIN_INPUT
75-
pin_function(obj->pin, WIZ_PIN_DATA(WIZ_MODE_INPUT, WIZ_GPIO_NOPULL, 0));
72+
pin_function(obj->pin, WIZ_PIN_DATA(WIZ_MODE_INPUT, WIZ_GPIO_NOPULL, 1));
7673
}
7774
}

‎libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/gpio_irq_api.c

Lines changed: 210 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,210 @@
1+
/* mbed Microcontroller Library
2+
*******************************************************************************
3+
* Copyright (c) 2015 WIZnet Co.,Ltd. All rights reserved.
4+
* All rights reserved.
5+
*
6+
* Redistribution and use in source and binary forms, with or without
7+
* modification, are permitted provided that the following conditions are met:
8+
*
9+
* 1. Redistributions of source code must retain the above copyright notice,
10+
* this list of conditions and the following disclaimer.
11+
* 2. Redistributions in binary form must reproduce the above copyright notice,
12+
* this list of conditions and the following disclaimer in the documentation
13+
* and/or other materials provided with the distribution.
14+
* 3. Neither the name of ARM Limited nor the names of its contributors
15+
* may be used to endorse or promote products derived from this software
16+
* without specific prior written permission.
17+
*
18+
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19+
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20+
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
21+
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
22+
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23+
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24+
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
25+
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26+
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27+
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28+
*******************************************************************************
29+
*/
30+
31+
#include <stddef.h>
32+
#include "cmsis.h"
33+
#include "gpio_irq_api.h"
34+
#include "pinmap.h"
35+
#include "mbed_error.h"
36+
37+
#define EDGE_NONE (0)
38+
#define EDGE_RISE (1)
39+
#define EDGE_FALL (2)
40+
#define EDGE_BOTH (3)
41+
42+
static gpio_irq_handler irq_handler;
43+
44+
45+
//typedef struct {
46+
// uint32_t port[4];
47+
// uint32_t pin[16];
48+
// uint32_t ids;
49+
//} irq_channel;
50+
51+
static uint32_t channel_ids[4][16];
52+
53+
#ifdef __cplusplus
54+
extern "C"{
55+
#endif
56+
57+
58+
void PORT0_Handler(void)
59+
{
60+
int i = 0;
61+
62+
for(i=0; i<16; i++)
63+
{
64+
if(GPIOA->Interrupt.INTSTATUS & (1 << i))
65+
{
66+
GPIOA->Interrupt.INTCLEAR |= (1 << i);
67+
if(GPIOA->INTPOLSET >> i) //rising
68+
irq_handler(channel_ids[0][i], IRQ_RISE);
69+
else //falling
70+
irq_handler(channel_ids[0][i], IRQ_FALL);
71+
}
72+
}
73+
}
74+
75+
void PORT1_Handler(void)
76+
{
77+
int i = 0;
78+
79+
for(i=0; i<16; i++)
80+
{
81+
if(GPIOB->Interrupt.INTSTATUS & (1 << i))
82+
{
83+
GPIOB->Interrupt.INTCLEAR |= (1 << i);
84+
if(GPIOB->INTPOLSET >> i) //rising
85+
irq_handler(channel_ids[0][i], IRQ_RISE);
86+
else //falling
87+
irq_handler(channel_ids[0][i], IRQ_FALL);
88+
}
89+
}
90+
}
91+
92+
void PORT2_Handler(void)
93+
{
94+
int i = 0;
95+
96+
for(i=0; i<16; i++)
97+
{
98+
if(GPIOC->Interrupt.INTSTATUS & (1 << i))
99+
{
100+
GPIOC->Interrupt.INTCLEAR |= (1 << i);
101+
if(GPIOC->INTPOLSET >> i) //rising
102+
irq_handler(channel_ids[0][i], IRQ_RISE);
103+
else //falling
104+
irq_handler(channel_ids[0][i], IRQ_FALL);
105+
}
106+
}
107+
}
108+
109+
void PORT3_Handler(void)
110+
{
111+
int i;
112+
113+
for(i=0; i<5; i++)
114+
{
115+
if(GPIOD->Interrupt.INTSTATUS & (1 << i))
116+
{
117+
GPIOD->Interrupt.INTCLEAR |= (1 << i);
118+
if(GPIOD->INTPOLSET >> i) //rising
119+
irq_handler(channel_ids[0][i], IRQ_RISE);
120+
else //falling
121+
irq_handler(channel_ids[0][i], IRQ_FALL);
122+
}
123+
}
124+
}
125+
126+
#ifdef __cplusplus
127+
}
128+
#endif
129+
130+
131+
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
132+
{
133+
obj->port_num = WIZ_PORT(pin);
134+
obj->pin_num = WIZ_PIN_NUM(pin);
135+
obj->pin_index = WIZ_PIN_INDEX(pin);
136+
137+
if (pin == NC) return -1;
138+
139+
if(obj->port_num == 0)
140+
obj->irq_n = PORT0_IRQn;
141+
else if(obj->port_num == 1)
142+
obj->irq_n = PORT1_IRQn;
143+
else if(obj->port_num == 2)
144+
obj->irq_n = PORT2_IRQn;
145+
else
146+
obj->irq_n = PORT3_IRQn;
147+
148+
//obj->event = EDGE_FALL;
149+
obj->pin = pin;
150+
151+
// Enable EXTI interrupt
152+
NVIC_EnableIRQ(obj->irq_n);
153+
154+
channel_ids[obj->port_num][obj->pin_num] = id;
155+
156+
irq_handler = handler;
157+
158+
return 0;
159+
}
160+
161+
void gpio_irq_free(gpio_irq_t *obj)
162+
{
163+
channel_ids[obj->port_num][obj->pin_num] = 0;
164+
165+
obj->event = EDGE_NONE;
166+
}
167+
168+
void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
169+
{
170+
GPIO_TypeDef *gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(obj->port_num);
171+
172+
if (enable) {
173+
if (event == IRQ_RISE) {
174+
gpio->INTPOLSET |= obj->pin_index;
175+
obj->event = EDGE_RISE;
176+
obj->rise_null = 0;
177+
}
178+
else if (event == IRQ_FALL) {
179+
gpio->INTPOLSET &= ~obj->pin_index;
180+
obj->event = EDGE_FALL;
181+
obj->fall_null = 0;
182+
}
183+
gpio->INTTYPESET |= obj->pin_index;
184+
gpio->INTENSET |= obj->pin_index;
185+
186+
187+
} else {
188+
if (event == IRQ_RISE) {
189+
obj->rise_null = 1;
190+
if(obj->fall_null)
191+
gpio->INTENCLR |= obj->pin_index;
192+
}
193+
else if (event == IRQ_FALL) {
194+
obj->fall_null = 1;
195+
if(obj->rise_null)
196+
gpio->INTENCLR |= obj->pin_index;
197+
}
198+
}
199+
}
200+
201+
void gpio_irq_enable(gpio_irq_t *obj)
202+
{
203+
NVIC_EnableIRQ(obj->irq_n);
204+
}
205+
206+
void gpio_irq_disable(gpio_irq_t *obj)
207+
{
208+
NVIC_DisableIRQ(obj->irq_n);
209+
obj->event = EDGE_NONE;
210+
}

‎libraries/mbed/targets/hal/TARGET_WIZNET/TARGET_W7500x/gpio_object.h

Lines changed: 12 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,8 @@ extern "C" {
3939

4040
typedef struct {
4141
PinName pin;
42-
uint32_t mask;
42+
uint32_t pin_index;
43+
uint32_t port_num;
4344
uint32_t direction;
4445
__IO uint32_t *reg_data_in;
4546
} gpio_t;
@@ -51,20 +52,19 @@ extern uint32_t Get_GPIO_BaseAddress(uint32_t port_idx);
5152
static inline void gpio_write(gpio_t *obj, int value) {
5253
MBED_ASSERT(obj->pin != (PinName)NC);
5354

54-
uint32_t port_index = WIZ_PORT(obj->pin);
55-
uint32_t pin_index = WIZ_PIN(obj->pin);
56-
57-
uint32_t gpio_add = Get_GPIO_BaseAddress(port_index);
58-
GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
55+
uint32_t port_num = WIZ_PORT(obj->pin);
56+
uint32_t pin_index = WIZ_PIN_INDEX(obj->pin);
5957

58+
GPIO_TypeDef *gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(port_num);
59+
6060

6161
if (value)
6262
{
63-
HAL_GPIO_SetBits(gpio,(0x01 << pin_index));
63+
HAL_GPIO_SetBits(gpio, pin_index);
6464
}
6565
else
6666
{
67-
HAL_GPIO_ResetBits(gpio,(0x01 << pin_index));
67+
HAL_GPIO_ResetBits(gpio, pin_index);
6868
}
6969
}
7070

@@ -73,18 +73,17 @@ static inline int gpio_read(gpio_t *obj) {
7373

7474
MBED_ASSERT(obj->pin != (PinName)NC);
7575

76-
uint32_t port_index = WIZ_PORT(obj->pin);
76+
uint32_t port_num = WIZ_PORT(obj->pin);
7777

78-
uint32_t gpio_add = Get_GPIO_BaseAddress(port_index);
79-
GPIO_TypeDef *gpio = (GPIO_TypeDef *)gpio_add;
78+
GPIO_TypeDef *gpio = (GPIO_TypeDef *)Get_GPIO_BaseAddress(port_num);
8079

8180
if(obj->direction == PIN_OUTPUT)
8281
{
83-
ret = ( HAL_GPIO_ReadOutputData(gpio) & obj->mask ) ? 1 : 0;
82+
ret = ( HAL_GPIO_ReadOutputData(gpio) & obj->pin_index ) ? 1 : 0;
8483
}
8584
else
8685
{
87-
ret = ((*obj->reg_data_in & obj->mask) ? 1 : 0);
86+
ret = ((*obj->reg_data_in & obj->pin_index) ? 1 : 0);
8887
}
8988

9089
return ret;

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