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Ashok Rao0xc0170
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Adding STM32_F429 + S2_LP (WiSUN) as a new MTB target
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+21
-6
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5 files changed

+21
-6
lines changed

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PeripheralNames.h

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@@ -1,4 +1,5 @@
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/* mbed Microcontroller Library
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* SPDX-License-Identifier: BSD-3-Clause
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*******************************************************************************
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* Copyright (c) 2016, STMicroelectronics
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* All rights reserved.
@@ -57,6 +58,7 @@ typedef enum {
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UART_8 = (int)UART8_BASE
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} UARTName;
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#define SPI_COUNT 6
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typedef enum {
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SPI_1 = (int)SPI1_BASE,
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SPI_2 = (int)SPI2_BASE,

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PeripheralPins.c

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/* mbed Microcontroller Library
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* SPDX-License-Identifier: BSD-3-Clause
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*******************************************************************************
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* Copyright (c) 2018, STMicroelectronics
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* All rights reserved.

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/PinNames.h

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/* mbed Microcontroller Library
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* SPDX-License-Identifier: BSD-3-Clause
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*******************************************************************************
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* Copyright (c) 2018, STMicroelectronics
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* All rights reserved.

targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/TARGET_MTB_STM_S2LP/system_clock.c

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@@ -30,7 +30,7 @@
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**/
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#include "stm32f4xx.h"
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#include "nvic_addr.h"
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#include "mbed_error.h"
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// clock source is selected with CLOCK_SOURCE in json config
@@ -56,6 +56,10 @@ uint8_t SetSysClock_PLL_HSI(void);
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*/
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void SystemInit(void)
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{
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/* FPU settings ------------------------------------------------------------*/
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#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
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SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10 and CP11 Full Access */
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#endif
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/* Reset the RCC clock configuration to the default reset state ------------*/
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/* Set HSION bit */
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RCC->CR |= (uint32_t)0x00000001;
@@ -79,6 +83,13 @@ void SystemInit(void)
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SystemInit_ExtMemCtl();
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#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
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/* Configure the Vector Table location add offset address ------------------*/
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#ifdef VECT_TAB_SRAM
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SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
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#else
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SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
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#endif
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}
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/**
@@ -226,4 +237,4 @@ uint8_t SetSysClock_PLL_HSI(void)
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return 1;
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}
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#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
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#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */

targets/targets.json

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@@ -2834,8 +2834,8 @@
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"core": "Cortex-M4F",
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"config": {
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"clock_source": {
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"help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
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"value": "USE_PLL_HSE_EXTC|USE_PLL_HSI|USE_PLL_HSE_XTAL",
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"help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL (8MHz) | USE_PLL_HSI",
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"value": "USE_PLL_HSE_XTAL",
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"macro_name": "CLOCK_SOURCE"
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},
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"clock_source_usb": {
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},
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"extra_labels_add": ["STM32F4", "STM32F429", "STM32F429ZI", "STM32F429xx", "STM32F429xI"],
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"macros_add": ["USB_STM_HAL"],
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"device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "SERIAL_FC", "TRNG", "FLASH"],
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"device_has_add": ["ANALOGOUT", "CAN", "SERIAL_ASYNCH", "TRNG", "FLASH", "MPU"],
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"detect_code": ["0467"],
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"release_versions": ["5"],
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"device_name": "STM32F429VI",
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"device_name": "STM32F429ZI",
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"bootloader_supported": true
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},
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"NUCLEO_F439ZI": {

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