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Merge branch 'master' of https://github.com/mbedmicro/mbed
2 parents 724bf1d + 8431561 commit f47daa9

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3 files changed

+5
-7
lines changed

3 files changed

+5
-7
lines changed

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/PeripheralPins.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@
1919

2020
/************RTC***************/
2121
const PinMap PinMap_RTC[] = {
22-
{PTC1, RTC_CLKIN, 2},
22+
{PTC1, RTC_CLKIN, 1},
2323
};
2424

2525
/************ADC***************/

libraries/mbed/targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/PeripheralPins.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@
1818

1919
/************RTC***************/
2020
const PinMap PinMap_RTC[] = {
21-
{PTC1, RTC_CLKIN, 2},
21+
{PTC1, RTC_CLKIN, 1},
2222
};
2323

2424
/************ADC***************/

libraries/mbed/targets/hal/TARGET_NXP/TARGET_LPC176X/serial_api.c

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -364,12 +364,10 @@ int serial_readable(serial_t *obj) {
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}
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366366
int serial_writable(serial_t *obj) {
367-
int isWritable = 1;
368367
if (NC != uart_data[obj->index].sw_cts.pin)
369-
isWritable = gpio_read(&uart_data[obj->index].sw_cts) == 0;
370-
if (isWritable)
371-
isWritable = obj->uart->LSR & 0x40;
372-
return isWritable;
368+
return (gpio_read(&uart_data[obj->index].sw_cts) == 0) && (obj->uart->LSR & 0x40); //If flow control: writable if CTS low + UART done
369+
else
370+
return obj->uart->LSR & 0x20; //No flow control: writable if space in holding register
373371
}
374372

375373
void serial_clear(serial_t *obj) {

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