|
| 1 | +/*! |
| 2 | + \file gd32e10x_bkp.h |
| 3 | + \brief definitions for the BKP |
| 4 | +
|
| 5 | + \version 2017-12-26, V1.0.0, firmware for GD32E10x |
| 6 | + \version 2018-12-20, V1.1.0, firmware for GD32E10x(The version is for mbed) |
| 7 | +*/ |
| 8 | + |
| 9 | +/* |
| 10 | + Copyright (c) 2018, GigaDevice Semiconductor Inc. |
| 11 | +
|
| 12 | + All rights reserved. |
| 13 | +
|
| 14 | + Redistribution and use in source and binary forms, with or without modification, |
| 15 | +are permitted provided that the following conditions are met: |
| 16 | +
|
| 17 | + 1. Redistributions of source code must retain the above copyright notice, this |
| 18 | + list of conditions and the following disclaimer. |
| 19 | + 2. Redistributions in binary form must reproduce the above copyright notice, |
| 20 | + this list of conditions and the following disclaimer in the documentation |
| 21 | + and/or other materials provided with the distribution. |
| 22 | + 3. Neither the name of the copyright holder nor the names of its contributors |
| 23 | + may be used to endorse or promote products derived from this software without |
| 24 | + specific prior written permission. |
| 25 | +
|
| 26 | + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 27 | +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 28 | +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 29 | +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, |
| 30 | +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 31 | +NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
| 32 | +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 33 | +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 34 | +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY |
| 35 | +OF SUCH DAMAGE. |
| 36 | +*/ |
| 37 | + |
| 38 | +#ifndef GD32E10X_BKP_H |
| 39 | +#define GD32E10X_BKP_H |
| 40 | + |
| 41 | +#include "gd32e10x.h" |
| 42 | + |
| 43 | +/* BKP definitions */ |
| 44 | +#define BKP BKP_BASE /*!< BKP base address */ |
| 45 | + |
| 46 | +/* registers definitions */ |
| 47 | +#define BKP_DATA0 REG16((BKP) + 0x04U) /*!< BKP data register 0 */ |
| 48 | +#define BKP_DATA1 REG16((BKP) + 0x08U) /*!< BKP data register 1 */ |
| 49 | +#define BKP_DATA2 REG16((BKP) + 0x0CU) /*!< BKP data register 2 */ |
| 50 | +#define BKP_DATA3 REG16((BKP) + 0x10U) /*!< BKP data register 3 */ |
| 51 | +#define BKP_DATA4 REG16((BKP) + 0x14U) /*!< BKP data register 4 */ |
| 52 | +#define BKP_DATA5 REG16((BKP) + 0x18U) /*!< BKP data register 5 */ |
| 53 | +#define BKP_DATA6 REG16((BKP) + 0x1CU) /*!< BKP data register 6 */ |
| 54 | +#define BKP_DATA7 REG16((BKP) + 0x20U) /*!< BKP data register 7 */ |
| 55 | +#define BKP_DATA8 REG16((BKP) + 0x24U) /*!< BKP data register 8 */ |
| 56 | +#define BKP_DATA9 REG16((BKP) + 0x28U) /*!< BKP data register 9 */ |
| 57 | +#define BKP_DATA10 REG16((BKP) + 0x40U) /*!< BKP data register 10 */ |
| 58 | +#define BKP_DATA11 REG16((BKP) + 0x44U) /*!< BKP data register 11 */ |
| 59 | +#define BKP_DATA12 REG16((BKP) + 0x48U) /*!< BKP data register 12 */ |
| 60 | +#define BKP_DATA13 REG16((BKP) + 0x4CU) /*!< BKP data register 13 */ |
| 61 | +#define BKP_DATA14 REG16((BKP) + 0x50U) /*!< BKP data register 14 */ |
| 62 | +#define BKP_DATA15 REG16((BKP) + 0x54U) /*!< BKP data register 15 */ |
| 63 | +#define BKP_DATA16 REG16((BKP) + 0x58U) /*!< BKP data register 16 */ |
| 64 | +#define BKP_DATA17 REG16((BKP) + 0x5CU) /*!< BKP data register 17 */ |
| 65 | +#define BKP_DATA18 REG16((BKP) + 0x60U) /*!< BKP data register 18 */ |
| 66 | +#define BKP_DATA19 REG16((BKP) + 0x64U) /*!< BKP data register 19 */ |
| 67 | +#define BKP_DATA20 REG16((BKP) + 0x68U) /*!< BKP data register 20 */ |
| 68 | +#define BKP_DATA21 REG16((BKP) + 0x6CU) /*!< BKP data register 21 */ |
| 69 | +#define BKP_DATA22 REG16((BKP) + 0x70U) /*!< BKP data register 22 */ |
| 70 | +#define BKP_DATA23 REG16((BKP) + 0x74U) /*!< BKP data register 23 */ |
| 71 | +#define BKP_DATA24 REG16((BKP) + 0x78U) /*!< BKP data register 24 */ |
| 72 | +#define BKP_DATA25 REG16((BKP) + 0x7CU) /*!< BKP data register 25 */ |
| 73 | +#define BKP_DATA26 REG16((BKP) + 0x80U) /*!< BKP data register 26 */ |
| 74 | +#define BKP_DATA27 REG16((BKP) + 0x84U) /*!< BKP data register 27 */ |
| 75 | +#define BKP_DATA28 REG16((BKP) + 0x88U) /*!< BKP data register 28 */ |
| 76 | +#define BKP_DATA29 REG16((BKP) + 0x8CU) /*!< BKP data register 29 */ |
| 77 | +#define BKP_DATA30 REG16((BKP) + 0x90U) /*!< BKP data register 30 */ |
| 78 | +#define BKP_DATA31 REG16((BKP) + 0x94U) /*!< BKP data register 31 */ |
| 79 | +#define BKP_DATA32 REG16((BKP) + 0x98U) /*!< BKP data register 32 */ |
| 80 | +#define BKP_DATA33 REG16((BKP) + 0x9CU) /*!< BKP data register 33 */ |
| 81 | +#define BKP_DATA34 REG16((BKP) + 0xA0U) /*!< BKP data register 34 */ |
| 82 | +#define BKP_DATA35 REG16((BKP) + 0xA4U) /*!< BKP data register 35 */ |
| 83 | +#define BKP_DATA36 REG16((BKP) + 0xA8U) /*!< BKP data register 36 */ |
| 84 | +#define BKP_DATA37 REG16((BKP) + 0xACU) /*!< BKP data register 37 */ |
| 85 | +#define BKP_DATA38 REG16((BKP) + 0xB0U) /*!< BKP data register 38 */ |
| 86 | +#define BKP_DATA39 REG16((BKP) + 0xB4U) /*!< BKP data register 39 */ |
| 87 | +#define BKP_DATA40 REG16((BKP) + 0xB8U) /*!< BKP data register 40 */ |
| 88 | +#define BKP_DATA41 REG16((BKP) + 0xBCU) /*!< BKP data register 41 */ |
| 89 | +#define BKP_OCTL REG16((BKP) + 0x2CU) /*!< RTC signal output control register */ |
| 90 | +#define BKP_TPCTL REG16((BKP) + 0x30U) /*!< tamper pin control register */ |
| 91 | +#define BKP_TPCS REG16((BKP) + 0x34U) /*!< tamper control and status register */ |
| 92 | + |
| 93 | +/* bits definitions */ |
| 94 | +/* BKP_DATA */ |
| 95 | +#define BKP_DATA BITS(0,15) /*!< backup data */ |
| 96 | + |
| 97 | +/* BKP_OCTL */ |
| 98 | +#define BKP_OCTL_RCCV BITS(0,6) /*!< RTC clock calibration value */ |
| 99 | +#define BKP_OCTL_COEN BIT(7) /*!< RTC clock calibration output enable */ |
| 100 | +#define BKP_OCTL_ASOEN BIT(8) /*!< RTC alarm or second signal output enable */ |
| 101 | +#define BKP_OCTL_ROSEL BIT(9) /*!< RTC output selection */ |
| 102 | +#define BKP_OCTL_CCOSEL BIT(14) /*!< RTC clock output selection */ |
| 103 | +#define BKP_OCTL_CALDIR BIT(15) /*!< RTC clock calibration direction */ |
| 104 | + |
| 105 | +/* BKP_TPCTL */ |
| 106 | +#define BKP_TPCTL_TPEN BIT(0) /*!< tamper detection enable */ |
| 107 | +#define BKP_TPCTL_TPAL BIT(1) /*!< tamper pin active level */ |
| 108 | + |
| 109 | +/* BKP_TPCS */ |
| 110 | +#define BKP_TPCS_TER BIT(0) /*!< tamper event reset */ |
| 111 | +#define BKP_TPCS_TIR BIT(1) /*!< tamper interrupt reset */ |
| 112 | +#define BKP_TPCS_TPIE BIT(2) /*!< tamper interrupt enable */ |
| 113 | +#define BKP_TPCS_TEF BIT(8) /*!< tamper event flag */ |
| 114 | +#define BKP_TPCS_TIF BIT(9) /*!< tamper interrupt flag */ |
| 115 | + |
| 116 | +/* constants definitions */ |
| 117 | +/* BKP data register number */ |
| 118 | +typedef enum { |
| 119 | + BKP_DATA_0 = 1, /*!< BKP data register 0 */ |
| 120 | + BKP_DATA_1, /*!< BKP data register 1 */ |
| 121 | + BKP_DATA_2, /*!< BKP data register 2 */ |
| 122 | + BKP_DATA_3, /*!< BKP data register 3 */ |
| 123 | + BKP_DATA_4, /*!< BKP data register 4 */ |
| 124 | + BKP_DATA_5, /*!< BKP data register 5 */ |
| 125 | + BKP_DATA_6, /*!< BKP data register 6 */ |
| 126 | + BKP_DATA_7, /*!< BKP data register 7 */ |
| 127 | + BKP_DATA_8, /*!< BKP data register 8 */ |
| 128 | + BKP_DATA_9, /*!< BKP data register 9 */ |
| 129 | + BKP_DATA_10, /*!< BKP data register 10 */ |
| 130 | + BKP_DATA_11, /*!< BKP data register 11 */ |
| 131 | + BKP_DATA_12, /*!< BKP data register 12 */ |
| 132 | + BKP_DATA_13, /*!< BKP data register 13 */ |
| 133 | + BKP_DATA_14, /*!< BKP data register 14 */ |
| 134 | + BKP_DATA_15, /*!< BKP data register 15 */ |
| 135 | + BKP_DATA_16, /*!< BKP data register 16 */ |
| 136 | + BKP_DATA_17, /*!< BKP data register 17 */ |
| 137 | + BKP_DATA_18, /*!< BKP data register 18 */ |
| 138 | + BKP_DATA_19, /*!< BKP data register 19 */ |
| 139 | + BKP_DATA_20, /*!< BKP data register 20 */ |
| 140 | + BKP_DATA_21, /*!< BKP data register 21 */ |
| 141 | + BKP_DATA_22, /*!< BKP data register 22 */ |
| 142 | + BKP_DATA_23, /*!< BKP data register 23 */ |
| 143 | + BKP_DATA_24, /*!< BKP data register 24 */ |
| 144 | + BKP_DATA_25, /*!< BKP data register 25 */ |
| 145 | + BKP_DATA_26, /*!< BKP data register 26 */ |
| 146 | + BKP_DATA_27, /*!< BKP data register 27 */ |
| 147 | + BKP_DATA_28, /*!< BKP data register 28 */ |
| 148 | + BKP_DATA_29, /*!< BKP data register 29 */ |
| 149 | + BKP_DATA_30, /*!< BKP data register 30 */ |
| 150 | + BKP_DATA_31, /*!< BKP data register 31 */ |
| 151 | + BKP_DATA_32, /*!< BKP data register 32 */ |
| 152 | + BKP_DATA_33, /*!< BKP data register 33 */ |
| 153 | + BKP_DATA_34, /*!< BKP data register 34 */ |
| 154 | + BKP_DATA_35, /*!< BKP data register 35 */ |
| 155 | + BKP_DATA_36, /*!< BKP data register 36 */ |
| 156 | + BKP_DATA_37, /*!< BKP data register 37 */ |
| 157 | + BKP_DATA_38, /*!< BKP data register 38 */ |
| 158 | + BKP_DATA_39, /*!< BKP data register 39 */ |
| 159 | + BKP_DATA_40, /*!< BKP data register 40 */ |
| 160 | + BKP_DATA_41, /*!< BKP data register 41 */ |
| 161 | +} bkp_data_register_enum; |
| 162 | + |
| 163 | +/* BKP data register */ |
| 164 | +#define BKP_DATA0_9(number) REG16((BKP) + 0x04U + (number) * 0x04U) |
| 165 | +#define BKP_DATA10_41(number) REG16((BKP) + 0x40U + ((number)-10U) * 0x04U) |
| 166 | + |
| 167 | +/* get data of BKP data register */ |
| 168 | +#define BKP_DATA_GET(regval) GET_BITS((uint32_t)(regval), 0, 15) |
| 169 | + |
| 170 | +/* RTC clock calibration value */ |
| 171 | +#define OCTL_RCCV(regval) (BITS(0,6) & ((uint32_t)(regval) << 0)) |
| 172 | + |
| 173 | +/* RTC output selection */ |
| 174 | +#define RTC_OUTPUT_ALARM_PULSE ((uint16_t)0x0000U) /*!< RTC alarm pulse is selected as the RTC output */ |
| 175 | +#define RTC_OUTPUT_SECOND_PULSE ((uint16_t)BKP_OCTL_ROSEL) /*!< RTC second pulse is selected as the RTC output */ |
| 176 | + |
| 177 | +/* RTC clock output selection */ |
| 178 | +#define RTC_CLOCK_DIV_64 ((uint16_t)0x0000U) /*!< RTC clock div 64 */ |
| 179 | +#define RTC_CLOCK_DIV_1 ((uint16_t)BKP_OCTL_CCOSEL) /*!< RTC clock div 1 */ |
| 180 | + |
| 181 | +/* RTC clock calibration direction */ |
| 182 | +#define RTC_CLOCK_SLOWED_DOWN ((uint16_t)0x0000U) /*!< RTC clock slow down */ |
| 183 | +#define RTC_CLOCK_SPEED_UP ((uint16_t)BKP_OCTL_CALDIR) /*!< RTC clock speed up */ |
| 184 | + |
| 185 | +/* tamper pin active level */ |
| 186 | +#define TAMPER_PIN_ACTIVE_HIGH ((uint16_t)0x0000U) /*!< the tamper pin is active high */ |
| 187 | +#define TAMPER_PIN_ACTIVE_LOW ((uint16_t)BKP_TPCTL_TPAL) /*!< the tamper pin is active low */ |
| 188 | + |
| 189 | +/* tamper flag */ |
| 190 | +#define BKP_FLAG_TAMPER BKP_TPCS_TEF /*!< tamper event flag */ |
| 191 | + |
| 192 | +/* tamper interrupt flag */ |
| 193 | +#define BKP_INT_FLAG_TAMPER BKP_TPCS_TIF /*!< tamper interrupt flag */ |
| 194 | + |
| 195 | +/* function declarations */ |
| 196 | +/* operation functions */ |
| 197 | +/* reset BKP registers */ |
| 198 | +void bkp_deinit(void); |
| 199 | +/* write BKP data register */ |
| 200 | +void bkp_data_write(bkp_data_register_enum register_number, uint16_t data); |
| 201 | +/* read BKP data register */ |
| 202 | +uint16_t bkp_data_read(bkp_data_register_enum register_number); |
| 203 | + |
| 204 | +/* RTC related functions */ |
| 205 | +/* enable RTC clock calibration output */ |
| 206 | +void bkp_rtc_calibration_output_enable(void); |
| 207 | +/* disable RTC clock calibration output */ |
| 208 | +void bkp_rtc_calibration_output_disable(void); |
| 209 | +/* enable RTC alarm or second signal output */ |
| 210 | +void bkp_rtc_signal_output_enable(void); |
| 211 | +/* disable RTC alarm or second signal output */ |
| 212 | +void bkp_rtc_signal_output_disable(void); |
| 213 | +/* select RTC output */ |
| 214 | +void bkp_rtc_output_select(uint16_t outputsel); |
| 215 | +/* select RTC clock output */ |
| 216 | +void bkp_rtc_clock_output_select(uint16_t clocksel); |
| 217 | +/* select RTC clock calibration direction */ |
| 218 | +void bkp_rtc_clock_calibration_direction_select(uint16_t direction); |
| 219 | +/* set RTC clock calibration value */ |
| 220 | +void bkp_rtc_calibration_value_set(uint8_t value); |
| 221 | + |
| 222 | +/* tamper pin related functions */ |
| 223 | +/* enable tamper pin detection */ |
| 224 | +void bkp_tamper_detection_enable(void); |
| 225 | +/* disable tamper pin detection */ |
| 226 | +void bkp_tamper_detection_disable(void); |
| 227 | +/* set tamper pin active level */ |
| 228 | +void bkp_tamper_active_level_set(uint16_t level); |
| 229 | + |
| 230 | +/* interrupt & flag functions */ |
| 231 | +/* enable tamper interrupt */ |
| 232 | +void bkp_interrupt_enable(void); |
| 233 | +/* disable tamper interrupt */ |
| 234 | +void bkp_interrupt_disable(void); |
| 235 | +/* get tamper flag state */ |
| 236 | +FlagStatus bkp_flag_get(void); |
| 237 | +/* clear tamper flag state */ |
| 238 | +void bkp_flag_clear(void); |
| 239 | +/* get tamper interrupt flag state */ |
| 240 | +FlagStatus bkp_interrupt_flag_get(void); |
| 241 | +/* clear tamper interrupt flag state */ |
| 242 | +void bkp_interrupt_flag_clear(void); |
| 243 | + |
| 244 | +#endif /* GD32E10X_BKP_H */ |
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