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Commit f53154a

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Thomas SailerThomas Sailer
authored andcommitted
some modifications from review
1 parent ca86cbf commit f53154a

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2 files changed

+22
-16
lines changed

2 files changed

+22
-16
lines changed

targets/TARGET_ONSEMI/TARGET_NCS36510/ncs36510Init.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -147,13 +147,13 @@ void fClockInit()
147147
for(Timer = 0; Timer < 10; Timer++);
148148

149149
/** - Enable calibration */
150-
CLOCKREG->CCR.BITS.CAL32M = True;
150+
//CLOCKREG->CCR.BITS.CAL32M = True;
151151

152152
/** - Wait calibration to be completed */
153-
while(CLOCKREG->CSR.BITS.CAL32MDONE == False); /* If you stuck here, issue with internal 32M calibration */
153+
//while(CLOCKREG->CSR.BITS.CAL32MDONE == False); /* If you stuck here, issue with internal 32M calibration */
154154

155155
/** - Check calibration status */
156-
while(CLOCKREG->CSR.BITS.CAL32MFAIL == True); /* If you stuck here, issue with internal 32M calibration */
156+
//while(CLOCKREG->CSR.BITS.CAL32MFAIL == True); /* If you stuck here, issue with internal 32M calibration */
157157

158158
/** - Power down internal 32MHz osc */
159159
PMUREG->CONTROL.BITS.INT32M = 1;

tools/export/codeblocks/__init__.py

Lines changed: 19 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,7 @@ def generate(self):
5757
debug_flags = []
5858
next_is_include = False
5959
for f in self.flags['c_flags'] + self.flags['cxx_flags'] + self.flags['common_flags']:
60-
f=f.strip()
60+
f = f.strip()
6161
if f == "-include":
6262
next_is_include = True
6363
continue
@@ -68,15 +68,18 @@ def generate(self):
6868
next_is_include = False
6969
if f.startswith('-O') or f.startswith('-g'):
7070
debug_flags.append(f)
71-
continue
72-
comp_flags.append(f)
71+
else:
72+
comp_flags.append(f)
7373
comp_flags = list(set(comp_flags))
7474
inc_dirs = [self.filter_dot(s) for s in self.resources.inc_dirs];
75-
inc_dirs = [x for x in inc_dirs if x is not None and x != '' and x != '.' and not x.startswith('bin') and not x.startswith('obj')];
75+
inc_dirs = [x for x in inc_dirs if (x is not None and
76+
x != '' and x != '.' and
77+
not x.startswith('bin') and
78+
not x.startswith('obj'))];
7679

7780
c_sources = [self.filter_dot(s) for s in self.resources.c_sources]
78-
targ = TARGET_MAP[self.target]
79-
ncs36510fib = hasattr(targ, 'post_binary_hook') and targ.post_binary_hook['function'] == 'NCS36510TargetCode.ncs36510_addfib'
81+
ncs36510fib = (hasattr(self.toolchain.target, 'post_binary_hook') and
82+
self.toolchain.target.post_binary_hook['function'] == 'NCS36510TargetCode.ncs36510_addfib')
8083
if ncs36510fib:
8184
c_sources.append('ncs36510fib.c')
8285
c_sources.append('ncs36510trim.c')
@@ -129,13 +132,16 @@ def generate(self):
129132
'rssi': 0x3D,
130133
'txtune': 0xFFFFFFFF
131134
}
132-
if hasattr(targ, 'config'):
133-
for an, cn in [ ['mac-addr-low', 'mac_addr_low'], ['mac-addr-high', 'mac_addr_high'],
134-
['32KHz-clk-trim', 'clk_32k_trim'], ['32MHz-clk-trim', 'clk_32m_trim'],
135-
['rssi-trim', 'rssi'], ['txtune-trim', 'txtune'] ]:
136-
if an in targ.config:
137-
if 'value' in targ.config[an]:
138-
ctx[cn] = int(targ.config[an]['value'], 0)
135+
if hasattr(self.toolchain.target, 'config'):
136+
for an, cn in [ ['mac-addr-low', 'mac_addr_low'],
137+
['mac-addr-high', 'mac_addr_high'],
138+
['32KHz-clk-trim', 'clk_32k_trim'],
139+
['32MHz-clk-trim', 'clk_32m_trim'],
140+
['rssi-trim', 'rssi'],
141+
['txtune-trim', 'txtune'] ]:
142+
if an in self.toolchain.target.config:
143+
if 'value' in self.toolchain.target.config[an]:
144+
ctx[cn] = int(self.toolchain.target.config[an]['value'], 0)
139145
for f in [ 'ncs36510fib.c', 'ncs36510trim.c' ]:
140146
self.gen_file("codeblocks/%s" % f, ctx, f)
141147

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