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Clock at 48mhz
1 parent 485c8da commit f639faa

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2 files changed

+15
-10
lines changed

2 files changed

+15
-10
lines changed

targets/TARGET_Atmel/TARGET_SAM_CortexM0P/config/TARGET_SAML21/conf_clocks.h

Lines changed: 14 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -50,13 +50,13 @@
5050

5151
/* System clock bus configuration */
5252
# define CONF_CLOCK_CPU_CLOCK_FAILURE_DETECT false
53-
# define CONF_CLOCK_FLASH_WAIT_STATES 0
53+
# define CONF_CLOCK_FLASH_WAIT_STATES 3
5454
# define CONF_CLOCK_CPU_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
5555
# define CONF_CLOCK_LOW_POWER_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
5656
# define CONF_CLOCK_BACKUP_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
5757

5858
/* SYSTEM_CLOCK_SOURCE_OSC16M configuration - Internal 16MHz oscillator */
59-
# define CONF_CLOCK_OSC16M_FREQ_SEL SYSTEM_OSC16M_4M
59+
# define CONF_CLOCK_OSC16M_FREQ_SEL SYSTEM_OSC16M_16M
6060
# define CONF_CLOCK_OSC16M_ON_DEMAND true
6161
# define CONF_CLOCK_OSC16M_RUN_IN_STANDBY false
6262

@@ -70,14 +70,16 @@
7070
# define CONF_CLOCK_XOSC_RUN_IN_STANDBY false
7171

7272
/* SYSTEM_CLOCK_SOURCE_XOSC32K configuration - External 32KHz crystal/clock oscillator */
73-
# define CONF_CLOCK_XOSC32K_ENABLE false
73+
# define CONF_CLOCK_XOSC32K_ENABLE true
7474
# define CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL SYSTEM_CLOCK_EXTERNAL_CRYSTAL
7575
# define CONF_CLOCK_XOSC32K_STARTUP_TIME SYSTEM_XOSC32K_STARTUP_65536
7676
# define CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT false
7777
# define CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT true
7878
# define CONF_CLOCK_XOSC32K_ON_DEMAND true
7979
# define CONF_CLOCK_XOSC32K_RUN_IN_STANDBY false
8080

81+
82+
8183
/* SYSTEM_CLOCK_SOURCE_OSC32K configuration - Internal 32KHz oscillator */
8284
# define CONF_CLOCK_OSC32K_ENABLE false
8385
# define CONF_CLOCK_OSC32K_STARTUP_TIME SYSTEM_OSC32K_STARTUP_130
@@ -86,20 +88,23 @@
8688
# define CONF_CLOCK_OSC32K_ON_DEMAND true
8789
# define CONF_CLOCK_OSC32K_RUN_IN_STANDBY false
8890

91+
/* SYSTEM_CLOCK_SOURCE_OSCULP32K configuration - Internal Ultra Low Power 32KHz oscillator */
92+
# define CONF_CLOCK_OSCULP32K_ENABLE_1KHZ_OUTPUT true
93+
# define CONF_CLOCK_OSCULP32K_ENABLE_32KHZ_OUTPUT true
8994

9095
/* SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop */
91-
# define CONF_CLOCK_DFLL_ENABLE false
92-
# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_OPEN
96+
# define CONF_CLOCK_DFLL_ENABLE true
97+
# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_CLOSED
9398
# define CONF_CLOCK_DFLL_ON_DEMAND false
9499
# define CONF_CLOCK_DFLL_RUN_IN_STANDBY false
95100

96101
/* DFLL open loop mode configuration */
97-
# define CONF_CLOCK_DFLL_FINE_VALUE (0xff / 4)
102+
# define CONF_CLOCK_DFLL_FINE_VALUE (512)
98103

99104
/* DFLL closed loop mode configuration */
100105
# define CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR GCLK_GENERATOR_1
101106
# define CONF_CLOCK_DFLL_MULTIPLY_FACTOR (48000000 / 32768)
102-
# define CONF_CLOCK_DFLL_QUICK_LOCK true
107+
# define CONF_CLOCK_DFLL_QUICK_LOCK false
103108
# define CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK true
104109
# define CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP true
105110
# define CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE true
@@ -137,12 +142,12 @@
137142
/* Configure GCLK generator 0 (Main Clock) */
138143
# define CONF_CLOCK_GCLK_0_ENABLE true
139144
# define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY false
140-
# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC16M
145+
# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_DFLL
141146
# define CONF_CLOCK_GCLK_0_PRESCALER 1
142147
# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false
143148

144149
/* Configure GCLK generator 1 */
145-
# define CONF_CLOCK_GCLK_1_ENABLE false
150+
# define CONF_CLOCK_GCLK_1_ENABLE true
146151
# define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY false
147152
# define CONF_CLOCK_GCLK_1_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_XOSC32K
148153
# define CONF_CLOCK_GCLK_1_PRESCALER 1

targets/TARGET_Atmel/TARGET_SAM_CortexM0P/utils/cmsis/TARGET_SAML21/source/system_saml21.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@
5050
* Initial system clock frequency. The System RC Oscillator (RCSYS) provides
5151
* the source for the main clock at chip startup.
5252
*/
53-
#define __SYSTEM_CLOCK (4000000)
53+
#define __SYSTEM_CLOCK (4000000 * 12)
5454

5555
uint32_t SystemCoreClock = __SYSTEM_CLOCK;/*!< System Clock Frequency (Core Clock)*/
5656

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