1
- /*
1
+ /*
2
2
* Copyright (c) 2016 Nordic Semiconductor ASA
3
3
* All rights reserved.
4
- *
4
+ *
5
5
* Redistribution and use in source and binary forms, with or without modification,
6
6
* are permitted provided that the following conditions are met:
7
- *
8
- * 1. Redistributions of source code must retain the above copyright notice, this list
7
+ *
8
+ * 1. Redistributions of source code must retain the above copyright notice, this list
9
9
* of conditions and the following disclaimer.
10
10
*
11
- * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
12
- * integrated circuit in a product or a software update for such product, must reproduce
13
- * the above copyright notice, this list of conditions and the following disclaimer in
11
+ * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
12
+ * integrated circuit in a product or a software update for such product, must reproduce
13
+ * the above copyright notice, this list of conditions and the following disclaimer in
14
14
* the documentation and/or other materials provided with the distribution.
15
15
*
16
- * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
17
- * used to endorse or promote products derived from this software without specific prior
16
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
17
+ * used to endorse or promote products derived from this software without specific prior
18
18
* written permission.
19
19
*
20
- * 4. This software, with or without modification, must only be used with a
20
+ * 4. This software, with or without modification, must only be used with a
21
21
* Nordic Semiconductor ASA integrated circuit.
22
22
*
23
- * 5. Any software provided in binary or object form under this license must not be reverse
24
- * engineered, decompiled, modified and/or disassembled.
25
- *
23
+ * 5. Any software provided in binary or object form under this license must not be reverse
24
+ * engineered, decompiled, modified and/or disassembled.
25
+ *
26
26
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
27
27
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
28
28
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
33
33
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34
34
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
35
35
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36
- *
36
+ *
37
37
*/
38
-
38
+
39
39
#include "nrf.h"
40
40
#include "cmsis_nvic.h"
41
41
#include "stdint.h"
48
48
#endif
49
49
50
50
#if defined(__ARMCC_VERSION )
51
- __attribute__ ((section (".bss.nvictable" )))
52
- uint32_t nrf_dispatch_vector [NVIC_NUM_VECTORS ];
51
+ __attribute__((section (".bss.nvictable" )))
52
+ uint32_t nrf_dispatch_vector [NVIC_NUM_VECTORS ];
53
53
#elif defined(__GNUC__ )
54
- __attribute__ ((section (".nvictable" )))
55
- uint32_t nrf_dispatch_vector [NVIC_NUM_VECTORS ];
54
+ __attribute__((section (".nvictable" )))
55
+ uint32_t nrf_dispatch_vector [NVIC_NUM_VECTORS ];
56
56
#elif defined(__ICCARM__ )
57
- uint32_t nrf_dispatch_vector [NVIC_NUM_VECTORS ] @ ".nvictable" ;
57
+ uint32_t nrf_dispatch_vector [NVIC_NUM_VECTORS ] @ ".nvictable" ;
58
58
#endif
59
59
60
+ #include "platform/mbed_toolchain.h"
61
+ #include "subtarget_init.h"
62
+
60
63
extern uint32_t __Vectors [];
61
64
62
65
#define VECTORS_FLASH_START __Vectors
@@ -70,21 +73,21 @@ extern uint32_t __Vectors[];
70
73
void nrf_reloc_vector_table (void )
71
74
{
72
75
// Copy and switch to dynamic vectors
73
- uint32_t * old_vectors = VECTORS_FLASH_START ;
74
- uint32_t i ;
75
- for (i = 0 ; i < NVIC_NUM_VECTORS ; i ++ ) {
76
- nrf_dispatch_vector [i ] = old_vectors [i ];
77
- }
76
+ uint32_t * old_vectors = VECTORS_FLASH_START ;
77
+ uint32_t i ;
78
+ for (i = 0 ; i < NVIC_NUM_VECTORS ; i ++ ) {
79
+ nrf_dispatch_vector [i ] = old_vectors [i ];
80
+ }
78
81
79
82
#if defined(SOFTDEVICE_PRESENT )
80
83
81
84
/**
82
85
* Before setting the new vector table address in the SoftDevice the MBR must be initialized.
83
86
* If no bootloader is present the MBR will be initialized automatically.
84
87
* If a bootloader is present nrf_dfu_mbr_init_sd must be called once and only once.
85
- *
88
+ *
86
89
* By resetting the MBR and SoftDevice VTOR address first, it becomes safe to initialize
87
- * the MBR again regardless of how the application was started.
90
+ * the MBR again regardless of how the application was started.
88
91
*/
89
92
90
93
/* Reset MBR VTOR to original state before calling MBR init. */
@@ -98,7 +101,7 @@ void nrf_reloc_vector_table(void)
98
101
/* Set SCB->VTOR to go through MBR to trap SoftDevice service calls. */
99
102
SCB -> VTOR = 0x0 ;
100
103
101
- /* Initialize MBR so SoftDevice service calls are being trapped correctly.
104
+ /* Initialize MBR so SoftDevice service calls are being trapped correctly.
102
105
* This call sets MBR_VTOR_ADDRESS to point to the SoftDevice's VTOR at address 0x1000.
103
106
*/
104
107
nrf_dfu_mbr_init_sd ();
@@ -109,17 +112,18 @@ void nrf_reloc_vector_table(void)
109
112
#else
110
113
111
114
/* No SoftDevice is present. Set all interrupts to vector table in RAM. */
112
- SCB -> VTOR = (uint32_t ) nrf_dispatch_vector ;
115
+ SCB -> VTOR = (uint32_t ) nrf_dispatch_vector ;
113
116
#endif
114
117
}
115
118
116
-
117
119
void mbed_sdk_init (void )
118
120
{
119
- if (STDIO_UART_RTS != NC ) {
120
- gpio_t rts ;
121
- gpio_init_out (& rts , STDIO_UART_RTS );
122
- /* Set STDIO_UART_RTS as gpio driven low */
123
- gpio_write (& rts , 0 );
124
- }
121
+ if (STDIO_UART_RTS != NC ) {
122
+ gpio_t rts ;
123
+ gpio_init_out (& rts , STDIO_UART_RTS );
124
+ /* Set STDIO_UART_RTS as gpio driven low */
125
+ gpio_write (& rts , 0 );
126
+ }
127
+
128
+ subtarget_sdk_init ();
125
129
}
0 commit comments