Skip to content

Commit fd4ef95

Browse files
adustm0xc0170
authored andcommitted
Make ARM test pass on mbed-os5 tests
1 parent ae6e44e commit fd4ef95

File tree

2 files changed

+9
-90
lines changed

2 files changed

+9
-90
lines changed

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l496xx.S

Lines changed: 7 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -38,27 +38,22 @@
3838
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3939
;*
4040
;*******************************************************************************
41-
;
42-
; Amount of memory (in bytes) allocated for Stack
43-
; Tailor this value to your application needs
44-
; <h> Stack Configuration
45-
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
46-
; </h>
47-
48-
Stack_Size EQU 0x400
4941

5042
AREA STACK, NOINIT, READWRITE, ALIGN=3
51-
Stack_Mem SPACE Stack_Size
52-
__initial_sp
43+
EXPORT __initial_sp
5344

45+
__initial_sp EQU 0x20050000 ; Top of RAM
5446

5547
; <h> Heap Configuration
5648
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
5749
; </h>
5850

59-
Heap_Size EQU 0x200
51+
Heap_Size EQU 0x17800 ; 94KB (96KB, -2*1KB for main thread and scheduler)
6052

6153
AREA HEAP, NOINIT, READWRITE, ALIGN=3
54+
EXPORT __heap_base
55+
EXPORT __heap_limit
56+
6257
__heap_base
6358
Heap_Mem SPACE Heap_Size
6459
__heap_limit
@@ -434,33 +429,6 @@ DMA2D_IRQHandler
434429
ENDP
435430

436431
ALIGN
437-
438-
;*******************************************************************************
439-
; User Stack and Heap initialization
440-
;*******************************************************************************
441-
IF :DEF:__MICROLIB
442-
443-
EXPORT __initial_sp
444-
EXPORT __heap_base
445-
EXPORT __heap_limit
446-
447-
ELSE
448-
449-
IMPORT __use_two_region_memory
450-
EXPORT __user_initial_stackheap
451-
452-
__user_initial_stackheap
453-
454-
LDR R0, = Heap_Mem
455-
LDR R1, =(Stack_Mem + Stack_Size)
456-
LDR R2, = (Heap_Mem + Heap_Size)
457-
LDR R3, = Stack_Mem
458-
BX LR
459-
460-
ALIGN
461-
462-
ENDIF
463-
464-
END
432+
END
465433

466434
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_STD/startup_stm32l496xx.S

Lines changed: 2 additions & 51 deletions
Original file line numberDiff line numberDiff line change
@@ -38,30 +38,8 @@
3838
;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3939
;*
4040
;*******************************************************************************
41-
;
42-
; Amount of memory (in bytes) allocated for Stack
43-
; Tailor this value to your application needs
44-
; <h> Stack Configuration
45-
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
46-
; </h>
4741

48-
Stack_Size EQU 0x400
49-
50-
AREA STACK, NOINIT, READWRITE, ALIGN=3
51-
Stack_Mem SPACE Stack_Size
52-
__initial_sp
53-
54-
55-
; <h> Heap Configuration
56-
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
57-
; </h>
58-
59-
Heap_Size EQU 0x200
60-
61-
AREA HEAP, NOINIT, READWRITE, ALIGN=3
62-
__heap_base
63-
Heap_Mem SPACE Heap_Size
64-
__heap_limit
42+
__initial_sp EQU 0x20050000 ; Top of RAM
6543

6644
PRESERVE8
6745
THUMB
@@ -434,33 +412,6 @@ DMA2D_IRQHandler
434412
ENDP
435413

436414
ALIGN
437-
438-
;*******************************************************************************
439-
; User Stack and Heap initialization
440-
;*******************************************************************************
441-
IF :DEF:__MICROLIB
442-
443-
EXPORT __initial_sp
444-
EXPORT __heap_base
445-
EXPORT __heap_limit
446-
447-
ELSE
448-
449-
IMPORT __use_two_region_memory
450-
EXPORT __user_initial_stackheap
451-
452-
__user_initial_stackheap
453-
454-
LDR R0, = Heap_Mem
455-
LDR R1, =(Stack_Mem + Stack_Size)
456-
LDR R2, = (Heap_Mem + Heap_Size)
457-
LDR R3, = Stack_Mem
458-
BX LR
459-
460-
ALIGN
461-
462-
ENDIF
463-
464-
END
415+
END
465416

466417
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

0 commit comments

Comments
 (0)