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FIX to add the update of hdma->State variable
1 parent ce9d252 commit fe73b43

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2 files changed

+33
-0
lines changed

2 files changed

+33
-0
lines changed

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dma.c

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -761,6 +761,9 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
761761

762762
/* Update error code */
763763
hdma->ErrorCode |= HAL_DMA_ERROR_TE;
764+
765+
/* Change the DMA state */
766+
hdma->State = HAL_DMA_STATE_ERROR; // FIX
764767
}
765768
}
766769
/* FIFO Error Interrupt management ******************************************/
@@ -773,6 +776,9 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
773776

774777
/* Update error code */
775778
hdma->ErrorCode |= HAL_DMA_ERROR_FE;
779+
780+
/* Change the DMA state */
781+
hdma->State = HAL_DMA_STATE_ERROR; // FIX
776782
}
777783
}
778784
/* Direct Mode Error Interrupt management ***********************************/
@@ -785,6 +791,9 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
785791

786792
/* Update error code */
787793
hdma->ErrorCode |= HAL_DMA_ERROR_DME;
794+
795+
/* Change the DMA state */
796+
hdma->State = HAL_DMA_STATE_ERROR; // FIX
788797
}
789798
}
790799
/* Half Transfer Complete Interrupt management ******************************/
@@ -801,6 +810,9 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
801810
/* Current memory buffer used is Memory 0 */
802811
if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
803812
{
813+
/* Change DMA peripheral state */
814+
hdma->State = HAL_DMA_STATE_READY_HALF_MEM0; // FIX
815+
804816
if(hdma->XferHalfCpltCallback != NULL)
805817
{
806818
/* Half transfer callback */
@@ -810,6 +822,9 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
810822
/* Current memory buffer used is Memory 1 */
811823
else
812824
{
825+
/* Change DMA peripheral state */
826+
hdma->State = HAL_DMA_STATE_READY_HALF_MEM1; // FIX
827+
813828
if(hdma->XferM1HalfCpltCallback != NULL)
814829
{
815830
/* Half transfer callback */
@@ -826,6 +841,9 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
826841
hdma->Instance->CR &= ~(DMA_IT_HT);
827842
}
828843

844+
/* Change DMA peripheral state */
845+
hdma->State = HAL_DMA_STATE_READY_HALF_MEM0; // FIX
846+
829847
if(hdma->XferHalfCpltCallback != NULL)
830848
{
831849
/* Half transfer callback */
@@ -874,6 +892,9 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
874892
/* Current memory buffer used is Memory 0 */
875893
if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
876894
{
895+
/* Change DMA peripheral state */
896+
hdma->State = HAL_DMA_STATE_READY_MEM1; // FIX
897+
877898
if(hdma->XferM1CpltCallback != NULL)
878899
{
879900
/* Transfer complete Callback for memory1 */
@@ -883,6 +904,9 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
883904
/* Current memory buffer used is Memory 1 */
884905
else
885906
{
907+
/* Change DMA peripheral state */
908+
hdma->State = HAL_DMA_STATE_READY_MEM0; // FIX
909+
886910
if(hdma->XferCpltCallback != NULL)
887911
{
888912
/* Transfer complete Callback for memory0 */
@@ -893,6 +917,9 @@ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
893917
/* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
894918
else
895919
{
920+
/* Change DMA peripheral state */
921+
hdma->State = HAL_DMA_STATE_READY_MEM0; // FIX
922+
896923
if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET)
897924
{
898925
/* Disable the transfer complete interrupt */

targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dma.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -122,7 +122,13 @@ typedef enum
122122
{
123123
HAL_DMA_STATE_RESET = 0x00U, /*!< DMA not yet initialized or disabled */
124124
HAL_DMA_STATE_READY = 0x01U, /*!< DMA initialized and ready for use */
125+
HAL_DMA_STATE_READY_MEM0 = 0x11U, /*!< DMA Mem0 process success */ // FIX
126+
HAL_DMA_STATE_READY_MEM1 = 0x21U, /*!< DMA Mem1 process success */ // FIX
127+
HAL_DMA_STATE_READY_HALF_MEM0 = 0x31U, /*!< DMA Mem0 Half process success */ // FIX
128+
HAL_DMA_STATE_READY_HALF_MEM1 = 0x41U, /*!< DMA Mem1 Half process success */ // FIX
125129
HAL_DMA_STATE_BUSY = 0x02U, /*!< DMA process is ongoing */
130+
HAL_DMA_STATE_BUSY_MEM0 = 0x12U, /*!< DMA Mem0 process is ongoing */ // FIX
131+
HAL_DMA_STATE_BUSY_MEM1 = 0x22U, /*!< DMA Mem1 process is ongoing */ // FIX
126132
HAL_DMA_STATE_TIMEOUT = 0x03U, /*!< DMA timeout state */
127133
HAL_DMA_STATE_ERROR = 0x04U, /*!< DMA error state */
128134
HAL_DMA_STATE_ABORT = 0x05U, /*!< DMA Abort state */

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