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Merged main:52f3cad9ffa3 into origin/amd-gfx:31272f8ef7f7
Local branch origin/amd-gfx 31272f8 Merged main:ee4e8197fa67 into origin/amd-gfx:543f39bd900d Remote branch main 52f3cad [X86] getFauxShuffleMask - move INSERT_SUBVECTOR(SRC0, EXTRACT_SUBVECTOR(SRC1)) matching behind common one use bitcast checks (llvm#134227)
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‎clang/docs/ReleaseNotes.rst

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -318,6 +318,9 @@ Improvements to Clang's diagnostics
318318

319319
- Split diagnosing base class qualifiers from the ``-Wignored-Qualifiers`` diagnostic group into a new ``-Wignored-base-class-qualifiers`` diagnostic group (which is grouped under ``-Wignored-qualifiers``). Fixes #GH131935.
320320

321+
- ``-Wc++98-compat`` no longer diagnoses use of ``__auto_type`` or
322+
``decltype(auto)`` as though it was the extension for ``auto``. (#GH47900)
323+
321324
Improvements to Clang's time-trace
322325
----------------------------------
323326

‎clang/lib/AST/QualTypeNames.cpp

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@
1010
#include "clang/AST/DeclTemplate.h"
1111
#include "clang/AST/DeclarationName.h"
1212
#include "clang/AST/Mangle.h"
13+
#include "clang/AST/Type.h"
1314

1415
namespace clang {
1516

@@ -416,6 +417,18 @@ QualType getFullyQualifiedType(QualType QT, const ASTContext &Ctx,
416417
return QT;
417418
}
418419

420+
// Handle types with attributes such as `unique_ptr<int> _Nonnull`.
421+
if (auto *AT = dyn_cast<AttributedType>(QT.getTypePtr())) {
422+
QualType NewModified =
423+
getFullyQualifiedType(AT->getModifiedType(), Ctx, WithGlobalNsPrefix);
424+
QualType NewEquivalent =
425+
getFullyQualifiedType(AT->getEquivalentType(), Ctx, WithGlobalNsPrefix);
426+
Qualifiers Qualifiers = QT.getLocalQualifiers();
427+
return Ctx.getQualifiedType(
428+
Ctx.getAttributedType(AT->getAttrKind(), NewModified, NewEquivalent),
429+
Qualifiers);
430+
}
431+
419432
// Remove the part of the type related to the type being a template
420433
// parameter (we won't report it as part of the 'type name' and it
421434
// is actually make the code below to be more complex (to handle

‎clang/lib/Sema/SemaType.cpp

Lines changed: 12 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -3376,13 +3376,18 @@ static QualType GetDeclSpecTypeForDeclarator(TypeProcessingState &state,
33763376
} else if (Auto && D.getContext() != DeclaratorContext::LambdaExpr) {
33773377
// If there was a trailing return type, we already got
33783378
// warn_cxx98_compat_trailing_return_type in the parser.
3379-
SemaRef.Diag(AutoRange.getBegin(),
3380-
D.getContext() == DeclaratorContext::LambdaExprParameter
3381-
? diag::warn_cxx11_compat_generic_lambda
3382-
: IsDeducedReturnType
3383-
? diag::warn_cxx11_compat_deduced_return_type
3384-
: diag::warn_cxx98_compat_auto_type_specifier)
3385-
<< AutoRange;
3379+
// If there was a decltype(auto), we already got
3380+
// warn_cxx11_compat_decltype_auto_type_specifier.
3381+
unsigned DiagId = 0;
3382+
if (D.getContext() == DeclaratorContext::LambdaExprParameter)
3383+
DiagId = diag::warn_cxx11_compat_generic_lambda;
3384+
else if (IsDeducedReturnType)
3385+
DiagId = diag::warn_cxx11_compat_deduced_return_type;
3386+
else if (Auto->getKeyword() == AutoTypeKeyword::Auto)
3387+
DiagId = diag::warn_cxx98_compat_auto_type_specifier;
3388+
3389+
if (DiagId)
3390+
SemaRef.Diag(AutoRange.getBegin(), DiagId) << AutoRange;
33863391
}
33873392
}
33883393

‎clang/test/SemaCXX/cxx98-compat.cpp

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,16 @@ namespace std {
1414
};
1515
}
1616

17+
void test_other_auto_spellings() {
18+
__auto_type x = 0; // Ok
19+
decltype(auto) y = 0; // expected-warning {{'decltype' type specifier is incompatible with C++98}}
20+
#ifndef CXX14COMPAT
21+
// expected-warning@-2 {{'decltype(auto)' type specifier is a C++14 extension}}
22+
#else
23+
// expected-warning@-4 {{'decltype(auto)' type specifier is incompatible with C++ standards before C++14}}
24+
#endif
25+
}
26+
1727
template<typename ...T> // expected-warning {{variadic templates are incompatible with C++98}}
1828
class Variadic1 {};
1929

‎clang/unittests/Tooling/QualTypeNamesTest.cpp

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -297,4 +297,31 @@ TEST(QualTypeNameTest, ConstUsing) {
297297
using ::A::S;
298298
void foo(const S& param1, const S param2);)");
299299
}
300+
301+
TEST(QualTypeNameTest, NullableAttributesWithGlobalNs) {
302+
TypeNameVisitor Visitor;
303+
Visitor.WithGlobalNsPrefix = true;
304+
Visitor.ExpectedQualTypeNames["param1"] = "::std::unique_ptr<int> _Nullable";
305+
Visitor.ExpectedQualTypeNames["param2"] = "::std::unique_ptr<int> _Nonnull";
306+
Visitor.ExpectedQualTypeNames["param3"] =
307+
"::std::unique_ptr< ::std::unique_ptr<int> _Nullable> _Nonnull";
308+
Visitor.ExpectedQualTypeNames["param4"] =
309+
"::std::unique_ptr<int> _Nullable const *";
310+
Visitor.ExpectedQualTypeNames["param5"] =
311+
"::std::unique_ptr<int> _Nullable const *";
312+
Visitor.ExpectedQualTypeNames["param6"] =
313+
"::std::unique_ptr<int> _Nullable const *";
314+
Visitor.runOver(R"(namespace std {
315+
template<class T> class unique_ptr {};
316+
}
317+
void foo(
318+
std::unique_ptr<int> _Nullable param1,
319+
_Nonnull std::unique_ptr<int> param2,
320+
std::unique_ptr<std::unique_ptr<int> _Nullable> _Nonnull param3,
321+
const std::unique_ptr<int> _Nullable *param4,
322+
_Nullable std::unique_ptr<int> const *param5,
323+
std::unique_ptr<int> _Nullable const *param6
324+
);
325+
)");
326+
}
300327
} // end anonymous namespace

‎lldb/test/API/commands/expression/expr-from-non-zero-frame/TestExprFromNonZeroFrame.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ def test(self):
1616
self.build()
1717

1818
(_, _, thread, _) = lldbutil.run_to_source_breakpoint(
19-
self, "Break here", lldb.SBFileSpec("main.c")
19+
self, "return 5", lldb.SBFileSpec("main.c")
2020
)
2121
frame = thread.GetFrameAtIndex(1)
2222

‎lldb/test/API/commands/expression/expr-from-non-zero-frame/main.c

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,3 @@
1-
int func(void) {
2-
__builtin_printf("Break here");
3-
return 5;
4-
}
1+
int func(void) { return 5; }
52

63
int main(int argc, const char *argv[]) { return func(); }

‎llvm/include/llvm/Config/llvm-config.h.cmake

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616

1717
/* Indicate that this is LLVM compiled from the amd-gfx branch. */
1818
#define LLVM_HAVE_BRANCH_AMD_GFX
19-
#define LLVM_MAIN_REVISION 532890
19+
#define LLVM_MAIN_REVISION 532895
2020

2121
/* Define if LLVM_ENABLE_DUMP is enabled */
2222
#cmakedefine LLVM_ENABLE_DUMP

‎llvm/lib/Target/AArch64/AArch64InstrInfo.td

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7731,6 +7731,7 @@ def MOVIv2d_ns : SIMDModifiedImmVectorNoShift<1, 1, 0, 0b1110, V128,
77317731
"movi", ".2d",
77327732
[(set (v2i64 V128:$Rd), (AArch64movi_edit imm0_255:$imm8))]>;
77337733

7734+
let Predicates = [HasNEON] in {
77347735
def : Pat<(v2i64 immAllZerosV), (MOVIv2d_ns (i32 0))>;
77357736
def : Pat<(v4i32 immAllZerosV), (MOVIv2d_ns (i32 0))>;
77367737
def : Pat<(v8i16 immAllZerosV), (MOVIv2d_ns (i32 0))>;
@@ -7740,6 +7741,23 @@ def : Pat<(v4f32 immAllZerosV), (MOVIv2d_ns (i32 0))>;
77407741
def : Pat<(v8f16 immAllZerosV), (MOVIv2d_ns (i32 0))>;
77417742
def : Pat<(v8bf16 immAllZerosV), (MOVIv2d_ns (i32 0))>;
77427743

7744+
// Prefer NEON instructions when zeroing ZPRs because they are potentially zero-latency.
7745+
let AddedComplexity = 5 in {
7746+
def : Pat<(nxv2i64 (splat_vector (i64 0))), (SUBREG_TO_REG (i32 0), (MOVIv2d_ns (i32 0)), zsub)>;
7747+
def : Pat<(nxv4i32 (splat_vector (i32 0))), (SUBREG_TO_REG (i32 0), (MOVIv2d_ns (i32 0)), zsub)>;
7748+
def : Pat<(nxv8i16 (splat_vector (i32 0))), (SUBREG_TO_REG (i32 0), (MOVIv2d_ns (i32 0)), zsub)>;
7749+
def : Pat<(nxv16i8 (splat_vector (i32 0))), (SUBREG_TO_REG (i32 0), (MOVIv2d_ns (i32 0)), zsub)>;
7750+
def : Pat<(nxv2f64 (splat_vector (f64 fpimm0))), (SUBREG_TO_REG (i32 0), (MOVIv2d_ns (i32 0)), zsub)>;
7751+
def : Pat<(nxv2f32 (splat_vector (f32 fpimm0))), (SUBREG_TO_REG (i32 0), (MOVIv2d_ns (i32 0)), zsub)>;
7752+
def : Pat<(nxv4f32 (splat_vector (f32 fpimm0))), (SUBREG_TO_REG (i32 0), (MOVIv2d_ns (i32 0)), zsub)>;
7753+
def : Pat<(nxv2f16 (splat_vector (f16 fpimm0))), (SUBREG_TO_REG (i32 0), (MOVIv2d_ns (i32 0)), zsub)>;
7754+
def : Pat<(nxv4f16 (splat_vector (f16 fpimm0))), (SUBREG_TO_REG (i32 0), (MOVIv2d_ns (i32 0)), zsub)>;
7755+
def : Pat<(nxv8f16 (splat_vector (f16 fpimm0))), (SUBREG_TO_REG (i32 0), (MOVIv2d_ns (i32 0)), zsub)>;
7756+
def : Pat<(nxv2bf16 (splat_vector (bf16 fpimm0))), (SUBREG_TO_REG (i32 0), (MOVIv2d_ns (i32 0)), zsub)>;
7757+
def : Pat<(nxv4bf16 (splat_vector (bf16 fpimm0))), (SUBREG_TO_REG (i32 0), (MOVIv2d_ns (i32 0)), zsub)>;
7758+
def : Pat<(nxv8bf16 (splat_vector (bf16 fpimm0))), (SUBREG_TO_REG (i32 0), (MOVIv2d_ns (i32 0)), zsub)>;
7759+
}
7760+
77437761
def : Pat<(v2i64 immAllOnesV), (MOVIv2d_ns (i32 255))>;
77447762
def : Pat<(v4i32 immAllOnesV), (MOVIv2d_ns (i32 255))>;
77457763
def : Pat<(v8i16 immAllOnesV), (MOVIv2d_ns (i32 255))>;
@@ -7760,6 +7778,7 @@ def : Pat<(v1i64 immAllOnesV), (EXTRACT_SUBREG (MOVIv2d_ns (i32 255)), dsub)>;
77607778
def : Pat<(v2i32 immAllOnesV), (EXTRACT_SUBREG (MOVIv2d_ns (i32 255)), dsub)>;
77617779
def : Pat<(v4i16 immAllOnesV), (EXTRACT_SUBREG (MOVIv2d_ns (i32 255)), dsub)>;
77627780
def : Pat<(v8i8 immAllOnesV), (EXTRACT_SUBREG (MOVIv2d_ns (i32 255)), dsub)>;
7781+
}
77637782

77647783
// EDIT per word & halfword: 2s, 4h, 4s, & 8h
77657784
let isReMaterializable = 1, isAsCheapAsAMove = 1 in

‎llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 22 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -6185,18 +6185,26 @@ static bool getFauxShuffleMask(SDValue N, const APInt &DemandedElts,
61856185
}
61866186
if (!N->isOnlyUserOf(Sub.getNode()))
61876187
return false;
6188-
SDValue SubBC = peekThroughBitcasts(Sub);
6188+
6189+
SmallVector<int, 64> SubMask;
6190+
SmallVector<SDValue, 2> SubInputs;
6191+
SDValue SubSrc = peekThroughOneUseBitcasts(Sub);
6192+
EVT SubSrcVT = SubSrc.getValueType();
6193+
if (!SubSrcVT.isVector())
6194+
return false;
6195+
61896196
// Handle INSERT_SUBVECTOR(SRC0, EXTRACT_SUBVECTOR(SRC1)).
6190-
if (SubBC.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
6191-
SubBC.getOperand(0).getValueSizeInBits() == NumSizeInBits) {
6192-
uint64_t ExtractIdx = SubBC.getConstantOperandVal(1);
6193-
SDValue SubBCSrc = SubBC.getOperand(0);
6194-
unsigned NumSubSrcBCElts = SubBCSrc.getValueType().getVectorNumElements();
6195-
unsigned MaxElts = std::max(NumElts, NumSubSrcBCElts);
6196-
assert((MaxElts % NumElts) == 0 && (MaxElts % NumSubSrcBCElts) == 0 &&
6197+
if (SubSrc.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
6198+
SubSrc.getOperand(0).getValueSizeInBits() == NumSizeInBits) {
6199+
uint64_t ExtractIdx = SubSrc.getConstantOperandVal(1);
6200+
SDValue SubSrcSrc = SubSrc.getOperand(0);
6201+
unsigned NumSubSrcSrcElts =
6202+
SubSrcSrc.getValueType().getVectorNumElements();
6203+
unsigned MaxElts = std::max(NumElts, NumSubSrcSrcElts);
6204+
assert((MaxElts % NumElts) == 0 && (MaxElts % NumSubSrcSrcElts) == 0 &&
61976205
"Subvector valuetype mismatch");
61986206
InsertIdx *= (MaxElts / NumElts);
6199-
ExtractIdx *= (MaxElts / NumSubSrcBCElts);
6207+
ExtractIdx *= (MaxElts / NumSubSrcSrcElts);
62006208
NumSubElts *= (MaxElts / NumElts);
62016209
bool SrcIsUndef = Src.isUndef();
62026210
for (int i = 0; i != (int)MaxElts; ++i)
@@ -6205,17 +6213,11 @@ static bool getFauxShuffleMask(SDValue N, const APInt &DemandedElts,
62056213
Mask[InsertIdx + i] = (SrcIsUndef ? 0 : MaxElts) + ExtractIdx + i;
62066214
if (!SrcIsUndef)
62076215
Ops.push_back(Src);
6208-
Ops.push_back(SubBCSrc);
6216+
Ops.push_back(SubSrcSrc);
62096217
return true;
62106218
}
6211-
// Handle INSERT_SUBVECTOR(SRC0, SHUFFLE(SRC1)).
6212-
SmallVector<int, 64> SubMask;
6213-
SmallVector<SDValue, 2> SubInputs;
6214-
SDValue SubSrc = peekThroughOneUseBitcasts(Sub);
6215-
EVT SubSrcVT = SubSrc.getValueType();
6216-
if (!SubSrcVT.isVector())
6217-
return false;
62186219

6220+
// Handle INSERT_SUBVECTOR(SRC0, SHUFFLE(SRC1)).
62196221
APInt SubDemand = APInt::getAllOnes(SubSrcVT.getVectorNumElements());
62206222
if (!getTargetShuffleInputs(SubSrc, SubDemand, SubInputs, SubMask, DAG,
62216223
Depth + 1, ResolveKnownElts))
@@ -6230,10 +6232,11 @@ static bool getFauxShuffleMask(SDValue N, const APInt &DemandedElts,
62306232

62316233
if (SubMask.size() != NumSubElts) {
62326234
assert(((SubMask.size() % NumSubElts) == 0 ||
6233-
(NumSubElts % SubMask.size()) == 0) && "Illegal submask scale");
6235+
(NumSubElts % SubMask.size()) == 0) &&
6236+
"Illegal submask scale");
62346237
if ((NumSubElts % SubMask.size()) == 0) {
62356238
int Scale = NumSubElts / SubMask.size();
6236-
SmallVector<int,64> ScaledSubMask;
6239+
SmallVector<int, 64> ScaledSubMask;
62376240
narrowShuffleMaskElts(Scale, SubMask, ScaledSubMask);
62386241
SubMask = ScaledSubMask;
62396242
} else {

‎llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-scalable-contract.ll

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -50,10 +50,10 @@ entry:
5050
define <vscale x 4 x double> @mul_add_mull(<vscale x 4 x double> %a, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x double> %d) {
5151
; CHECK-LABEL: mul_add_mull:
5252
; CHECK: // %bb.0: // %entry
53-
; CHECK-NEXT: mov z24.d, #0 // =0x0
54-
; CHECK-NEXT: mov z25.d, #0 // =0x0
55-
; CHECK-NEXT: mov z26.d, #0 // =0x0
56-
; CHECK-NEXT: mov z27.d, #0 // =0x0
53+
; CHECK-NEXT: movi v24.2d, #0000000000000000
54+
; CHECK-NEXT: movi v25.2d, #0000000000000000
55+
; CHECK-NEXT: movi v26.2d, #0000000000000000
56+
; CHECK-NEXT: movi v27.2d, #0000000000000000
5757
; CHECK-NEXT: ptrue p0.d
5858
; CHECK-NEXT: fcmla z24.d, p0/m, z2.d, z0.d, #0
5959
; CHECK-NEXT: fcmla z25.d, p0/m, z3.d, z1.d, #0
@@ -101,10 +101,10 @@ entry:
101101
define <vscale x 4 x double> @mul_sub_mull(<vscale x 4 x double> %a, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x double> %d) {
102102
; CHECK-LABEL: mul_sub_mull:
103103
; CHECK: // %bb.0: // %entry
104-
; CHECK-NEXT: mov z24.d, #0 // =0x0
105-
; CHECK-NEXT: mov z25.d, #0 // =0x0
106-
; CHECK-NEXT: mov z26.d, #0 // =0x0
107-
; CHECK-NEXT: mov z27.d, #0 // =0x0
104+
; CHECK-NEXT: movi v24.2d, #0000000000000000
105+
; CHECK-NEXT: movi v25.2d, #0000000000000000
106+
; CHECK-NEXT: movi v26.2d, #0000000000000000
107+
; CHECK-NEXT: movi v27.2d, #0000000000000000
108108
; CHECK-NEXT: ptrue p0.d
109109
; CHECK-NEXT: fcmla z24.d, p0/m, z2.d, z0.d, #0
110110
; CHECK-NEXT: fcmla z25.d, p0/m, z3.d, z1.d, #0
@@ -152,10 +152,10 @@ entry:
152152
define <vscale x 4 x double> @mul_conj_mull(<vscale x 4 x double> %a, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x double> %d) {
153153
; CHECK-LABEL: mul_conj_mull:
154154
; CHECK: // %bb.0: // %entry
155-
; CHECK-NEXT: mov z24.d, #0 // =0x0
156-
; CHECK-NEXT: mov z25.d, #0 // =0x0
157-
; CHECK-NEXT: mov z26.d, #0 // =0x0
158-
; CHECK-NEXT: mov z27.d, #0 // =0x0
155+
; CHECK-NEXT: movi v24.2d, #0000000000000000
156+
; CHECK-NEXT: movi v25.2d, #0000000000000000
157+
; CHECK-NEXT: movi v26.2d, #0000000000000000
158+
; CHECK-NEXT: movi v27.2d, #0000000000000000
159159
; CHECK-NEXT: ptrue p0.d
160160
; CHECK-NEXT: fcmla z24.d, p0/m, z2.d, z0.d, #0
161161
; CHECK-NEXT: fcmla z25.d, p0/m, z3.d, z1.d, #0
@@ -204,7 +204,7 @@ define <vscale x 4 x double> @mul_add_rot_mull(<vscale x 4 x double> %a, <vscale
204204
; CHECK-LABEL: mul_add_rot_mull:
205205
; CHECK: // %bb.0: // %entry
206206
; CHECK-NEXT: uzp2 z24.d, z4.d, z5.d
207-
; CHECK-NEXT: mov z25.d, #0 // =0x0
207+
; CHECK-NEXT: movi v25.2d, #0000000000000000
208208
; CHECK-NEXT: uzp1 z4.d, z4.d, z5.d
209209
; CHECK-NEXT: ptrue p0.d
210210
; CHECK-NEXT: mov z26.d, z24.d

‎llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-scalable-fast.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -41,8 +41,8 @@ entry:
4141
define <vscale x 4 x double> @mul_add_mull(<vscale x 4 x double> %a, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x double> %d) {
4242
; CHECK-LABEL: mul_add_mull:
4343
; CHECK: // %bb.0: // %entry
44-
; CHECK-NEXT: mov z24.d, #0 // =0x0
45-
; CHECK-NEXT: mov z25.d, #0 // =0x0
44+
; CHECK-NEXT: movi v24.2d, #0000000000000000
45+
; CHECK-NEXT: movi v25.2d, #0000000000000000
4646
; CHECK-NEXT: ptrue p0.d
4747
; CHECK-NEXT: fcmla z25.d, p0/m, z6.d, z4.d, #0
4848
; CHECK-NEXT: fcmla z24.d, p0/m, z7.d, z5.d, #0
@@ -90,8 +90,8 @@ entry:
9090
define <vscale x 4 x double> @mul_sub_mull(<vscale x 4 x double> %a, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x double> %d) {
9191
; CHECK-LABEL: mul_sub_mull:
9292
; CHECK: // %bb.0: // %entry
93-
; CHECK-NEXT: mov z24.d, #0 // =0x0
94-
; CHECK-NEXT: mov z25.d, #0 // =0x0
93+
; CHECK-NEXT: movi v24.2d, #0000000000000000
94+
; CHECK-NEXT: movi v25.2d, #0000000000000000
9595
; CHECK-NEXT: ptrue p0.d
9696
; CHECK-NEXT: fcmla z25.d, p0/m, z6.d, z4.d, #270
9797
; CHECK-NEXT: fcmla z24.d, p0/m, z7.d, z5.d, #270
@@ -139,8 +139,8 @@ entry:
139139
define <vscale x 4 x double> @mul_conj_mull(<vscale x 4 x double> %a, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x double> %d) {
140140
; CHECK-LABEL: mul_conj_mull:
141141
; CHECK: // %bb.0: // %entry
142-
; CHECK-NEXT: mov z24.d, #0 // =0x0
143-
; CHECK-NEXT: mov z25.d, #0 // =0x0
142+
; CHECK-NEXT: movi v24.2d, #0000000000000000
143+
; CHECK-NEXT: movi v25.2d, #0000000000000000
144144
; CHECK-NEXT: ptrue p0.d
145145
; CHECK-NEXT: fcmla z25.d, p0/m, z0.d, z2.d, #0
146146
; CHECK-NEXT: fcmla z24.d, p0/m, z1.d, z3.d, #0

‎llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-mul-scalable.ll

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,7 @@ entry:
4646
define <vscale x 8 x half> @complex_mul_v8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b) {
4747
; CHECK-LABEL: complex_mul_v8f16:
4848
; CHECK: // %bb.0: // %entry
49-
; CHECK-NEXT: mov z2.h, #0 // =0x0
49+
; CHECK-NEXT: movi v2.2d, #0000000000000000
5050
; CHECK-NEXT: ptrue p0.h
5151
; CHECK-NEXT: fcmla z2.h, p0/m, z1.h, z0.h, #0
5252
; CHECK-NEXT: fcmla z2.h, p0/m, z1.h, z0.h, #90
@@ -72,8 +72,8 @@ entry:
7272
define <vscale x 16 x half> @complex_mul_v16f16(<vscale x 16 x half> %a, <vscale x 16 x half> %b) {
7373
; CHECK-LABEL: complex_mul_v16f16:
7474
; CHECK: // %bb.0: // %entry
75-
; CHECK-NEXT: mov z4.h, #0 // =0x0
76-
; CHECK-NEXT: mov z5.h, #0 // =0x0
75+
; CHECK-NEXT: movi v4.2d, #0000000000000000
76+
; CHECK-NEXT: movi v5.2d, #0000000000000000
7777
; CHECK-NEXT: ptrue p0.h
7878
; CHECK-NEXT: fcmla z5.h, p0/m, z2.h, z0.h, #0
7979
; CHECK-NEXT: fcmla z4.h, p0/m, z3.h, z1.h, #0
@@ -103,10 +103,10 @@ entry:
103103
define <vscale x 32 x half> @complex_mul_v32f16(<vscale x 32 x half> %a, <vscale x 32 x half> %b) {
104104
; CHECK-LABEL: complex_mul_v32f16:
105105
; CHECK: // %bb.0: // %entry
106-
; CHECK-NEXT: mov z24.h, #0 // =0x0
107-
; CHECK-NEXT: mov z25.h, #0 // =0x0
108-
; CHECK-NEXT: mov z26.h, #0 // =0x0
109-
; CHECK-NEXT: mov z27.h, #0 // =0x0
106+
; CHECK-NEXT: movi v24.2d, #0000000000000000
107+
; CHECK-NEXT: movi v25.2d, #0000000000000000
108+
; CHECK-NEXT: movi v26.2d, #0000000000000000
109+
; CHECK-NEXT: movi v27.2d, #0000000000000000
110110
; CHECK-NEXT: ptrue p0.h
111111
; CHECK-NEXT: fcmla z24.h, p0/m, z4.h, z0.h, #0
112112
; CHECK-NEXT: fcmla z25.h, p0/m, z5.h, z1.h, #0

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