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Merged main:7ac532efc8ae into amd-gfx:d8f80774ebd7
Local branch amd-gfx d8f8077 Merged main:ab472cd4ea12 into amd-gfx:881edfeace15 Remote branch main 7ac532e [AMDGPU] Introduce AMDGPU::SGPR_SPILL asm comment flag (llvm#67091)
2 parents d8f8077 + 7ac532e commit 259556a

39 files changed

+188
-67
lines changed

‎clang/lib/Interpreter/CMakeLists.txt

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@ set(LLVM_LINK_COMPONENTS
44
MC
55
Option
66
OrcJit
7+
OrcDebugging
78
OrcShared
89
OrcTargetProcess
910
Support

‎clang/lib/Interpreter/IncrementalExecutor.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@
1717
#include "clang/Interpreter/PartialTranslationUnit.h"
1818
#include "llvm/ExecutionEngine/ExecutionEngine.h"
1919
#include "llvm/ExecutionEngine/Orc/CompileUtils.h"
20-
#include "llvm/ExecutionEngine/Orc/DebuggerSupport.h"
20+
#include "llvm/ExecutionEngine/Orc/Debugging/DebuggerSupport.h"
2121
#include "llvm/ExecutionEngine/Orc/ExecutionUtils.h"
2222
#include "llvm/ExecutionEngine/Orc/IRCompileLayer.h"
2323
#include "llvm/ExecutionEngine/Orc/LLJIT.h"

‎clang/test/AST/Interp/arrays.cpp

Lines changed: 22 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
// RUN: %clang_cc1 -fexperimental-new-constant-interpreter -verify %s
2-
// RUN: %clang_cc1 -verify=ref %s
2+
// RUN: %clang_cc1 -verify=ref -DCUR_INTERP %s
33

44
constexpr int m = 3;
55
constexpr const int *foo[][5] = {
@@ -350,3 +350,24 @@ namespace ZeroInit {
350350
static_assert(b.f[0] == 0.0, "");
351351
static_assert(b.f[1] == 0.0, "");
352352
}
353+
354+
namespace ArrayInitLoop {
355+
/// FIXME: The ArrayInitLoop for the decomposition initializer in g() has
356+
/// f(n) as its CommonExpr. We need to evaluate that exactly once and not
357+
/// N times as we do right now.
358+
#ifndef CUR_INTERP
359+
struct X {
360+
int arr[3];
361+
};
362+
constexpr X f(int &r) {
363+
return {++r, ++r, ++r};
364+
}
365+
constexpr int g() {
366+
int n = 0;
367+
auto [a, b, c] = f(n).arr;
368+
return a + b + c;
369+
}
370+
static_assert(g() == 6); // expected-error {{failed}} \
371+
// expected-note {{15 == 6}}
372+
#endif
373+
}

‎llvm/include/llvm/Config/llvm-config.h.cmake

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616

1717
/* Indicate that this is LLVM compiled from the amd-gfx branch. */
1818
#define LLVM_HAVE_BRANCH_AMD_GFX
19-
#define LLVM_MAIN_REVISION 476309
19+
#define LLVM_MAIN_REVISION 476314
2020

2121
/* Define if LLVM_ENABLE_DUMP is enabled */
2222
#cmakedefine LLVM_ENABLE_DUMP

‎llvm/include/llvm/ExecutionEngine/Orc/DebuggerSupport.h renamed to ‎llvm/include/llvm/ExecutionEngine/Orc/Debugging/DebuggerSupport.h

File renamed without changes.

‎llvm/include/llvm/ExecutionEngine/Orc/DebuggerSupportPlugin.h renamed to ‎llvm/include/llvm/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.h

File renamed without changes.

‎llvm/lib/ExecutionEngine/Orc/CMakeLists.txt

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,8 +13,6 @@ add_llvm_component_library(LLVMOrcJIT
1313
CompileUtils.cpp
1414
Core.cpp
1515
DebugObjectManagerPlugin.cpp
16-
DebuggerSupport.cpp
17-
DebuggerSupportPlugin.cpp
1816
DebugUtils.cpp
1917
EPCDynamicLibrarySearchGenerator.cpp
2018
EPCDebugObjectRegistrar.cpp

‎llvm/lib/ExecutionEngine/Orc/Debugging/CMakeLists.txt

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,8 @@ endif()
44

55
add_llvm_component_library(LLVMOrcDebugging
66
DebugInfoSupport.cpp
7+
DebuggerSupport.cpp
8+
DebuggerSupportPlugin.cpp
79
PerfSupportPlugin.cpp
810

911
ADDITIONAL_HEADER_DIRS
@@ -15,6 +17,7 @@ add_llvm_component_library(LLVMOrcDebugging
1517

1618
LINK_COMPONENTS
1719
DebugInfoDWARF
20+
JITLink
1821
OrcJIT
1922
OrcShared
2023
Support

‎llvm/lib/ExecutionEngine/Orc/DebuggerSupport.cpp renamed to ‎llvm/lib/ExecutionEngine/Orc/Debugging/DebuggerSupport.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6,9 +6,9 @@
66
//
77
//===----------------------------------------------------------------------===//
88

9-
#include "llvm/ExecutionEngine/Orc/DebuggerSupport.h"
9+
#include "llvm/ExecutionEngine/Orc/Debugging/DebuggerSupport.h"
1010
#include "llvm/ExecutionEngine/Orc/DebugObjectManagerPlugin.h"
11-
#include "llvm/ExecutionEngine/Orc/DebuggerSupportPlugin.h"
11+
#include "llvm/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.h"
1212
#include "llvm/ExecutionEngine/Orc/LLJIT.h"
1313

1414
#define DEBUG_TYPE "orc"

‎llvm/lib/ExecutionEngine/Orc/DebuggerSupportPlugin.cpp renamed to ‎llvm/lib/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.cpp

Lines changed: 63 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -9,13 +9,17 @@
99
//
1010
//===----------------------------------------------------------------------===//
1111

12-
#include "llvm/ExecutionEngine/Orc/DebuggerSupportPlugin.h"
12+
#include "llvm/ExecutionEngine/Orc/Debugging/DebuggerSupportPlugin.h"
1313
#include "llvm/ExecutionEngine/Orc/MachOBuilder.h"
1414

1515
#include "llvm/ADT/SmallSet.h"
1616
#include "llvm/ADT/SmallVector.h"
1717
#include "llvm/ADT/StringSet.h"
1818
#include "llvm/BinaryFormat/MachO.h"
19+
#include "llvm/DebugInfo/DWARF/DWARFContext.h"
20+
#include "llvm/DebugInfo/DWARF/DWARFDebugLine.h"
21+
22+
#include <chrono>
1923

2024
#define DEBUG_TYPE "orc"
2125

@@ -97,8 +101,6 @@ class MachODebugObjectSynthesizer : public MachODebugObjectSynthesizerBase {
97101
<< "\n";
98102
});
99103

100-
auto &SDOSec = G.createSection(SynthDebugSectionName, MemProt::Read);
101-
102104
for (auto &Sec : G.sections()) {
103105
if (Sec.blocks().empty())
104106
continue;
@@ -114,6 +116,10 @@ class MachODebugObjectSynthesizer : public MachODebugObjectSynthesizerBase {
114116
NonDebugSections.push_back({&Sec, nullptr});
115117
}
116118

119+
// Bail out early if no debug sections.
120+
if (DebugSections.empty())
121+
return Error::success();
122+
117123
// Write MachO header and debug section load commands.
118124
Builder.Header.filetype = MachO::MH_OBJECT;
119125
switch (G.getTargetTriple().getArch()) {
@@ -131,16 +137,65 @@ class MachODebugObjectSynthesizer : public MachODebugObjectSynthesizerBase {
131137

132138
Seg = &Builder.addSegment("");
133139

140+
StringMap<std::unique_ptr<MemoryBuffer>> DebugSectionMap;
141+
StringRef DebugLineSectionData;
134142
for (auto &DSec : DebugSections) {
135143
auto [SegName, SecName] = DSec.GraphSec->getName().split(',');
136144
DSec.BuilderSec = &Seg->addSection(SecName, SegName);
137145

138146
SectionRange SR(*DSec.GraphSec);
139147
DSec.BuilderSec->Content.Size = SR.getSize();
140-
if (!SR.empty())
148+
if (!SR.empty()) {
141149
DSec.BuilderSec->align = Log2_64(SR.getFirstBlock()->getAlignment());
150+
StringRef SectionData(SR.getFirstBlock()->getContent().data(),
151+
SR.getFirstBlock()->getSize());
152+
DebugSectionMap[SecName] =
153+
MemoryBuffer::getMemBuffer(SectionData, G.getName(), false);
154+
if (SecName == "__debug_line")
155+
DebugLineSectionData = SectionData;
156+
}
142157
}
143158

159+
std::optional<std::string> FileName;
160+
if (!DebugLineSectionData.empty()) {
161+
auto DWARFCtx = DWARFContext::create(DebugSectionMap, G.getPointerSize(),
162+
G.getEndianness());
163+
DWARFDataExtractor DebugLineData(
164+
DebugLineSectionData,
165+
G.getEndianness() == support::endianness::little, G.getPointerSize());
166+
uint64_t Offset = 0;
167+
DWARFDebugLine::LineTable LineTable;
168+
169+
// Try to parse line data. Consume error on failure.
170+
if (auto Err = LineTable.parse(DebugLineData, &Offset, *DWARFCtx, nullptr,
171+
consumeError)) {
172+
handleAllErrors(
173+
std::move(Err),
174+
[&](ErrorInfoBase &EIB) {
175+
LLVM_DEBUG({
176+
dbgs() << "Cannot parse line table for \"" << G.getName() << "\": ";
177+
EIB.log(dbgs());
178+
dbgs() << "\n";
179+
});
180+
});
181+
} else {
182+
if (!LineTable.Prologue.FileNames.empty())
183+
FileName = *dwarf::toString(LineTable.Prologue.FileNames[0].Name);
184+
}
185+
}
186+
187+
// If no line table (or unable to use) then use graph name.
188+
// FIXME: There are probably other debug sections we should look in first.
189+
if (!FileName)
190+
FileName = G.getName();
191+
192+
Builder.addSymbol("", MachO::N_SO, 0, 0, 0);
193+
Builder.addSymbol(*FileName, MachO::N_SO, 0, 0, 0);
194+
auto TimeStamp = std::chrono::duration_cast<std::chrono::seconds>(
195+
std::chrono::system_clock::now().time_since_epoch())
196+
.count();
197+
Builder.addSymbol("", MachO::N_OSO, 3, 1, TimeStamp);
198+
144199
for (auto &NDSP : NonDebugSections) {
145200
auto [SegName, SecName] = NDSP.GraphSec->getName().split(',');
146201
NDSP.BuilderSec = &Seg->addSection(SecName, SegName);
@@ -164,8 +219,12 @@ class MachODebugObjectSynthesizer : public MachODebugObjectSynthesizerBase {
164219
}
165220
}
166221

222+
Builder.addSymbol("", MachO::N_SO, 1, 0, 0);
223+
224+
// Lay out the debug object, create a section and block for it.
167225
size_t DebugObjectSize = Builder.layout();
168226

227+
auto &SDOSec = G.createSection(SynthDebugSectionName, MemProt::Read);
169228
MachOContainerBlock = &G.createMutableContentBlock(
170229
SDOSec, G.allocateBuffer(DebugObjectSize), orc::ExecutorAddr(), 8, 0);
171230

‎llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -250,6 +250,21 @@ void AMDGPUAsmPrinter::emitFunctionBodyEnd() {
250250
Streamer.popSection();
251251
}
252252

253+
void AMDGPUAsmPrinter::emitImplicitDef(const MachineInstr *MI) const {
254+
Register RegNo = MI->getOperand(0).getReg();
255+
256+
SmallString<128> Str;
257+
raw_svector_ostream OS(Str);
258+
OS << "implicit-def: "
259+
<< printReg(RegNo, MF->getSubtarget().getRegisterInfo());
260+
261+
if (MI->getAsmPrinterFlags() & AMDGPU::SGPR_SPILL)
262+
OS << " : SGPR spill to VGPR lane";
263+
264+
OutStreamer->AddComment(OS.str());
265+
OutStreamer->addBlankLine();
266+
}
267+
253268
void AMDGPUAsmPrinter::emitFunctionEntryLabel() {
254269
if (TM.getTargetTriple().getOS() == Triple::AMDHSA) {
255270
AsmPrinter::emitFunctionEntryLabel();

‎llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -116,6 +116,8 @@ class AMDGPUAsmPrinter final : public AsmPrinter {
116116

117117
void emitFunctionBodyEnd() override;
118118

119+
void emitImplicitDef(const MachineInstr *MI) const override;
120+
119121
void emitFunctionEntryLabel() override;
120122

121123
void emitBasicBlockStart(const MachineBasicBlock &MBB) override;

‎llvm/lib/Target/AMDGPU/SIInstrInfo.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1397,6 +1397,13 @@ namespace AMDGPU {
13971397

13981398
} // end namespace AMDGPU
13991399

1400+
namespace AMDGPU {
1401+
enum AsmComments {
1402+
// For sgpr to vgpr spill instructions
1403+
SGPR_SPILL = MachineInstr::TAsmComments
1404+
};
1405+
} // namespace AMDGPU
1406+
14001407
namespace SI {
14011408
namespace KernelInputOffsets {
14021409

‎llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -281,6 +281,8 @@ void SILowerSGPRSpills::extendWWMVirtRegLiveness(MachineFunction &MF,
281281
auto MIB = BuildMI(*SaveBlock, *InsertBefore, InsertBefore->getDebugLoc(),
282282
TII->get(AMDGPU::IMPLICIT_DEF), Reg);
283283
MFI->setFlag(Reg, AMDGPU::VirtRegFlag::WWM_REG);
284+
// Set SGPR_SPILL asm printer flag
285+
MIB->setAsmPrinterFlag(AMDGPU::SGPR_SPILL);
284286
if (LIS) {
285287
LIS->InsertMachineInstrInMaps(*MIB);
286288
}

‎llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ define <4 x float> @waterfall_loop(<8 x i32> %vgpr_srd) {
1515
; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:80 ; 4-byte Folded Spill
1616
; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:84 ; 4-byte Folded Spill
1717
; CHECK-NEXT: s_mov_b32 exec_lo, s4
18-
; CHECK-NEXT: ; implicit-def: $vgpr8
18+
; CHECK-NEXT: ; implicit-def: $vgpr8 : SGPR spill to VGPR lane
1919
; CHECK-NEXT: v_mov_b32_e32 v8, v0
2020
; CHECK-NEXT: s_or_saveexec_b32 s21, -1
2121
; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 ; 4-byte Folded Reload

‎llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ define amdgpu_kernel void @test_loop(ptr addrspace(3) %ptr, i32 %n) nounwind {
3636
; GCN_DBG-NEXT: s_mov_b32 s15, 0xe8f000
3737
; GCN_DBG-NEXT: s_add_u32 s12, s12, s11
3838
; GCN_DBG-NEXT: s_addc_u32 s13, s13, 0
39-
; GCN_DBG-NEXT: ; implicit-def: $vgpr0
39+
; GCN_DBG-NEXT: ; implicit-def: $vgpr0 : SGPR spill to VGPR lane
4040
; GCN_DBG-NEXT: s_load_dword s0, s[4:5], 0x9
4141
; GCN_DBG-NEXT: s_waitcnt lgkmcnt(0)
4242
; GCN_DBG-NEXT: v_writelane_b32 v0, s0, 0
@@ -144,7 +144,7 @@ define amdgpu_kernel void @loop_const_true(ptr addrspace(3) %ptr, i32 %n) nounwi
144144
; GCN_DBG-NEXT: s_mov_b32 s15, 0xe8f000
145145
; GCN_DBG-NEXT: s_add_u32 s12, s12, s11
146146
; GCN_DBG-NEXT: s_addc_u32 s13, s13, 0
147-
; GCN_DBG-NEXT: ; implicit-def: $vgpr0
147+
; GCN_DBG-NEXT: ; implicit-def: $vgpr0 : SGPR spill to VGPR lane
148148
; GCN_DBG-NEXT: s_load_dword s0, s[4:5], 0x9
149149
; GCN_DBG-NEXT: s_waitcnt lgkmcnt(0)
150150
; GCN_DBG-NEXT: v_writelane_b32 v0, s0, 0
@@ -232,7 +232,7 @@ define amdgpu_kernel void @loop_const_false(ptr addrspace(3) %ptr, i32 %n) nounw
232232
; GCN_DBG-NEXT: s_mov_b32 s15, 0xe8f000
233233
; GCN_DBG-NEXT: s_add_u32 s12, s12, s11
234234
; GCN_DBG-NEXT: s_addc_u32 s13, s13, 0
235-
; GCN_DBG-NEXT: ; implicit-def: $vgpr0
235+
; GCN_DBG-NEXT: ; implicit-def: $vgpr0 : SGPR spill to VGPR lane
236236
; GCN_DBG-NEXT: s_load_dword s0, s[4:5], 0x9
237237
; GCN_DBG-NEXT: s_waitcnt lgkmcnt(0)
238238
; GCN_DBG-NEXT: v_writelane_b32 v0, s0, 0
@@ -321,7 +321,7 @@ define amdgpu_kernel void @loop_const_undef(ptr addrspace(3) %ptr, i32 %n) nounw
321321
; GCN_DBG-NEXT: s_mov_b32 s15, 0xe8f000
322322
; GCN_DBG-NEXT: s_add_u32 s12, s12, s11
323323
; GCN_DBG-NEXT: s_addc_u32 s13, s13, 0
324-
; GCN_DBG-NEXT: ; implicit-def: $vgpr0
324+
; GCN_DBG-NEXT: ; implicit-def: $vgpr0 : SGPR spill to VGPR lane
325325
; GCN_DBG-NEXT: s_load_dword s0, s[4:5], 0x9
326326
; GCN_DBG-NEXT: s_waitcnt lgkmcnt(0)
327327
; GCN_DBG-NEXT: v_writelane_b32 v0, s0, 0
@@ -422,7 +422,7 @@ define amdgpu_kernel void @loop_arg_0(ptr addrspace(3) %ptr, i32 %n) nounwind {
422422
; GCN_DBG-NEXT: s_mov_b32 s15, 0xe8f000
423423
; GCN_DBG-NEXT: s_add_u32 s12, s12, s11
424424
; GCN_DBG-NEXT: s_addc_u32 s13, s13, 0
425-
; GCN_DBG-NEXT: ; implicit-def: $vgpr0
425+
; GCN_DBG-NEXT: ; implicit-def: $vgpr0 : SGPR spill to VGPR lane
426426
; GCN_DBG-NEXT: s_load_dword s0, s[4:5], 0x9
427427
; GCN_DBG-NEXT: s_waitcnt lgkmcnt(0)
428428
; GCN_DBG-NEXT: v_writelane_b32 v0, s0, 0

‎llvm/test/CodeGen/AMDGPU/collapse-endcf.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -48,7 +48,7 @@ define amdgpu_kernel void @simple_nested_if(ptr addrspace(1) nocapture %arg) {
4848
; GCN-O0-NEXT: s_mov_b32 s15, 0xe8f000
4949
; GCN-O0-NEXT: s_add_u32 s12, s12, s11
5050
; GCN-O0-NEXT: s_addc_u32 s13, s13, 0
51-
; GCN-O0-NEXT: ; implicit-def: $vgpr1
51+
; GCN-O0-NEXT: ; implicit-def: $vgpr1 : SGPR spill to VGPR lane
5252
; GCN-O0-NEXT: v_mov_b32_e32 v1, v0
5353
; GCN-O0-NEXT: s_or_saveexec_b64 s[8:9], -1
5454
; GCN-O0-NEXT: buffer_load_dword v0, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload
@@ -221,7 +221,7 @@ define amdgpu_kernel void @uncollapsable_nested_if(ptr addrspace(1) nocapture %a
221221
; GCN-O0-NEXT: s_mov_b32 s15, 0xe8f000
222222
; GCN-O0-NEXT: s_add_u32 s12, s12, s11
223223
; GCN-O0-NEXT: s_addc_u32 s13, s13, 0
224-
; GCN-O0-NEXT: ; implicit-def: $vgpr1
224+
; GCN-O0-NEXT: ; implicit-def: $vgpr1 : SGPR spill to VGPR lane
225225
; GCN-O0-NEXT: v_mov_b32_e32 v1, v0
226226
; GCN-O0-NEXT: s_or_saveexec_b64 s[8:9], -1
227227
; GCN-O0-NEXT: buffer_load_dword v0, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload
@@ -430,7 +430,7 @@ define amdgpu_kernel void @nested_if_if_else(ptr addrspace(1) nocapture %arg) {
430430
; GCN-O0-NEXT: s_mov_b32 s15, 0xe8f000
431431
; GCN-O0-NEXT: s_add_u32 s12, s12, s11
432432
; GCN-O0-NEXT: s_addc_u32 s13, s13, 0
433-
; GCN-O0-NEXT: ; implicit-def: $vgpr1
433+
; GCN-O0-NEXT: ; implicit-def: $vgpr1 : SGPR spill to VGPR lane
434434
; GCN-O0-NEXT: v_mov_b32_e32 v1, v0
435435
; GCN-O0-NEXT: s_or_saveexec_b64 s[6:7], -1
436436
; GCN-O0-NEXT: buffer_load_dword v0, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload
@@ -676,7 +676,7 @@ define amdgpu_kernel void @nested_if_else_if(ptr addrspace(1) nocapture %arg) {
676676
; GCN-O0-NEXT: s_mov_b32 s15, 0xe8f000
677677
; GCN-O0-NEXT: s_add_u32 s12, s12, s11
678678
; GCN-O0-NEXT: s_addc_u32 s13, s13, 0
679-
; GCN-O0-NEXT: ; implicit-def: $vgpr1
679+
; GCN-O0-NEXT: ; implicit-def: $vgpr1 : SGPR spill to VGPR lane
680680
; GCN-O0-NEXT: v_mov_b32_e32 v1, v0
681681
; GCN-O0-NEXT: s_or_saveexec_b64 s[8:9], -1
682682
; GCN-O0-NEXT: buffer_load_dword v0, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload
@@ -931,7 +931,7 @@ define amdgpu_kernel void @s_endpgm_unsafe_barrier(ptr addrspace(1) nocapture %a
931931
; GCN-O0-NEXT: s_mov_b32 s15, 0xe8f000
932932
; GCN-O0-NEXT: s_add_u32 s12, s12, s11
933933
; GCN-O0-NEXT: s_addc_u32 s13, s13, 0
934-
; GCN-O0-NEXT: ; implicit-def: $vgpr1
934+
; GCN-O0-NEXT: ; implicit-def: $vgpr1 : SGPR spill to VGPR lane
935935
; GCN-O0-NEXT: v_mov_b32_e32 v1, v0
936936
; GCN-O0-NEXT: s_or_saveexec_b64 s[6:7], -1
937937
; GCN-O0-NEXT: buffer_load_dword v0, off, s[12:15], 0 offset:4 ; 4-byte Folded Reload
@@ -1080,7 +1080,7 @@ define void @scc_liveness(i32 %arg) local_unnamed_addr #0 {
10801080
; GCN-O0-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:72 ; 4-byte Folded Spill
10811081
; GCN-O0-NEXT: buffer_store_dword v4, off, s[0:3], s32 offset:76 ; 4-byte Folded Spill
10821082
; GCN-O0-NEXT: s_mov_b64 exec, s[4:5]
1083-
; GCN-O0-NEXT: ; implicit-def: $vgpr1
1083+
; GCN-O0-NEXT: ; implicit-def: $vgpr1 : SGPR spill to VGPR lane
10841084
; GCN-O0-NEXT: v_mov_b32_e32 v1, v0
10851085
; GCN-O0-NEXT: s_or_saveexec_b64 s[14:15], -1
10861086
; GCN-O0-NEXT: s_waitcnt expcnt(1)

‎llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -117,7 +117,7 @@ define amdgpu_kernel void @test(ptr addrspace(1) %out, i32 %in) {
117117
; FLAT_SCR_OPT-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_LO), s2
118118
; FLAT_SCR_OPT-NEXT: s_setreg_b32 hwreg(HW_REG_FLAT_SCR_HI), s3
119119
; FLAT_SCR_OPT-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x0
120-
; FLAT_SCR_OPT-NEXT: ; implicit-def: $vgpr0
120+
; FLAT_SCR_OPT-NEXT: ; implicit-def: $vgpr0 : SGPR spill to VGPR lane
121121
; FLAT_SCR_OPT-NEXT: s_waitcnt lgkmcnt(0)
122122
; FLAT_SCR_OPT-NEXT: v_writelane_b32 v0, s2, 0
123123
; FLAT_SCR_OPT-NEXT: v_writelane_b32 v0, s3, 1
@@ -240,7 +240,7 @@ define amdgpu_kernel void @test(ptr addrspace(1) %out, i32 %in) {
240240
; FLAT_SCR_ARCH-LABEL: test:
241241
; FLAT_SCR_ARCH: ; %bb.0:
242242
; FLAT_SCR_ARCH-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x0
243-
; FLAT_SCR_ARCH-NEXT: ; implicit-def: $vgpr0
243+
; FLAT_SCR_ARCH-NEXT: ; implicit-def: $vgpr0 : SGPR spill to VGPR lane
244244
; FLAT_SCR_ARCH-NEXT: s_waitcnt lgkmcnt(0)
245245
; FLAT_SCR_ARCH-NEXT: v_writelane_b32 v0, s2, 0
246246
; FLAT_SCR_ARCH-NEXT: v_writelane_b32 v0, s3, 1

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