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Merged main:0183b58e292d9d7004fabc92bd0da10eba5666db into amd-gfx:378c20547273
Local branch amd-gfx 378c205 Merged main:7a28a5b3fee6c78ad59af79a3d03c00db153c49f into amd-gfx:6434034d613e Remote branch main 0183b58 [Clang] Correctly diagnose a static function overloading a non-static function (llvm#93460)
2 parents 378c205 + 0183b58 commit 3efff4a

21 files changed

+4851
-27
lines changed

‎clang/docs/ReleaseNotes.rst

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -797,6 +797,8 @@ Bug Fixes to C++ Support
797797
in dependent contexts. Fixes (#GH92680).
798798
- Fixed a crash when diagnosing failed conversions involving template parameter
799799
packs. (#GH93076)
800+
- Fixed a regression introduced in Clang 18 causing a static function overloading a non-static function
801+
with the same parameters not to be diagnosed. (Fixes #GH93456).
800802

801803
Bug Fixes to AST Handling
802804
^^^^^^^^^^^^^^^^^^^^^^^^^

‎clang/lib/AST/Interp/ByteCodeExprGen.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2672,6 +2672,9 @@ bool ByteCodeExprGen<Emitter>::delegate(const Expr *E) {
26722672
}
26732673

26742674
template <class Emitter> bool ByteCodeExprGen<Emitter>::visit(const Expr *E) {
2675+
if (E->getType().isNull())
2676+
return false;
2677+
26752678
if (E->getType()->isVoidType())
26762679
return this->discard(E);
26772680

‎clang/lib/Sema/SemaOverload.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1482,7 +1482,7 @@ static bool IsOverloadOrOverrideImpl(Sema &SemaRef, FunctionDecl *New,
14821482
}
14831483

14841484
if (OldMethod && NewMethod && !OldMethod->isStatic() &&
1485-
!OldMethod->isStatic()) {
1485+
!NewMethod->isStatic()) {
14861486
bool HaveCorrespondingObjectParameters = [&](const CXXMethodDecl *Old,
14871487
const CXXMethodDecl *New) {
14881488
auto NewObjectType = New->getFunctionObjectParameterReferenceType();

‎clang/test/SemaCXX/overload-decl.cpp

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -36,3 +36,20 @@ class X {
3636

3737
int main() {} // expected-note {{previous definition is here}}
3838
int main(int,char**) {} // expected-error {{conflicting types for 'main'}}
39+
40+
41+
namespace GH93456 {
42+
43+
struct X {
44+
static void f(); // expected-note {{previous declaration is here}}
45+
void f() const;
46+
// expected-error@-1 {{static and non-static member functions with the same parameter types cannot be overloaded}}
47+
};
48+
49+
struct Y {
50+
void f() const; // expected-note {{previous declaration is here}}
51+
static void f();
52+
// expected-error@-1 {{static and non-static member functions with the same parameter types cannot be overloaded}}
53+
};
54+
55+
}

‎clang/test/SemaCXX/recovery-expr-type.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,5 @@
1+
// RUN: %clang_cc1 -triple=x86_64-unknown-unknown -o - %s -std=gnu++17 -fsyntax-only -verify -fexperimental-new-constant-interpreter
2+
// RUN: %clang_cc1 -triple=x86_64-unknown-unknown -o - %s -std=gnu++20 -fsyntax-only -verify -fexperimental-new-constant-interpreter
13
// RUN: %clang_cc1 -triple=x86_64-unknown-unknown -o - %s -std=gnu++17 -fsyntax-only -verify
24
// RUN: %clang_cc1 -triple=x86_64-unknown-unknown -o - %s -std=gnu++20 -fsyntax-only -verify
35

‎llvm/include/llvm/ADT/GenericUniformityImpl.h

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -46,14 +46,13 @@
4646

4747
#include "llvm/ADT/GenericUniformityInfo.h"
4848

49+
#include "llvm/ADT/DenseSet.h"
4950
#include "llvm/ADT/STLExtras.h"
5051
#include "llvm/ADT/SmallPtrSet.h"
5152
#include "llvm/ADT/SparseBitVector.h"
5253
#include "llvm/ADT/StringExtras.h"
5354
#include "llvm/Support/raw_ostream.h"
5455

55-
#include <set>
56-
5756
#define DEBUG_TYPE "uniformity"
5857

5958
namespace llvm {
@@ -413,7 +412,7 @@ template <typename ContextT> class GenericUniformityAnalysisImpl {
413412
const TargetTransformInfo *TTI = nullptr;
414413

415414
// Detected/marked divergent values.
416-
std::set<ConstValueRefT> DivergentValues;
415+
DenseSet<ConstValueRefT> DivergentValues;
417416
SmallPtrSet<const BlockT *, 32> DivergentTermBlocks;
418417

419418
// Internal worklist for divergence propagation.

‎llvm/include/llvm/Config/llvm-config.h.cmake

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616

1717
/* Indicate that this is LLVM compiled from the amd-gfx branch. */
1818
#define LLVM_HAVE_BRANCH_AMD_GFX
19-
#define LLVM_MAIN_REVISION 499852
19+
#define LLVM_MAIN_REVISION 499856
2020

2121
/* Define if LLVM_ENABLE_DUMP is enabled */
2222
#cmakedefine LLVM_ENABLE_DUMP

‎llvm/lib/Target/AMDGPU/AMDGPUGISel.td

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -250,6 +250,11 @@ def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_USHORT, SIbuffer_load_ushort>;
250250
def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_UBYTE, SIbuffer_load_ubyte>;
251251
def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_SSHORT, SIbuffer_load_short>;
252252
def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_SBYTE, SIbuffer_load_byte>;
253+
def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_TFE, SIbuffer_load_tfe>;
254+
def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_USHORT_TFE, SIbuffer_load_ushort_tfe>;
255+
def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_UBYTE_TFE, SIbuffer_load_ubyte_tfe>;
256+
def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_SSHORT_TFE, SIbuffer_load_short_tfe>;
257+
def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_SBYTE_TFE, SIbuffer_load_byte_tfe>;
253258
def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_FORMAT, SIbuffer_load_format>;
254259
def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_FORMAT_TFE, SIbuffer_load_format_tfe>;
255260
def : GINodeEquiv<G_AMDGPU_BUFFER_LOAD_FORMAT_D16, SIbuffer_load_format_d16>;

‎llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5534,6 +5534,11 @@ const char* AMDGPUTargetLowering::getTargetNodeName(unsigned Opcode) const {
55345534
NODE_NAME_CASE(BUFFER_LOAD_USHORT)
55355535
NODE_NAME_CASE(BUFFER_LOAD_BYTE)
55365536
NODE_NAME_CASE(BUFFER_LOAD_SHORT)
5537+
NODE_NAME_CASE(BUFFER_LOAD_TFE)
5538+
NODE_NAME_CASE(BUFFER_LOAD_UBYTE_TFE)
5539+
NODE_NAME_CASE(BUFFER_LOAD_USHORT_TFE)
5540+
NODE_NAME_CASE(BUFFER_LOAD_BYTE_TFE)
5541+
NODE_NAME_CASE(BUFFER_LOAD_SHORT_TFE)
55375542
NODE_NAME_CASE(BUFFER_LOAD_FORMAT)
55385543
NODE_NAME_CASE(BUFFER_LOAD_FORMAT_TFE)
55395544
NODE_NAME_CASE(BUFFER_LOAD_FORMAT_D16)

‎llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -583,6 +583,11 @@ enum NodeType : unsigned {
583583
BUFFER_LOAD_USHORT,
584584
BUFFER_LOAD_BYTE,
585585
BUFFER_LOAD_SHORT,
586+
BUFFER_LOAD_TFE,
587+
BUFFER_LOAD_UBYTE_TFE,
588+
BUFFER_LOAD_USHORT_TFE,
589+
BUFFER_LOAD_BYTE_TFE,
590+
BUFFER_LOAD_SHORT_TFE,
586591
BUFFER_LOAD_FORMAT,
587592
BUFFER_LOAD_FORMAT_TFE,
588593
BUFFER_LOAD_FORMAT_D16,

‎llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

Lines changed: 11 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -5870,17 +5870,18 @@ bool AMDGPULegalizerInfo::legalizeBufferLoad(MachineInstr &MI,
58705870
: AMDGPU::G_AMDGPU_BUFFER_LOAD_FORMAT;
58715871
}
58725872
} else {
5873-
if (IsTFE)
5874-
return false;
58755873
switch (MemTy.getSizeInBits()) {
58765874
case 8:
5877-
Opc = AMDGPU::G_AMDGPU_BUFFER_LOAD_UBYTE;
5875+
Opc = IsTFE ? AMDGPU::G_AMDGPU_BUFFER_LOAD_UBYTE_TFE
5876+
: AMDGPU::G_AMDGPU_BUFFER_LOAD_UBYTE;
58785877
break;
58795878
case 16:
5880-
Opc = AMDGPU::G_AMDGPU_BUFFER_LOAD_USHORT;
5879+
Opc = IsTFE ? AMDGPU::G_AMDGPU_BUFFER_LOAD_USHORT_TFE
5880+
: AMDGPU::G_AMDGPU_BUFFER_LOAD_USHORT;
58815881
break;
58825882
default:
5883-
Opc = AMDGPU::G_AMDGPU_BUFFER_LOAD;
5883+
Opc = IsTFE ? AMDGPU::G_AMDGPU_BUFFER_LOAD_TFE
5884+
: AMDGPU::G_AMDGPU_BUFFER_LOAD;
58845885
break;
58855886
}
58865887
}
@@ -5892,7 +5893,11 @@ bool AMDGPULegalizerInfo::legalizeBufferLoad(MachineInstr &MI,
58925893
Register LoadDstReg = B.getMRI()->createGenericVirtualRegister(LoadTy);
58935894
buildBufferLoad(Opc, LoadDstReg, RSrc, VIndex, VOffset, SOffset, ImmOffset,
58945895
Format, AuxiliaryData, MMO, IsTyped, HasVIndex, B);
5895-
if (NumValueDWords == 1) {
5896+
if (MemTy.getSizeInBits() < 32) {
5897+
Register ExtDst = B.getMRI()->createGenericVirtualRegister(S32);
5898+
B.buildUnmerge({ExtDst, StatusDst}, LoadDstReg);
5899+
B.buildTrunc(Dst, ExtDst);
5900+
} else if (NumValueDWords == 1) {
58965901
B.buildUnmerge({Dst, StatusDst}, LoadDstReg);
58975902
} else {
58985903
SmallVector<Register, 5> LoadElts;

‎llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3041,6 +3041,11 @@ void AMDGPURegisterBankInfo::applyMappingImpl(
30413041
case AMDGPU::G_AMDGPU_BUFFER_LOAD_SSHORT:
30423042
case AMDGPU::G_AMDGPU_BUFFER_LOAD_UBYTE:
30433043
case AMDGPU::G_AMDGPU_BUFFER_LOAD_SBYTE:
3044+
case AMDGPU::G_AMDGPU_BUFFER_LOAD_TFE:
3045+
case AMDGPU::G_AMDGPU_BUFFER_LOAD_USHORT_TFE:
3046+
case AMDGPU::G_AMDGPU_BUFFER_LOAD_SSHORT_TFE:
3047+
case AMDGPU::G_AMDGPU_BUFFER_LOAD_UBYTE_TFE:
3048+
case AMDGPU::G_AMDGPU_BUFFER_LOAD_SBYTE_TFE:
30443049
case AMDGPU::G_AMDGPU_BUFFER_LOAD_FORMAT:
30453050
case AMDGPU::G_AMDGPU_BUFFER_LOAD_FORMAT_TFE:
30463051
case AMDGPU::G_AMDGPU_BUFFER_LOAD_FORMAT_D16:
@@ -4323,6 +4328,11 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
43234328
case AMDGPU::G_AMDGPU_BUFFER_LOAD_SBYTE:
43244329
case AMDGPU::G_AMDGPU_BUFFER_LOAD_USHORT:
43254330
case AMDGPU::G_AMDGPU_BUFFER_LOAD_SSHORT:
4331+
case AMDGPU::G_AMDGPU_BUFFER_LOAD_TFE:
4332+
case AMDGPU::G_AMDGPU_BUFFER_LOAD_UBYTE_TFE:
4333+
case AMDGPU::G_AMDGPU_BUFFER_LOAD_SBYTE_TFE:
4334+
case AMDGPU::G_AMDGPU_BUFFER_LOAD_USHORT_TFE:
4335+
case AMDGPU::G_AMDGPU_BUFFER_LOAD_SSHORT_TFE:
43264336
case AMDGPU::G_AMDGPU_BUFFER_LOAD_FORMAT:
43274337
case AMDGPU::G_AMDGPU_BUFFER_LOAD_FORMAT_TFE:
43284338
case AMDGPU::G_AMDGPU_BUFFER_LOAD_FORMAT_D16:

‎llvm/lib/Target/AMDGPU/BUFInstructions.td

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1434,6 +1434,15 @@ defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_short, i32, "BUFFER_LOAD_SSHORT">;
14341434
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_ubyte, i32, "BUFFER_LOAD_UBYTE">;
14351435
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_ushort, i32, "BUFFER_LOAD_USHORT">;
14361436

1437+
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_tfe, v2i32, "BUFFER_LOAD_DWORD_TFE">;
1438+
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_tfe, v3i32, "BUFFER_LOAD_DWORDX2_TFE">;
1439+
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_tfe, v4i32, "BUFFER_LOAD_DWORDX3_TFE">;
1440+
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_tfe, v5i32, "BUFFER_LOAD_DWORDX4_TFE">;
1441+
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_byte_tfe, v2i32, "BUFFER_LOAD_SBYTE_TFE">;
1442+
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_short_tfe, v2i32, "BUFFER_LOAD_SSHORT_TFE">;
1443+
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_ubyte_tfe, v2i32, "BUFFER_LOAD_UBYTE_TFE">;
1444+
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_ushort_tfe, v2i32, "BUFFER_LOAD_USHORT_TFE">;
1445+
14371446
multiclass MUBUF_StoreIntrinsicPat_Common<SDPatternOperator name, ValueType vt,
14381447
string opcode, ValueType memoryVt = vt> {
14391448
defvar st = !if(!eq(memoryVt, vt), name, mubuf_intrinsic_store<name, memoryVt>);

‎llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 29 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -5999,24 +5999,19 @@ SDValue SITargetLowering::lowerIntrinsicLoad(MemSDNode *M, bool IsFormat,
59995999
assert(M->getNumValues() == 2 || M->getNumValues() == 3);
60006000
bool IsTFE = M->getNumValues() == 3;
60016001

6002-
unsigned Opc;
6003-
if (IsFormat) {
6004-
Opc = IsTFE ? AMDGPUISD::BUFFER_LOAD_FORMAT_TFE
6005-
: AMDGPUISD::BUFFER_LOAD_FORMAT;
6006-
} else {
6007-
// TODO: Support non-format TFE loads.
6008-
if (IsTFE)
6009-
return SDValue();
6010-
Opc = AMDGPUISD::BUFFER_LOAD;
6011-
}
6002+
unsigned Opc = IsFormat ? (IsTFE ? AMDGPUISD::BUFFER_LOAD_FORMAT_TFE
6003+
: AMDGPUISD::BUFFER_LOAD_FORMAT)
6004+
: IsTFE ? AMDGPUISD::BUFFER_LOAD_TFE
6005+
: AMDGPUISD::BUFFER_LOAD;
60126006

60136007
if (IsD16) {
60146008
return adjustLoadValueType(AMDGPUISD::BUFFER_LOAD_FORMAT_D16, M, DAG, Ops);
60156009
}
60166010

60176011
// Handle BUFFER_LOAD_BYTE/UBYTE/SHORT/USHORT overloaded intrinsics
60186012
if (!IsD16 && !LoadVT.isVector() && EltType.getSizeInBits() < 32)
6019-
return handleByteShortBufferLoads(DAG, LoadVT, DL, Ops, M->getMemOperand());
6013+
return handleByteShortBufferLoads(DAG, LoadVT, DL, Ops, M->getMemOperand(),
6014+
IsTFE);
60206015

60216016
if (isTypeLegal(LoadVT)) {
60226017
return getMemIntrinsicNode(Opc, DL, M->getVTList(), Ops, IntVT,
@@ -10232,11 +10227,30 @@ SDValue SITargetLowering::lowerPointerAsRsrcIntrin(SDNode *Op,
1023210227
}
1023310228

1023410229
// Handle 8 bit and 16 bit buffer loads
10235-
SDValue
10236-
SITargetLowering::handleByteShortBufferLoads(SelectionDAG &DAG, EVT LoadVT,
10237-
SDLoc DL, ArrayRef<SDValue> Ops,
10238-
MachineMemOperand *MMO) const {
10230+
SDValue SITargetLowering::handleByteShortBufferLoads(SelectionDAG &DAG,
10231+
EVT LoadVT, SDLoc DL,
10232+
ArrayRef<SDValue> Ops,
10233+
MachineMemOperand *MMO,
10234+
bool IsTFE) const {
1023910235
EVT IntVT = LoadVT.changeTypeToInteger();
10236+
10237+
if (IsTFE) {
10238+
unsigned Opc = (LoadVT.getScalarType() == MVT::i8)
10239+
? AMDGPUISD::BUFFER_LOAD_UBYTE_TFE
10240+
: AMDGPUISD::BUFFER_LOAD_USHORT_TFE;
10241+
MachineFunction &MF = DAG.getMachineFunction();
10242+
MachineMemOperand *OpMMO = MF.getMachineMemOperand(MMO, 0, 8);
10243+
SDVTList VTs = DAG.getVTList(MVT::v2i32, MVT::Other);
10244+
SDValue Op = getMemIntrinsicNode(Opc, DL, VTs, Ops, MVT::v2i32, OpMMO, DAG);
10245+
SDValue Status = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, Op,
10246+
DAG.getConstant(1, DL, MVT::i32));
10247+
SDValue Data = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, Op,
10248+
DAG.getConstant(0, DL, MVT::i32));
10249+
SDValue Trunc = DAG.getNode(ISD::TRUNCATE, DL, IntVT, Data);
10250+
SDValue Value = DAG.getNode(ISD::BITCAST, DL, LoadVT, Trunc);
10251+
return DAG.getMergeValues({Value, Status, SDValue(Op.getNode(), 1)}, DL);
10252+
}
10253+
1024010254
unsigned Opc = (LoadVT.getScalarType() == MVT::i8) ?
1024110255
AMDGPUISD::BUFFER_LOAD_UBYTE : AMDGPUISD::BUFFER_LOAD_USHORT;
1024210256

‎llvm/lib/Target/AMDGPU/SIISelLowering.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -275,7 +275,8 @@ class SITargetLowering final : public AMDGPUTargetLowering {
275275
// Handle 8 bit and 16 bit buffer loads
276276
SDValue handleByteShortBufferLoads(SelectionDAG &DAG, EVT LoadVT, SDLoc DL,
277277
ArrayRef<SDValue> Ops,
278-
MachineMemOperand *MMO) const;
278+
MachineMemOperand *MMO,
279+
bool IsTFE = false) const;
279280

280281
// Handle 8 bit and 16 bit buffer stores
281282
SDValue handleByteShortBufferStores(SelectionDAG &DAG, EVT VDataType,

‎llvm/lib/Target/AMDGPU/SIInstrInfo.td

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -148,6 +148,16 @@ def SIbuffer_load_byte : SDNode <"AMDGPUISD::BUFFER_LOAD_BYTE", SDTBufferLoad,
148148
[SDNPMemOperand, SDNPHasChain, SDNPMayLoad]>;
149149
def SIbuffer_load_short: SDNode <"AMDGPUISD::BUFFER_LOAD_SHORT", SDTBufferLoad,
150150
[SDNPMemOperand, SDNPHasChain, SDNPMayLoad]>;
151+
def SIbuffer_load_tfe : SDNode <"AMDGPUISD::BUFFER_LOAD_TFE", SDTBufferLoad,
152+
[SDNPMemOperand, SDNPHasChain, SDNPMayLoad]>;
153+
def SIbuffer_load_ubyte_tfe : SDNode <"AMDGPUISD::BUFFER_LOAD_UBYTE_TFE", SDTBufferLoad,
154+
[SDNPMemOperand, SDNPHasChain, SDNPMayLoad]>;
155+
def SIbuffer_load_ushort_tfe : SDNode <"AMDGPUISD::BUFFER_LOAD_USHORT_TFE", SDTBufferLoad,
156+
[SDNPMemOperand, SDNPHasChain, SDNPMayLoad]>;
157+
def SIbuffer_load_byte_tfe : SDNode <"AMDGPUISD::BUFFER_LOAD_BYTE_TFE", SDTBufferLoad,
158+
[SDNPMemOperand, SDNPHasChain, SDNPMayLoad]>;
159+
def SIbuffer_load_short_tfe: SDNode <"AMDGPUISD::BUFFER_LOAD_SHORT_TFE", SDTBufferLoad,
160+
[SDNPMemOperand, SDNPHasChain, SDNPMayLoad]>;
151161
def SIbuffer_load_format : SDNode <"AMDGPUISD::BUFFER_LOAD_FORMAT", SDTBufferLoad,
152162
[SDNPMemOperand, SDNPHasChain, SDNPMayLoad]>;
153163
def SIbuffer_load_format_tfe : SDNode <"AMDGPUISD::BUFFER_LOAD_FORMAT_TFE", SDTBufferLoad,

‎llvm/lib/Target/AMDGPU/SIInstructions.td

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3855,6 +3855,11 @@ def G_AMDGPU_BUFFER_LOAD_SBYTE : BufferLoadGenericInstruction;
38553855
def G_AMDGPU_BUFFER_LOAD_USHORT : BufferLoadGenericInstruction;
38563856
def G_AMDGPU_BUFFER_LOAD_SSHORT : BufferLoadGenericInstruction;
38573857
def G_AMDGPU_BUFFER_LOAD : BufferLoadGenericInstruction;
3858+
def G_AMDGPU_BUFFER_LOAD_UBYTE_TFE : BufferLoadGenericInstruction;
3859+
def G_AMDGPU_BUFFER_LOAD_SBYTE_TFE : BufferLoadGenericInstruction;
3860+
def G_AMDGPU_BUFFER_LOAD_USHORT_TFE : BufferLoadGenericInstruction;
3861+
def G_AMDGPU_BUFFER_LOAD_SSHORT_TFE : BufferLoadGenericInstruction;
3862+
def G_AMDGPU_BUFFER_LOAD_TFE : BufferLoadGenericInstruction;
38583863
def G_AMDGPU_BUFFER_LOAD_FORMAT : BufferLoadGenericInstruction;
38593864
def G_AMDGPU_BUFFER_LOAD_FORMAT_TFE : BufferLoadGenericInstruction;
38603865
def G_AMDGPU_BUFFER_LOAD_FORMAT_D16 : BufferLoadGenericInstruction;

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