Merged main:53d080c5b5df into amd-gfx:f0fbc982ed3b

Local branch amd-gfx f0fbc98 Merged main:93743ee56669 into amd-gfx:ab47d36e0ead
Remote branch main 53d080c [mlir][Arith] Remove `arith-to-llvm` from `func-to-llvm` (llvm#120548)

Author: SC llvm team

bolt/lib/Core/BinaryContext.cpp

@@ -1961,7 +1961,15 @@ void BinaryContext::printInstruction(raw_ostream &OS, const MCInst &Instruction,
     OS << "\tjit\t" << MIB->getTargetSymbol(Instruction)->getName()
        << " # ID: " << DynamicID;
   } else {
-    InstPrinter->printInst(&Instruction, 0, "", *STI, OS);
+    // If there are annotations on the instruction, the MCInstPrinter will fail
+    // to print the preferred alias as it only does so when the number of
+    // operands is as expected. See
+    // https://github.com/llvm/llvm-project/blob/782f1a0d895646c364a53f9dcdd6d4ec1f3e5ea0/llvm/lib/MC/MCInstPrinter.cpp#L142
+    // Therefore, create a temporary copy of the Inst from which the annotations
+    // are removed, and print that Inst.
+    MCInst InstNoAnnot = Instruction;
+    MIB->stripAnnotations(InstNoAnnot);
+    InstPrinter->printInst(&InstNoAnnot, 0, "", *STI, OS);
   }
   if (MIB->isCall(Instruction)) {
     if (MIB->isTailCall(Instruction))

bolt/test/RISCV/call-annotations.s

@@ -16,13 +16,13 @@ f:
 
 // CHECK-LABEL: Binary Function "_start" after building cfg {
 // CHECK:      auipc ra, f
-// CHECK-NEXT: jalr ra, -0x4(ra) # Offset: 4
-// CHECK-NEXT: jal ra, f # Offset: 8
-// CHECK-NEXT: jal zero, f # TAILCALL  # Offset: 12
+// CHECK-NEXT: jalr -0x4(ra) # Offset: 4
+// CHECK-NEXT: jal f # Offset: 8
+// CHECK-NEXT: j f # TAILCALL  # Offset: 12
 
 // CHECK-LABEL: Binary Function "long_tail" after building cfg {
 // CHECK:      auipc t1, f
-// CHECK-NEXT: jalr zero, -0x18(t1) # TAILCALL  # Offset: 8
+// CHECK-NEXT: jr -0x18(t1) # TAILCALL  # Offset: 8
 
 // CHECK-LABEL: Binary Function "compressed_tail" after building cfg {
 // CHECK:      jr a0 # TAILCALL  # Offset: 0

bolt/test/RISCV/relax.s

@@ -5,9 +5,9 @@
 // RUN: llvm-objdump -d %t.bolt | FileCheck --check-prefix=OBJDUMP %s
 
 // CHECK:      Binary Function "_start" after building cfg {
-// CHECK:      jal ra, near_f
+// CHECK:      jal near_f
 // CHECK-NEXT: auipc ra, far_f
-// CHECK-NEXT: jalr ra, 0xc(ra)
+// CHECK-NEXT: jalr 0xc(ra)
 // CHECK-NEXT: j near_f
 
 // CHECK:      Binary Function "_start" after fix-riscv-calls {

bolt/test/RISCV/reloc-branch.s

@@ -7,7 +7,7 @@
   .p2align 1
 // CHECK: Binary Function "_start" after building cfg {
 _start:
-// CHECK: beq zero, zero, .Ltmp0
+// CHECK: beqz zero, .Ltmp0
   beq zero, zero, 1f
   nop
 // CHECK: .Ltmp0

bolt/test/RISCV/reloc-jal.s

@@ -14,7 +14,7 @@ f:
   .globl _start
   .p2align 1
 _start:
-// CHECK: jal ra, f
+// CHECK: jal f
   jal ra, f
   ret
   .size _start, .-_start

clang/docs/ReleaseNotes.rst

@@ -706,6 +706,8 @@ Improvements to Clang's diagnostics
       return ptr + index < ptr; // warning
     }
 
+- Fix -Wdangling false positives on conditional operators (#120206).
+
 Improvements to Clang's time-trace
 ----------------------------------
 

clang/lib/Sema/CheckExprLifetime.cpp

@@ -582,6 +582,15 @@ static void visitFunctionCallArguments(IndirectLocalPath &Path, Expr *Call,
     //   Temp().ptr; // Here ptr might not dangle.
     if (isa<MemberExpr>(Arg->IgnoreImpCasts()))
       return;
+    // Avoid false positives when the object is constructed from a conditional
+    // operator argument. A common case is:
+    //   // 'ptr' might not be owned by the Owner object.
+    //   std::string_view s = cond() ? Owner().ptr : sv;
+    if (const auto *Cond =
+            dyn_cast<AbstractConditionalOperator>(Arg->IgnoreImpCasts());
+        Cond && isPointerLikeType(Cond->getType()))
+      return;
+
     auto ReturnType = Callee->getReturnType();
 
     // Once we initialized a value with a non gsl-owner reference, it can no

clang/test/Sema/warn-lifetime-analysis-nocfg.cpp

@@ -777,3 +777,32 @@ void test4() {
 }
 
 } // namespace LifetimeboundInterleave
+
+namespace GH120206 {
+struct S {
+  std::string_view s;
+};
+
+struct [[gsl::Owner]] Q1 {
+  const S* get() const [[clang::lifetimebound]];
+};
+std::string_view test1(int c, std::string_view sv) {
+  std::string_view k = c > 1 ? Q1().get()->s : sv;
+  if (c == 1)
+    return  c > 1 ? Q1().get()->s : sv;
+  Q1 q;
+  return c > 1 ? q.get()->s : sv;
+}
+
+struct Q2 {
+  const S* get() const [[clang::lifetimebound]];
+};
+std::string_view test2(int c, std::string_view sv) {
+  std::string_view k = c > 1 ? Q2().get()->s : sv;
+  if (c == 1)
+    return c > 1 ? Q2().get()->s : sv;
+  Q2 q;
+  return c > 1 ? q.get()->s : sv;
+}
+
+} // namespace GH120206

llvm/Maintainers.md

@@ -251,8 +251,8 @@ [email protected] (email), [asb](https://github.com/asb) (GitHub)
 
 #### Sparc backend
 
-Venkatraman Govindaraju \
-[email protected] (email), [vegovin](https://github.com/vegovin) (GitHub)
+Koakuma \
+[email protected] (email), [koachan](https://github.com/koachan) (GitHub)
 
 #### SPIRV backend
 
@@ -320,16 +320,11 @@ [email protected] (email), [echristo](https://github.com/echristo) (GitHub)
 Benjamin Kramer \
 [email protected] (email), [d0k](https://github.com/d0k) (GitHub)
 
-#### IR Linker
+#### IR Linker and LTO
 
 Teresa Johnson \
 [email protected] (email), [teresajohnson](https://github.com/teresajohnson) (GitHub)
 
-#### LTO
-
-Peter Collingbourne \
-[email protected] (email), [pcc](https://github.com/pcc) (GitHub)
-
 #### MCJIT, Orc, RuntimeDyld, PerfJITEvents
 
 Lang Hames \
@@ -456,9 +451,11 @@ [email protected] (email), [lattner](https://github.com/lattner) (GitHub), clattn
 Paul C. Anagnostopoulos ([email protected], [Paul-C-Anagnostopoulos](https://github.com/Paul-C-Anagnostopoulos)) -- TableGen \
 Justin Bogner ([email protected], [bogner](https://github.com/bogner)) -- SelectionDAG \
 Chandler Carruth ([email protected], [email protected], [chandlerc](https://github.com/chandlerc)) -- ADT, Support \
+Peter Collingbourne ([email protected], [pcc](https://github.com/pcc)) -- LTO \
 Evan Cheng ([email protected]) -- Parts of code generator not covered by someone else \
 Jake Ehrlich ([email protected], [jakehehrlich](https://github.com/jakehehrlich)) -- llvm-objcopy and ObjCopy library \
 Renato Golin ([email protected], [rengolin](https://github.com/rengolin)) -- ARM backend \
+Venkatraman Govindaraju ([email protected], [vegovin](https://github.com/vegovin) -- Sparc backend \
 James Grosbach ([email protected]) -- MC layer \
 Anton Korobeynikov ([email protected], [asl](https://github.com/asl)) -- ARM EABI \
 Chad Rosier ([email protected]) -- FastISel \

llvm/include/llvm/Config/llvm-config.h.cmake

@@ -16,7 +16,7 @@
 
 /* Indicate that this is LLVM compiled from the amd-gfx branch. */
 #define LLVM_HAVE_BRANCH_AMD_GFX
-#define LLVM_MAIN_REVISION 521731
+#define LLVM_MAIN_REVISION 522087
 
 /* Define if LLVM_ENABLE_DUMP is enabled */
 #cmakedefine LLVM_ENABLE_DUMP

llvm/lib/Target/ARM/ARMISelLowering.cpp

@@ -1113,12 +1113,15 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
   for (MVT VT : MVT::fp_valuetypes()) {
     setLoadExtAction(ISD::EXTLOAD, VT, MVT::f32, Expand);
     setLoadExtAction(ISD::EXTLOAD, VT, MVT::f16, Expand);
+    setLoadExtAction(ISD::EXTLOAD, VT, MVT::bf16, Expand);
   }
 
   // ... or truncating stores
   setTruncStoreAction(MVT::f64, MVT::f32, Expand);
   setTruncStoreAction(MVT::f32, MVT::f16, Expand);
   setTruncStoreAction(MVT::f64, MVT::f16, Expand);
+  setTruncStoreAction(MVT::f32, MVT::bf16, Expand);
+  setTruncStoreAction(MVT::f64, MVT::bf16, Expand);
 
   // ARM does not have i1 sign extending load.
   for (MVT VT : MVT::integer_valuetypes())

llvm/test/CodeGen/Thumb2/bf16-instructions.ll

@@ -220,6 +220,55 @@ define void @test_store(bfloat %a, ptr %b) {
   ret void
 }
 
+define void @test_truncstore32(float %a, ptr %b) {
+; CHECK-NOFP-LABEL: test_truncstore32:
+; CHECK-NOFP:       @ %bb.0:
+; CHECK-NOFP-NEXT:    .save {r4, lr}
+; CHECK-NOFP-NEXT:    push {r4, lr}
+; CHECK-NOFP-NEXT:    mov r4, r1
+; CHECK-NOFP-NEXT:    bl __truncsfbf2
+; CHECK-NOFP-NEXT:    strh r0, [r4]
+; CHECK-NOFP-NEXT:    pop {r4, pc}
+;
+; CHECK-FP-LABEL: test_truncstore32:
+; CHECK-FP:       @ %bb.0:
+; CHECK-FP-NEXT:    .save {r4, lr}
+; CHECK-FP-NEXT:    push {r4, lr}
+; CHECK-FP-NEXT:    mov r4, r0
+; CHECK-FP-NEXT:    bl __truncsfbf2
+; CHECK-FP-NEXT:    vmov r0, s0
+; CHECK-FP-NEXT:    strh r0, [r4]
+; CHECK-FP-NEXT:    pop {r4, pc}
+  %r = fptrunc float %a to bfloat
+  store bfloat %r, ptr %b
+  ret void
+}
+
+define void @test_truncstore64(double %a, ptr %b) {
+; CHECK-NOFP-LABEL: test_truncstore64:
+; CHECK-NOFP:       @ %bb.0:
+; CHECK-NOFP-NEXT:    .save {r4, lr}
+; CHECK-NOFP-NEXT:    push {r4, lr}
+; CHECK-NOFP-NEXT:    mov r4, r2
+; CHECK-NOFP-NEXT:    bl __truncdfbf2
+; CHECK-NOFP-NEXT:    strh r0, [r4]
+; CHECK-NOFP-NEXT:    pop {r4, pc}
+;
+; CHECK-FP-LABEL: test_truncstore64:
+; CHECK-FP:       @ %bb.0:
+; CHECK-FP-NEXT:    .save {r4, lr}
+; CHECK-FP-NEXT:    push {r4, lr}
+; CHECK-FP-NEXT:    mov r4, r0
+; CHECK-FP-NEXT:    vmov r0, r1, d0
+; CHECK-FP-NEXT:    bl __aeabi_d2f
+; CHECK-FP-NEXT:    lsrs r0, r0, #16
+; CHECK-FP-NEXT:    strh r0, [r4]
+; CHECK-FP-NEXT:    pop {r4, pc}
+  %r = fptrunc double %a to bfloat
+  store bfloat %r, ptr %b
+  ret void
+}
+
 define bfloat @test_load(ptr %a) {
 ; CHECK-NOFP-LABEL: test_load:
 ; CHECK-NOFP:       @ %bb.0:
@@ -235,6 +284,48 @@ define bfloat @test_load(ptr %a) {
   ret bfloat %r
 }
 
+define float @test_loadext32(ptr %a) {
+; CHECK-NOFP-LABEL: test_loadext32:
+; CHECK-NOFP:       @ %bb.0:
+; CHECK-NOFP-NEXT:    ldrh r0, [r0]
+; CHECK-NOFP-NEXT:    lsls r0, r0, #16
+; CHECK-NOFP-NEXT:    bx lr
+;
+; CHECK-FP-LABEL: test_loadext32:
+; CHECK-FP:       @ %bb.0:
+; CHECK-FP-NEXT:    ldrh r0, [r0]
+; CHECK-FP-NEXT:    lsls r0, r0, #16
+; CHECK-FP-NEXT:    vmov s0, r0
+; CHECK-FP-NEXT:    bx lr
+  %r = load bfloat, ptr %a
+  %d = fpext bfloat %r to float
+  ret float %d
+}
+
+define double @test_loadext64(ptr %a) {
+; CHECK-NOFP-LABEL: test_loadext64:
+; CHECK-NOFP:       @ %bb.0:
+; CHECK-NOFP-NEXT:    .save {r7, lr}
+; CHECK-NOFP-NEXT:    push {r7, lr}
+; CHECK-NOFP-NEXT:    ldrh r0, [r0]
+; CHECK-NOFP-NEXT:    lsls r0, r0, #16
+; CHECK-NOFP-NEXT:    bl __aeabi_f2d
+; CHECK-NOFP-NEXT:    pop {r7, pc}
+;
+; CHECK-FP-LABEL: test_loadext64:
+; CHECK-FP:       @ %bb.0:
+; CHECK-FP-NEXT:    .save {r7, lr}
+; CHECK-FP-NEXT:    push {r7, lr}
+; CHECK-FP-NEXT:    ldrh r0, [r0]
+; CHECK-FP-NEXT:    lsls r0, r0, #16
+; CHECK-FP-NEXT:    bl __aeabi_f2d
+; CHECK-FP-NEXT:    vmov d0, r0, r1
+; CHECK-FP-NEXT:    pop {r7, pc}
+  %r = load bfloat, ptr %a
+  %d = fpext bfloat %r to double
+  ret double %d
+}
+
 declare bfloat @test_callee(bfloat %a, bfloat %b)
 
 define bfloat @test_call(bfloat %a, bfloat %b) {
@@ -867,8 +958,8 @@ define void @test_fccmp(bfloat %in, ptr %out) {
 ; CHECK-FP-LABEL: test_fccmp:
 ; CHECK-FP:       @ %bb.0:
 ; CHECK-FP-NEXT:    vmov r1, s0
-; CHECK-FP-NEXT:    vldr s0, .LCPI30_0
-; CHECK-FP-NEXT:    vldr s4, .LCPI30_1
+; CHECK-FP-NEXT:    vldr s0, .LCPI34_0
+; CHECK-FP-NEXT:    vldr s4, .LCPI34_1
 ; CHECK-FP-NEXT:    lsls r2, r1, #16
 ; CHECK-FP-NEXT:    vmov s2, r2
 ; CHECK-FP-NEXT:    mov.w r2, #17664
@@ -882,9 +973,9 @@ define void @test_fccmp(bfloat %in, ptr %out) {
 ; CHECK-FP-NEXT:    bx lr
 ; CHECK-FP-NEXT:    .p2align 2
 ; CHECK-FP-NEXT:  @ %bb.1:
-; CHECK-FP-NEXT:  .LCPI30_0:
+; CHECK-FP-NEXT:  .LCPI34_0:
 ; CHECK-FP-NEXT:    .long 0x45000000 @ float 2048
-; CHECK-FP-NEXT:  .LCPI30_1:
+; CHECK-FP-NEXT:  .LCPI34_1:
 ; CHECK-FP-NEXT:    .long 0x48000000 @ float 131072
   %cmp1 = fcmp ogt bfloat %in, 0xR4800
   %cmp2 = fcmp olt bfloat %in, 0xR4500
@@ -941,14 +1032,14 @@ define bfloat @test_phi(ptr %p1) {
 ; CHECK-NOFP-NEXT:    push {r4, r5, r6, lr}
 ; CHECK-NOFP-NEXT:    ldrh r6, [r0]
 ; CHECK-NOFP-NEXT:    mov r4, r0
-; CHECK-NOFP-NEXT:  .LBB32_1: @ %loop
+; CHECK-NOFP-NEXT:  .LBB36_1: @ %loop
 ; CHECK-NOFP-NEXT:    @ =>This Inner Loop Header: Depth=1
 ; CHECK-NOFP-NEXT:    mov r0, r4
 ; CHECK-NOFP-NEXT:    mov r5, r6
 ; CHECK-NOFP-NEXT:    ldrh r6, [r4]
 ; CHECK-NOFP-NEXT:    bl test_dummy
 ; CHECK-NOFP-NEXT:    lsls r0, r0, #31
-; CHECK-NOFP-NEXT:    bne .LBB32_1
+; CHECK-NOFP-NEXT:    bne .LBB36_1
 ; CHECK-NOFP-NEXT:  @ %bb.2: @ %return
 ; CHECK-NOFP-NEXT:    mov r0, r5
 ; CHECK-NOFP-NEXT:    pop {r4, r5, r6, pc}
@@ -962,15 +1053,15 @@ define bfloat @test_phi(ptr %p1) {
 ; CHECK-FP-NEXT:    mov r4, r0
 ; CHECK-FP-NEXT:    ldrh r0, [r0]
 ; CHECK-FP-NEXT:    vmov s18, r0
-; CHECK-FP-NEXT:  .LBB32_1: @ %loop
+; CHECK-FP-NEXT:  .LBB36_1: @ %loop
 ; CHECK-FP-NEXT:    @ =>This Inner Loop Header: Depth=1
 ; CHECK-FP-NEXT:    ldrh r0, [r4]
 ; CHECK-FP-NEXT:    vmov.f32 s16, s18
 ; CHECK-FP-NEXT:    vmov s18, r0
 ; CHECK-FP-NEXT:    mov r0, r4
 ; CHECK-FP-NEXT:    bl test_dummy
 ; CHECK-FP-NEXT:    lsls r0, r0, #31
-; CHECK-FP-NEXT:    bne .LBB32_1
+; CHECK-FP-NEXT:    bne .LBB36_1
 ; CHECK-FP-NEXT:  @ %bb.2: @ %return
 ; CHECK-FP-NEXT:    vmov.f32 s0, s16
 ; CHECK-FP-NEXT:    vpop {d8, d9}

mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp

@@ -787,7 +787,6 @@ struct ConvertFuncToLLVMPass
 
     // TODO(https://github.com/llvm/llvm-project/issues/70982): Remove these in
     // favor of their dedicated conversion passes.
-    arith::populateArithToLLVMConversionPatterns(typeConverter, patterns);
     cf::populateControlFlowToLLVMConversionPatterns(typeConverter, patterns);
 
     LLVMConversionTarget target(getContext());

mlir/lib/Dialect/SCF/Utils/Utils.cpp

@@ -130,7 +130,7 @@ FailureOr<func::FuncOp> mlir::outlineSingleBlockRegion(RewriterBase &rewriter,
 
   // Outline before current function.
   OpBuilder::InsertionGuard g(rewriter);
-  rewriter.setInsertionPoint(region.getParentOfType<func::FuncOp>());
+  rewriter.setInsertionPoint(region.getParentOfType<FunctionOpInterface>());
 
   SetVector<Value> captures;
   getUsedValuesDefinedAbove(region, captures);

mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir

@@ -1,4 +1,4 @@
-// RUN: mlir-opt -convert-vector-to-llvm="enable-arm-sve" -convert-func-to-llvm -cse -reconcile-unrealized-casts -split-input-file %s | FileCheck %s
+// RUN: mlir-opt -convert-vector-to-llvm="enable-arm-sve" -convert-func-to-llvm -convert-arith-to-llvm -cse -reconcile-unrealized-casts -split-input-file %s | FileCheck %s
 
 func.func @arm_sve_sdot(%a: vector<[16]xi8>,
                    %b: vector<[16]xi8>,