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[GISel][RISCV] Fix several boundary cases in narrow G_SEXT_INREG. (llvm#72719)
This fixes cases when SizeInBits is a multiple of the narrow size. If SizeBits is equal to NarrowTy size, the first block would create an illegal G_SEXT_INREG where the the extension size is equal to the type. I tried to turn it into G_TRUNC+G_SEXT, but that just turned back into G_SEXT_INREG causing an infinite loop. So punt to the splitting case. In the for loop we should copy when the part ends on SizeInBits. In that case there is no G_SEXT_INREG needed for partial. But we should note that register in PartialExtensionReg for the first full part to use. If the part starts on SizeInBits then we should do an AShr of PartialExtensionReg. We should only get to the G_SEXT_INREG case if the SizeInBits is in the middle of the part.
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-23
lines changed

3 files changed

+18
-23
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llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1445,7 +1445,7 @@ LegalizerHelper::LegalizeResult LegalizerHelper::narrowScalar(MachineInstr &MI,
14451445

14461446
// So long as the new type has more bits than the bits we're extending we
14471447
// don't need to break it apart.
1448-
if (NarrowTy.getScalarSizeInBits() >= SizeInBits) {
1448+
if (NarrowTy.getScalarSizeInBits() > SizeInBits) {
14491449
Observer.changingInstr(MI);
14501450
// We don't lose any non-extension bits by truncating the src and
14511451
// sign-extending the dst.
@@ -1488,14 +1488,15 @@ LegalizerHelper::LegalizeResult LegalizerHelper::narrowScalar(MachineInstr &MI,
14881488
Register AshrCstReg =
14891489
MIRBuilder.buildConstant(NarrowTy, NarrowTy.getScalarSizeInBits() - 1)
14901490
.getReg(0);
1491-
Register FullExtensionReg = 0;
1492-
Register PartialExtensionReg = 0;
1491+
Register FullExtensionReg;
1492+
Register PartialExtensionReg;
14931493

14941494
// Do the operation on each small part.
14951495
for (int i = 0; i < NumParts; ++i) {
1496-
if ((i + 1) * NarrowTy.getScalarSizeInBits() < SizeInBits)
1496+
if ((i + 1) * NarrowTy.getScalarSizeInBits() <= SizeInBits) {
14971497
DstRegs.push_back(SrcRegs[i]);
1498-
else if (i * NarrowTy.getScalarSizeInBits() > SizeInBits) {
1498+
PartialExtensionReg = DstRegs.back();
1499+
} else if (i * NarrowTy.getScalarSizeInBits() >= SizeInBits) {
14991500
assert(PartialExtensionReg &&
15001501
"Expected to visit partial extension before full");
15011502
if (FullExtensionReg) {

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv32.mir

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -168,16 +168,13 @@ body: |
168168
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
169169
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $x10
170170
; LIBCALL-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $x11
171-
; LIBCALL-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
172-
; LIBCALL-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[C2]](s32)
173-
; LIBCALL-NEXT: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C2]](s32)
174-
; LIBCALL-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
175-
; LIBCALL-NEXT: [[ASHR3:%[0-9]+]]:_(s32) = G_ASHR [[ASHR2]], [[C3]](s32)
176-
; LIBCALL-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
177-
; LIBCALL-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[ASHR2]]
178-
; LIBCALL-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[COPY3]], [[ASHR3]]
171+
; LIBCALL-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
172+
; LIBCALL-NEXT: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[COPY2]], [[C2]](s32)
173+
; LIBCALL-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
174+
; LIBCALL-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY2]]
175+
; LIBCALL-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[COPY3]], [[ASHR2]]
179176
; LIBCALL-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[XOR]], [[XOR1]]
180-
; LIBCALL-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[OR]](s32), [[C4]]
177+
; LIBCALL-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[OR]](s32), [[C3]]
181178
; LIBCALL-NEXT: $x10 = COPY [[COPY2]](s32)
182179
; LIBCALL-NEXT: $x11 = COPY [[ICMP]](s32)
183180
; LIBCALL-NEXT: PseudoRET implicit $x10, implicit $x11

llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv64.mir

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -218,16 +218,13 @@ body: |
218218
; LIBCALL-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $x2, implicit $x2
219219
; LIBCALL-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x10
220220
; LIBCALL-NEXT: [[COPY3:%[0-9]+]]:_(s64) = COPY $x11
221-
; LIBCALL-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
222-
; LIBCALL-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY2]], [[C2]](s64)
223-
; LIBCALL-NEXT: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[SHL]], [[C2]](s64)
224-
; LIBCALL-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 63
225-
; LIBCALL-NEXT: [[ASHR3:%[0-9]+]]:_(s64) = G_ASHR [[ASHR2]], [[C3]](s64)
226-
; LIBCALL-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
227-
; LIBCALL-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY2]], [[ASHR2]]
228-
; LIBCALL-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[COPY3]], [[ASHR3]]
221+
; LIBCALL-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 63
222+
; LIBCALL-NEXT: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR [[COPY2]], [[C2]](s64)
223+
; LIBCALL-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
224+
; LIBCALL-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[COPY2]], [[COPY2]]
225+
; LIBCALL-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[COPY3]], [[ASHR2]]
229226
; LIBCALL-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]
230-
; LIBCALL-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ne), [[OR]](s64), [[C4]]
227+
; LIBCALL-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ne), [[OR]](s64), [[C3]]
231228
; LIBCALL-NEXT: $x10 = COPY [[COPY2]](s64)
232229
; LIBCALL-NEXT: $x11 = COPY [[ICMP]](s64)
233230
; LIBCALL-NEXT: PseudoRET implicit $x10, implicit $x11

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