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[llvm] Remove undef from some llvm/test/Transforms tests (llvm#125460)
This PR replaces some instances of `undef` with function argument value or poison or concrete values in several tests under `llvm/test/Transforms/` directory.
1 parent c475356 commit 951ba3e

18 files changed

+52
-52
lines changed

‎llvm/test/CodeGen/AArch64/aarch64-address-type-promotion-assertion.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
; PR20188: don't crash when merging sexts.
33

44
; CHECK: foo:
5-
define void @foo() unnamed_addr align 2 {
5+
define void @foo(i1 %arg) unnamed_addr align 2 {
66
entry:
77
br label %invoke.cont145
88

@@ -12,7 +12,7 @@ invoke.cont145:
1212

1313
if.then274:
1414
%0 = load i32, ptr null, align 4
15-
br i1 undef, label %invoke.cont291, label %if.else313
15+
br i1 %arg, label %invoke.cont291, label %if.else313
1616

1717
invoke.cont291:
1818
%idxprom.i.i.i605 = sext i32 %0 to i64
@@ -26,7 +26,7 @@ if.else313:
2626
br i1 %cmp314, label %invoke.cont317, label %invoke.cont353
2727

2828
invoke.cont317:
29-
br i1 undef, label %invoke.cont326, label %invoke.cont334
29+
br i1 %arg, label %invoke.cont326, label %invoke.cont334
3030

3131
invoke.cont326:
3232
%idxprom.i.i.i587 = sext i32 %0 to i64
@@ -36,7 +36,7 @@ invoke.cont326:
3636

3737
invoke.cont334:
3838
%lo.1 = phi double [ %sub329, %invoke.cont326 ], [ undef, %invoke.cont317 ]
39-
br i1 undef, label %invoke.cont342, label %if.end356
39+
br i1 %arg, label %invoke.cont342, label %if.end356
4040

4141
invoke.cont342:
4242
%idxprom.i.i.i578 = sext i32 %0 to i64

‎llvm/test/CodeGen/AArch64/arm64-2011-03-09-CPSRSpill.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3,15 +3,15 @@
33
; Can't copy or spill / restore CPSR.
44
; rdar://9105206
55

6-
define fastcc void @t() ssp align 2 {
6+
define fastcc void @t(i1 %arg) ssp align 2 {
77
entry:
8-
br i1 undef, label %bb3.i, label %bb2.i
8+
br i1 %arg, label %bb3.i, label %bb2.i
99

1010
bb2.i: ; preds = %entry
1111
br label %bb3.i
1212

1313
bb3.i: ; preds = %bb2.i, %entry
14-
br i1 undef, label %_ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71, label %bb.i69
14+
br i1 %arg, label %_ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71, label %bb.i69
1515

1616
bb.i69: ; preds = %bb3.i
1717
br label %_ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71
@@ -22,10 +22,10 @@ _ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71: ; preds = %bb.i69,
2222
%2 = fcmp ult float %1, 0xBF847AE140000000
2323
%storemerge9 = select i1 %2, float %1, float 0.000000e+00
2424
store float %storemerge9, ptr undef, align 4
25-
br i1 undef, label %bb42, label %bb47
25+
br i1 %arg, label %bb42, label %bb47
2626

2727
bb42: ; preds = %_ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71
28-
br i1 undef, label %bb46, label %bb53
28+
br i1 %arg, label %bb46, label %bb53
2929

3030
bb46: ; preds = %bb42
3131
br label %bb48
@@ -34,7 +34,7 @@ bb47: ; preds = %_ZN12gjkepa2_impl3E
3434
br label %bb48
3535

3636
bb48: ; preds = %bb47, %bb46
37-
br i1 undef, label %bb1.i14, label %bb.i13
37+
br i1 %arg, label %bb1.i14, label %bb.i13
3838

3939
bb.i13: ; preds = %bb48
4040
br label %bb1.i14

‎llvm/test/CodeGen/AArch64/arm64-2011-03-17-AsmPrinterCrash.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5,10 +5,10 @@
55
source_filename = "test/CodeGen/AArch64/arm64-2011-03-17-AsmPrinterCrash.ll"
66

77
; Function Attrs: nounwind ssp
8-
define void @drt_vsprintf() #0 {
8+
define void @drt_vsprintf(i1 %arg) #0 {
99
entry:
1010
%do_tab_convert = alloca i32, align 4
11-
br i1 undef, label %if.then24, label %if.else295, !dbg !11
11+
br i1 %arg, label %if.then24, label %if.else295, !dbg !11
1212

1313
if.then24: ; preds = %entry
1414
unreachable

‎llvm/test/CodeGen/AArch64/arm64-2011-04-21-CPSRBug.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
; CPSR is not allocatable so fast allocatable wouldn't mark them killed.
44
; rdar://9313272
55

6-
define hidden void @t() nounwind {
6+
define hidden void @t(i1 %arg) nounwind {
77
entry:
88
%cmp = icmp eq ptr null, undef
99
%frombool = zext i1 %cmp to i8
@@ -16,7 +16,7 @@ land.lhs.true: ; preds = %entry
1616
unreachable
1717

1818
if.end: ; preds = %entry
19-
br i1 undef, label %land.lhs.true14, label %if.end33
19+
br i1 %arg, label %land.lhs.true14, label %if.end33
2020

2121
land.lhs.true14: ; preds = %if.end
2222
unreachable

‎llvm/test/CodeGen/AArch64/arm64-2012-01-11-ComparisonDAGCrash.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -5,20 +5,20 @@
55
; cycles in DAGs, and eventually crashes. This is the testcase for
66
; one of those crashes. (rdar://10653656)
77

8-
define void @test(i1 zeroext %IsArrow) nounwind ssp align 2 {
8+
define void @test(i1 zeroext %IsArrow, i1 %arg) nounwind ssp align 2 {
99
entry:
10-
br i1 undef, label %return, label %lor.lhs.false
10+
br i1 %arg, label %return, label %lor.lhs.false
1111

1212
lor.lhs.false:
13-
br i1 undef, label %return, label %if.end
13+
br i1 %arg, label %return, label %if.end
1414

1515
if.end:
1616
%tmp.i = load i64, ptr undef, align 8
1717
%and.i.i.i = and i64 %tmp.i, -16
1818
br i1 %IsArrow, label %if.else_crit_edge, label %if.end32
1919

2020
if.else_crit_edge:
21-
br i1 undef, label %if.end32, label %return
21+
br i1 %arg, label %if.end32, label %return
2222

2323
if.end32:
2424
%0 = icmp ult i32 undef, 3
@@ -27,7 +27,7 @@ if.end32:
2727
%.pn = shl i320 %1, %.pn.v
2828
%ins346392 = or i320 %.pn, 0
2929
store i320 %ins346392, ptr undef, align 8
30-
br i1 undef, label %sw.bb.i.i, label %exit
30+
br i1 %arg, label %sw.bb.i.i, label %exit
3131

3232
sw.bb.i.i:
3333
unreachable

‎llvm/test/CodeGen/AArch64/arm64-2012-07-11-InstrEmitterBug.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -15,18 +15,18 @@ declare ptr @__strcat_chk(ptr, ptr, i64) nounwind optsize
1515

1616
declare noalias ptr @xstrdup(ptr) optsize
1717

18-
define ptr @dyld_fix_path(ptr %path) nounwind optsize ssp {
18+
define ptr @dyld_fix_path(ptr %path, i1 %arg) nounwind optsize ssp {
1919
entry:
20-
br i1 undef, label %if.end56, label %for.cond
20+
br i1 %arg, label %if.end56, label %for.cond
2121

2222
for.cond: ; preds = %entry
23-
br i1 undef, label %for.cond10, label %for.body
23+
br i1 %arg, label %for.cond10, label %for.body
2424

2525
for.body: ; preds = %for.cond
2626
unreachable
2727

2828
for.cond10: ; preds = %for.cond
29-
br i1 undef, label %if.end56, label %for.body14
29+
br i1 %arg, label %if.end56, label %for.body14
3030

3131
for.body14: ; preds = %for.cond10
3232
%call22 = tail call i64 @strlen(ptr undef) nounwind optsize
@@ -38,7 +38,7 @@ for.body14: ; preds = %for.cond10
3838
%sext59 = add i64 %add31, 4294967296
3939
%conv33 = ashr exact i64 %sext59, 32
4040
%call34 = tail call noalias ptr @xmalloc(i64 %conv33) nounwind optsize
41-
br i1 undef, label %cond.false45, label %cond.true43
41+
br i1 %arg, label %cond.false45, label %cond.true43
4242

4343
cond.true43: ; preds = %for.body14
4444
unreachable

‎llvm/test/CodeGen/AArch64/arm64-2013-01-23-frem-crash.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,14 +1,14 @@
11
; RUN: llc < %s -mtriple=arm64-eabi
22
; Make sure we are not crashing on this test.
33

4-
define void @autogen_SD13158() {
4+
define void @autogen_SD13158(i1 %arg) {
55
entry:
6-
%B26 = frem float 0.000000e+00, undef
7-
br i1 undef, label %CF, label %CF77
6+
%B26 = frem float 0.000000e+00, poison
7+
br i1 %arg, label %CF, label %CF77
88

99
CF: ; preds = %CF, %CF76
10-
store float %B26, ptr undef
11-
br i1 undef, label %CF, label %CF77
10+
store float %B26, ptr poison
11+
br i1 %arg, label %CF, label %CF77
1212

1313
CF77: ; preds = %CF
1414
ret void

‎llvm/test/CodeGen/AArch64/arm64-2013-01-23-sext-crash.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,27 +2,27 @@
22

33
; Make sure we are not crashing on this test.
44

5-
define void @autogen_SD12881() {
5+
define void @autogen_SD12881(i1 %arg) {
66
BB:
77
%B17 = ashr <4 x i32> zeroinitializer, zeroinitializer
88
br label %CF
99

1010
CF: ; preds = %CF83, %CF, %BB
11-
br i1 undef, label %CF, label %CF83
11+
br i1 %arg, label %CF, label %CF83
1212

1313
CF83: ; preds = %CF
1414
%FC70 = sitofp <4 x i32> %B17 to <4 x double>
1515
br label %CF
1616
}
1717

1818

19-
define void @autogen_SD12881_2() {
19+
define void @autogen_SD12881_2(i1 %arg) {
2020
BB:
2121
%B17 = ashr <4 x i32> zeroinitializer, zeroinitializer
2222
br label %CF
2323

2424
CF: ; preds = %CF83, %CF, %BB
25-
br i1 undef, label %CF, label %CF83
25+
br i1 %arg, label %CF, label %CF83
2626

2727
CF83: ; preds = %CF
2828
%FC70 = uitofp <4 x i32> %B17 to <4 x double>

‎llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1032,7 +1032,7 @@ define void @sameOperandBFI(i64 %src, i64 %src2, ptr %ptr) {
10321032
; OPT-NEXT: entry:
10331033
; OPT-NEXT: [[SHR47:%.*]] = lshr i64 [[SRC:%.*]], 47
10341034
; OPT-NEXT: [[SRC2_TRUNC:%.*]] = trunc i64 [[SRC2:%.*]] to i32
1035-
; OPT-NEXT: br i1 undef, label [[END:%.*]], label [[IF_ELSE:%.*]]
1035+
; OPT-NEXT: br i1 poison, label [[END:%.*]], label [[IF_ELSE:%.*]]
10361036
; OPT: if.else:
10371037
; OPT-NEXT: [[AND3:%.*]] = and i32 [[SRC2_TRUNC]], 3
10381038
; OPT-NEXT: [[SHL2:%.*]] = shl nuw nsw i64 [[SHR47]], 2
@@ -1050,7 +1050,7 @@ define void @sameOperandBFI(i64 %src, i64 %src2, ptr %ptr) {
10501050
entry:
10511051
%shr47 = lshr i64 %src, 47
10521052
%src2.trunc = trunc i64 %src2 to i32
1053-
br i1 undef, label %end, label %if.else
1053+
br i1 poison, label %end, label %if.else
10541054

10551055
if.else:
10561056
%and3 = and i32 %src2.trunc, 3

‎llvm/test/CodeGen/AArch64/arm64-call-tailcalls.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -36,12 +36,12 @@ define float @t5(float %a) nounwind readonly ssp {
3636
ret float %tmp
3737
}
3838

39-
define void @t7() nounwind {
39+
define void @t7(i1 %arg) nounwind {
4040
; CHECK-LABEL: t7:
4141
; CHECK: b _foo
4242
; CHECK: b _bar
4343

44-
br i1 undef, label %bb, label %bb1.lr.ph
44+
br i1 %arg, label %bb, label %bb1.lr.ph
4545

4646
bb1.lr.ph: ; preds = %entry
4747
tail call void @bar() nounwind

‎llvm/test/CodeGen/AArch64/arm64-collect-loh.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -662,9 +662,9 @@ define void @uninterestingSub(ptr nocapture %row) #0 {
662662
@.str.89 = external unnamed_addr constant [12 x i8], align 1
663663
@.str.90 = external unnamed_addr constant [5 x i8], align 1
664664
; CHECK-LABEL: test_r274582
665-
define void @test_r274582(double %x) {
665+
define void @test_r274582(double %x, i1 %arg) {
666666
entry:
667-
br i1 undef, label %if.then.i, label %if.end.i
667+
br i1 %arg, label %if.then.i, label %if.end.i
668668
if.then.i:
669669
ret void
670670
if.end.i:

‎llvm/test/CodeGen/AArch64/arm64-dead-register-def-bug.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,14 +8,14 @@
88
;
99
; <rdar://problem/16492408>
1010

11-
define void @testcase() {
11+
define void @testcase(i1 %arg) {
1212
; CHECK: testcase:
1313
; CHECK-NOT: orr xzr, xzr, #0x2
1414

1515
bb1:
1616
%tmp1 = tail call float @ceilf(float 2.000000e+00)
1717
%tmp2 = fptoui float %tmp1 to i64
18-
br i1 undef, label %bb2, label %bb3
18+
br i1 %arg, label %bb2, label %bb3
1919

2020
bb2:
2121
tail call void @foo()

‎llvm/test/CodeGen/AArch64/arm64-fast-isel.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -118,14 +118,14 @@ entry:
118118

119119
declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64)
120120

121-
define void @logicalReg() {
121+
define void @logicalReg(i1 %arg) {
122122
; Make sure we generate a logical reg = reg, reg instruction without any
123123
; machine verifier errors.
124124
; CHECK-LABEL: logicalReg:
125125
; CHECK: orr w{{[0-9]+}}, w{{[0-9]+}}, w{{[0-9]+}}
126126
; CHECK: ret
127127
entry:
128-
br i1 undef, label %cond.end, label %cond.false
128+
br i1 %arg, label %cond.end, label %cond.false
129129

130130
cond.false:
131131
%cond = select i1 undef, i1 true, i1 false

‎llvm/test/Transforms/AlignmentFromAssumptions/start-unk.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -74,17 +74,17 @@ if.end123: ; preds = %for.end
7474
br i1 %arg, label %if.end150, label %if.then126
7575

7676
if.then126: ; preds = %if.end123
77-
%ptrint.i.i185 = ptrtoint ptr undef to i64
77+
%ptrint.i.i185 = ptrtoint ptr poison to i64
7878
%maskedptr.i.i186 = and i64 %ptrint.i.i185, 1
7979
%maskcond.i.i187 = icmp eq i64 %maskedptr.i.i186, 0
8080
tail call void @llvm.assume(i1 %maskcond.i.i187) #0
81-
%ret.0.copyload.i.i189 = load i32, ptr undef, align 2
81+
%ret.0.copyload.i.i189 = load i32, ptr poison, align 2
8282

8383
; CHECK: load {{.*}} align 2
8484

8585
%0 = tail call i32 @llvm.bswap.i32(i32 %ret.0.copyload.i.i189) #0
8686
%conv131 = zext i32 %0 to i64
87-
%add.ptr132 = getelementptr inbounds i8, ptr undef, i64 %conv131
87+
%add.ptr132 = getelementptr inbounds i8, ptr poison, i64 %conv131
8888
br i1 %arg, label %if.end150, label %if.end.i173
8989

9090
if.end.i173: ; preds = %if.then126

‎llvm/test/Transforms/ArgumentPromotion/fp80.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ target triple = "x86_64-unknown-linux-gnu"
77
%union.u = type { x86_fp80 }
88
%struct.s = type { double, i16, i8, [5 x i8] }
99

10-
@b = internal global %struct.s { double 3.14, i16 9439, i8 25, [5 x i8] undef }, align 16
10+
@b = internal global %struct.s { double 3.14, i16 9439, i8 25, [5 x i8] poison }, align 16
1111

1212
%struct.Foo = type { i32, i64 }
1313
@a = internal global %struct.Foo { i32 1, i64 2 }, align 8

‎llvm/test/Transforms/ArgumentPromotion/musttail.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -52,15 +52,15 @@ define internal i32 @test2(ptr %p, i32 %p2) {
5252
; CHECK-NEXT: [[A:%.*]] = load i32, ptr [[A_GEP]], align 4
5353
; CHECK-NEXT: [[B:%.*]] = load i32, ptr [[B_GEP]], align 4
5454
; CHECK-NEXT: [[V:%.*]] = add i32 [[A]], [[B]]
55-
; CHECK-NEXT: [[CA:%.*]] = musttail call i32 @foo(ptr undef, i32 [[V]])
55+
; CHECK-NEXT: [[CA:%.*]] = musttail call i32 @foo(ptr poison, i32 [[V]])
5656
; CHECK-NEXT: ret i32 [[CA]]
5757
;
5858
%a.gep = getelementptr %T, ptr %p, i64 0, i32 3
5959
%b.gep = getelementptr %T, ptr %p, i64 0, i32 2
6060
%a = load i32, ptr %a.gep
6161
%b = load i32, ptr %b.gep
6262
%v = add i32 %a, %b
63-
%ca = musttail call i32 @foo(ptr undef, i32 %v)
63+
%ca = musttail call i32 @foo(ptr poison, i32 %v)
6464
ret i32 %ca
6565
}
6666

‎llvm/test/Transforms/ArgumentPromotion/variadic.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,11 +18,11 @@ define i32 @main(i32 %argc, ptr nocapture readnone %argv) #0 {
1818
; CHECK-LABEL: define {{[^@]+}}@main
1919
; CHECK-SAME: (i32 [[ARGC:%.*]], ptr readnone captures(none) [[ARGV:%.*]]) {
2020
; CHECK-NEXT: entry:
21-
; CHECK-NEXT: tail call void (ptr, ptr, ptr, ptr, ptr, ...) @callee_t0f(ptr undef, ptr undef, ptr undef, ptr undef, ptr undef, ptr byval([[STRUCT_TT0:%.*]]) align 8 @t45)
21+
; CHECK-NEXT: tail call void (ptr, ptr, ptr, ptr, ptr, ...) @callee_t0f(ptr poison, ptr poison, ptr poison, ptr poison, ptr poison, ptr byval([[STRUCT_TT0:%.*]]) align 8 @t45)
2222
; CHECK-NEXT: ret i32 0
2323
;
2424
entry:
25-
tail call void (ptr, ptr, ptr, ptr, ptr, ...) @callee_t0f(ptr undef, ptr undef, ptr undef, ptr undef, ptr undef, ptr byval(%struct.tt0) align 8 @t45)
25+
tail call void (ptr, ptr, ptr, ptr, ptr, ...) @callee_t0f(ptr poison, ptr poison, ptr poison, ptr poison, ptr poison, ptr byval(%struct.tt0) align 8 @t45)
2626
ret i32 0
2727
}
2828

‎llvm/test/Transforms/Attributor/nonnull.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -212,7 +212,7 @@ entry:
212212
br label %loop
213213
loop:
214214
%phi = phi ptr [%ret, %entry], [%phi, %loop]
215-
br i1 undef, label %loop, label %exit
215+
br i1 poison, label %loop, label %exit
216216
exit:
217217
ret ptr %phi
218218
}

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