Skip to content

Commit b08a105

Browse files
SC llvm teamSC llvm team
SC llvm team
authored and
SC llvm team
committed
Merged main:e62d25e37d3f into amd-gfx:2baaf7c285fe
Local branch amd-gfx 2baaf7c Merged main:a6dabed3483c into amd-gfx:adee0826382f Remote branch main e62d25e RegisterCoalescer: Relax assert for super register def rematerialization (llvm#69088)
2 parents 2baaf7c + e62d25e commit b08a105

File tree

12 files changed

+648
-312
lines changed

12 files changed

+648
-312
lines changed

‎clang/lib/Driver/ToolChains/Clang.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5743,9 +5743,9 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
57435743
} else if (Triple.getArch() == llvm::Triple::x86_64) {
57445744
Ok = llvm::is_contained({"small", "kernel", "medium", "large", "tiny"},
57455745
CM);
5746-
} else if (Triple.isNVPTX()) {
5747-
// NVPTX does not care about the code model and will accept whatever works
5748-
// for the host.
5746+
} else if (Triple.isNVPTX() || Triple.isAMDGPU()) {
5747+
// NVPTX/AMDGPU does not care about the code model and will accept
5748+
// whatever works for the host.
57495749
Ok = true;
57505750
}
57515751
if (Ok) {

‎clang/lib/Format/TokenAnnotator.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2101,7 +2101,8 @@ class AnnotatingParser {
21012101
BeforeParen->isNot(TT_TypenameMacro) &&
21022102
BeforeParen->TokenText == BeforeParen->TokenText.upper() &&
21032103
(!BeforeParen->Previous ||
2104-
BeforeParen->Previous->ClosesTemplateDeclaration)) {
2104+
BeforeParen->Previous->ClosesTemplateDeclaration ||
2105+
BeforeParen->Previous->ClosesRequiresClause)) {
21052106
Current.setType(TT_FunctionAnnotationRParen);
21062107
}
21072108
}

‎clang/unittests/Format/TokenAnnotatorTest.cpp

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1376,6 +1376,20 @@ TEST_F(TokenAnnotatorTest, RequiresDoesNotChangeParsingOfTheRest) {
13761376
"}";
13771377
RequiresTokenCount = 9;
13781378
TestRequires(__LINE__);
1379+
1380+
BaseCode = "template<typename T>\n"
1381+
"ANNOTATE(\"S\"\n"
1382+
" \"S\")\n"
1383+
"void foo();";
1384+
ConstrainedCode = "template<typename T>\n"
1385+
" requires(true)\n"
1386+
"ANNOTATE(\"S\"\n"
1387+
" \"S\")\n"
1388+
"void foo();";
1389+
BaseTokenCount = 16;
1390+
RequiresTokenCount = 4;
1391+
PrefixTokenCount = 5;
1392+
TestRequires(__LINE__);
13791393
}
13801394

13811395
TEST_F(TokenAnnotatorTest, UnderstandsAsm) {

‎compiler-rt/cmake/builtin-config-ix.cmake

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@ builtin_check_c_compiler_flag(-fno-profile-generate COMPILER_RT_HAS_FNO_PROFILE_
1818
builtin_check_c_compiler_flag(-fno-profile-instr-generate COMPILER_RT_HAS_FNO_PROFILE_INSTR_GENERATE_FLAG)
1919
builtin_check_c_compiler_flag(-fno-profile-instr-use COMPILER_RT_HAS_FNO_PROFILE_INSTR_USE_FLAG)
2020
builtin_check_c_compiler_flag(-Wno-pedantic COMPILER_RT_HAS_WNO_PEDANTIC)
21+
builtin_check_c_compiler_flag(/Zl COMPILER_RT_HAS_ZL_FLAG)
2122

2223
builtin_check_c_compiler_source(COMPILER_RT_HAS_ATOMIC_KEYWORD
2324
"

‎compiler-rt/lib/builtins/CMakeLists.txt

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -761,6 +761,12 @@ else ()
761761

762762
append_list_if(COMPILER_RT_HAS_STD_C11_FLAG -std=c11 BUILTIN_CFLAGS)
763763

764+
# Don't embed directives for picking any specific CRT
765+
if (MSVC)
766+
set(CMAKE_MSVC_RUNTIME_LIBRARY "")
767+
append_list_if(COMPILER_RT_HAS_ZL_FLAG /Zl BUILTIN_CFLAGS)
768+
endif()
769+
764770
# These flags would normally be added to CMAKE_C_FLAGS by the llvm
765771
# cmake step. Add them manually if this is a standalone build.
766772
if(COMPILER_RT_STANDALONE_BUILD)

‎llvm/include/llvm/Config/llvm-config.h.cmake

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616

1717
/* Indicate that this is LLVM compiled from the amd-gfx branch. */
1818
#define LLVM_HAVE_BRANCH_AMD_GFX
19-
#define LLVM_MAIN_REVISION 479203
19+
#define LLVM_MAIN_REVISION 479209
2020

2121
/* Define if LLVM_ENABLE_DUMP is enabled */
2222
#cmakedefine LLVM_ENABLE_DUMP

‎llvm/lib/CodeGen/RegisterCoalescer.cpp

Lines changed: 9 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1415,6 +1415,9 @@ bool RegisterCoalescer::reMaterializeTrivialDef(const CoalescerPair &CP,
14151415
// from SUBREG_TO_REG, such as:
14161416
// $edi = MOV32r0 implicit-def dead $eflags, implicit-def $rdi
14171417
// undef %0.sub_32bit = MOV32r0 implicit-def dead $eflags, implicit-def %0
1418+
//
1419+
// The implicit-def of the super register may have been reduced to
1420+
// subregisters depending on the uses.
14181421

14191422
bool NewMIDefinesFullReg = false;
14201423

@@ -1432,12 +1435,14 @@ bool RegisterCoalescer::reMaterializeTrivialDef(const CoalescerPair &CP,
14321435
assert(MO.isImplicit() && MO.getReg().isPhysical() &&
14331436
(MO.isDead() ||
14341437
(DefSubIdx &&
1435-
(TRI->getSubReg(MO.getReg(), DefSubIdx) ==
1436-
MCRegister((unsigned)NewMI.getOperand(0).getReg())))));
1438+
((TRI->getSubReg(MO.getReg(), DefSubIdx) ==
1439+
MCRegister((unsigned)NewMI.getOperand(0).getReg())) ||
1440+
TRI->isSubRegisterEq(NewMI.getOperand(0).getReg(),
1441+
MO.getReg())))));
14371442
NewMIImplDefs.push_back(MO.getReg().asMCReg());
14381443
} else {
1439-
assert(MO.getReg() == NewMI.getOperand(0).getReg() &&
1440-
MO.getSubReg() == 0);
1444+
assert(MO.getReg() == NewMI.getOperand(0).getReg());
1445+
14411446
// We're only expecting another def of the main output, so the range
14421447
// should get updated with the regular output range.
14431448
//

‎llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,39 @@
1+
# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=register-coalescer -o - %s
2+
---
3+
name: rematerialize_subreg_to_reg_added_impdef_1
4+
tracksRegLiveness: true
5+
body: |
6+
bb.0:
7+
successors: %bb.1(0x2aaaaaab), %bb.2(0x55555555)
8+
liveins: $edi
9+
10+
%0:gr32 = MOV32r0 implicit-def dead $eflags
11+
%1:gr8 = COPY %0.sub_8bit
12+
%2:gr64 = SUBREG_TO_REG 0, killed %0, %subreg.sub_32bit
13+
JCC_1 %bb.2, 5, implicit killed undef $eflags
14+
15+
bb.1:
16+
successors: %bb.3(0x80000000)
17+
18+
JMP_1 %bb.3
19+
20+
bb.2:
21+
successors: %bb.3(0x80000000)
22+
23+
%5:gr64 = IMPLICIT_DEF
24+
%2:gr64 = COPY killed %5
25+
26+
bb.3:
27+
successors: %bb.4(0x30000000), %bb.5(0x50000000)
28+
29+
JCC_1 %bb.5, 5, implicit killed undef $eflags
30+
31+
bb.4:
32+
$al = COPY killed %1
33+
RET 0, killed undef $al
34+
35+
bb.5:
36+
MOV64mr undef $noreg, 1, undef $noreg, 0, undef $noreg, killed %2 :: (store (s64))
37+
RET 0, killed undef $al
38+
39+
...

‎llvm/test/CodeGen/X86/coalescer-implicit-def-regression.mir

Lines changed: 91 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,91 @@
1+
# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=register-coalescer -o - %s
2+
3+
# An implicit-def will be added to SUBREG_TO_REG during coalescing
4+
---
5+
name: rematerialize_subreg_to_reg_added_impdef_0
6+
tracksRegLiveness: true
7+
body: |
8+
bb.0:
9+
successors: %bb.1(0x2aaaaaab), %bb.2(0x55555555)
10+
liveins: $edi
11+
12+
%0:gr32 = MOV32r0 implicit-def dead $eflags
13+
%1:gr8 = COPY %0.sub_8bit
14+
%2:gr64 = SUBREG_TO_REG 0, killed %0, %subreg.sub_32bit
15+
JCC_1 %bb.2, 5, implicit killed undef $eflags
16+
17+
bb.1:
18+
%4:gr8 = COPY %1
19+
%5:gr8 = COPY killed undef %1
20+
JMP_1 %bb.5
21+
22+
bb.2:
23+
%6:gr64 = IMPLICIT_DEF
24+
%2:gr64 = COPY killed %6
25+
%5:gr8 = MOV8ri 1
26+
27+
bb.5:
28+
successors: %bb.6(0x30000000), %bb.7(0x50000000)
29+
30+
TEST8rr killed undef %5, %5, implicit-def $eflags
31+
JCC_1 %bb.7, 5, implicit killed undef $eflags
32+
33+
bb.6:
34+
$al = COPY killed %1
35+
RET 0, killed undef $al
36+
37+
bb.7:
38+
MOV64mr undef $noreg, 1, undef $noreg, 0, undef $noreg, killed %2 :: (store (s64))
39+
RET 0, killed undef $al
40+
41+
...
42+
43+
44+
# Reduced version of previous with the SUBREG_TO_REG already folded
45+
# away.
46+
#
47+
# The mov32r0 defines a subregister and has an implicit-def of the
48+
# super register. After coalescing, the full register implicit def of
49+
# %2 becomes a different subregister def.
50+
51+
---
52+
name: rematerialize_subreg_to_reg_coalesces_to_subreg_impdef
53+
tracksRegLiveness: true
54+
body: |
55+
bb.0:
56+
successors: %bb.1(0x2aaaaaab), %bb.2(0x55555555)
57+
liveins: $edi
58+
59+
undef %2.sub_32bit:gr64_with_sub_8bit = MOV32r0 implicit-def dead $eflags, implicit-def %2
60+
%1:gr8 = COPY %2.sub_8bit
61+
JCC_1 %bb.2, 5, implicit killed undef $eflags
62+
63+
bb.1:
64+
successors: %bb.3(0x80000000)
65+
66+
dead %3:gr8 = COPY %1
67+
%4:gr8 = COPY undef %1
68+
JMP_1 %bb.3
69+
70+
bb.2:
71+
successors: %bb.3(0x80000000)
72+
73+
%5:gr64 = IMPLICIT_DEF
74+
%2:gr64_with_sub_8bit = COPY %5
75+
%4:gr8 = MOV8ri 1
76+
77+
bb.3:
78+
successors: %bb.4(0x30000000), %bb.5(0x50000000)
79+
80+
TEST8rr undef %4, %4, implicit-def $eflags
81+
JCC_1 %bb.5, 5, implicit killed undef $eflags
82+
83+
bb.4:
84+
$al = COPY %1
85+
RET 0, killed undef $al
86+
87+
bb.5:
88+
MOV64mr undef $noreg, 1, undef $noreg, 0, undef $noreg, %2 :: (store (s64))
89+
RET 0, killed undef $al
90+
91+
...

0 commit comments

Comments
 (0)