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Merged main:761c9dd92789 into amd-gfx:5dff4b923208
Local branch amd-gfx 5dff4b9 Merged main:20af0e5e8d56 into amd-gfx:ca63cea7fda3 Remote branch main 761c9dd [mlir][sparse] implementating stageSparseOpPass as an interface (llvm#69022)
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‎clang/include/clang/Basic/arm_sve.td

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1862,11 +1862,13 @@ def SVBGRP_N : SInst<"svbgrp[_n_{d}]", "dda", "UcUsUiUl", MergeNone, "aarch64_sv
18621862
let TargetGuard = "sve2p1" in {
18631863
def SVFCLAMP : SInst<"svclamp[_{d}]", "dddd", "hfd", MergeNone, "aarch64_sve_fclamp", [], []>;
18641864
def SVPTRUE_COUNT : SInst<"svptrue_{d}", "}v", "QcQsQiQl", MergeNone, "aarch64_sve_ptrue_{d}", [IsOverloadNone], []>;
1865+
1866+
def SVPEXT_SINGLE : SInst<"svpext_lane_{d}", "P}i", "QcQsQiQl", MergeNone, "aarch64_sve_pext", [], [ImmCheck<1, ImmCheck0_3>]>;
1867+
def SVPEXT_X2 : SInst<"svpext_lane_{d}_x2", "2.P}i", "QcQsQiQl", MergeNone, "aarch64_sve_pext_x2", [], [ImmCheck<1, ImmCheck0_1>]>;
18651868
}
18661869

18671870
let TargetGuard = "sve2p1" in {
18681871
def SVSCLAMP : SInst<"svclamp[_{d}]", "dddd", "csil", MergeNone, "aarch64_sve_sclamp", [], []>;
18691872
def SVUCLAMP : SInst<"svclamp[_{d}]", "dddd", "UcUsUiUl", MergeNone, "aarch64_sve_uclamp", [], []>;
18701873
def SVCNTP_COUNT : SInst<"svcntp_{d}", "n}i", "QcQsQiQl", MergeNone, "aarch64_sve_cntp_{d}", [IsOverloadNone], [ImmCheck<1, ImmCheck2_4_Mul2>]>;
1871-
18721874
}

‎clang/include/clang/Basic/arm_sve_sme_incl.td

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -61,7 +61,8 @@
6161
// -------------------
6262
// prototype: return (arg, arg, ...)
6363
//
64-
// 2,3,4: array of default vectors
64+
// 2,3,4: array of vectors
65+
// .: indicator for multi-vector modifier that will follow (e.g. 2.x)
6566
// v: void
6667
// x: vector of signed integers
6768
// u: vector of unsigned integers

‎clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 36 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9853,6 +9853,41 @@ Value *CodeGenFunction::EmitSVETupleCreate(const SVETypeFlags &TypeFlags,
98539853
return Call;
98549854
}
98559855

9856+
Value *CodeGenFunction::FormSVEBuiltinResult(Value *Call) {
9857+
// Multi-vector results should be broken up into a single (wide) result
9858+
// vector.
9859+
auto *StructTy = dyn_cast<StructType>(Call->getType());
9860+
if (!StructTy)
9861+
return Call;
9862+
9863+
auto *VTy = dyn_cast<ScalableVectorType>(StructTy->getTypeAtIndex(0U));
9864+
if (!VTy)
9865+
return Call;
9866+
unsigned N = StructTy->getNumElements();
9867+
9868+
// We may need to emit a cast to a svbool_t
9869+
bool IsPredTy = VTy->getElementType()->isIntegerTy(1);
9870+
unsigned MinElts = IsPredTy ? 16 : VTy->getMinNumElements();
9871+
9872+
ScalableVectorType *WideVTy =
9873+
ScalableVectorType::get(VTy->getElementType(), MinElts * N);
9874+
Value *Ret = llvm::PoisonValue::get(WideVTy);
9875+
for (unsigned I = 0; I < N; ++I) {
9876+
Value *SRet = Builder.CreateExtractValue(Call, I);
9877+
assert(SRet->getType() == VTy && "Unexpected type for result value");
9878+
Value *Idx = ConstantInt::get(CGM.Int64Ty, I * MinElts);
9879+
9880+
if (IsPredTy)
9881+
SRet = EmitSVEPredicateCast(
9882+
SRet, ScalableVectorType::get(Builder.getInt1Ty(), 16));
9883+
9884+
Ret = Builder.CreateInsertVector(WideVTy, Ret, SRet, Idx);
9885+
}
9886+
Call = Ret;
9887+
9888+
return Call;
9889+
}
9890+
98569891
Value *CodeGenFunction::EmitAArch64SVEBuiltinExpr(unsigned BuiltinID,
98579892
const CallExpr *E) {
98589893
// Find out if any arguments are required to be integer constant expressions.
@@ -9966,7 +10001,7 @@ Value *CodeGenFunction::EmitAArch64SVEBuiltinExpr(unsigned BuiltinID,
996610001
if (PredTy->getScalarType()->isIntegerTy(1))
996710002
Call = EmitSVEPredicateCast(Call, cast<llvm::ScalableVectorType>(Ty));
996810003

9969-
return Call;
10004+
return FormSVEBuiltinResult(Call);
997010005
}
997110006

997210007
switch (BuiltinID) {

‎clang/lib/CodeGen/CodeGenFunction.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4292,6 +4292,11 @@ class CodeGenFunction : public CodeGenTypeCache {
42924292
llvm::Value *EmitSVEStructStore(const SVETypeFlags &TypeFlags,
42934293
SmallVectorImpl<llvm::Value *> &Ops,
42944294
unsigned IntID);
4295+
/// FormSVEBuiltinResult - Returns the struct of scalable vectors as a wider
4296+
/// vector. It extracts the scalable vector from the struct and inserts into
4297+
/// the wider vector. This avoids the error when allocating space in llvm
4298+
/// for struct of scalable vectors if a function returns struct.
4299+
llvm::Value *FormSVEBuiltinResult(llvm::Value *Call);
42954300
llvm::Value *EmitAArch64SVEBuiltinExpr(unsigned BuiltinID, const CallExpr *E);
42964301

42974302
llvm::Value *EmitSMELd1St1(const SVETypeFlags &TypeFlags,

‎clang/test/CodeGen/aarch64-sve2p1-intrinsics/acle_sve2p1_pext.c

Lines changed: 152 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,152 @@
1+
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2+
// REQUIRES: aarch64-registered-target
3+
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s
4+
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2p1 -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK
5+
6+
#include <arm_sve.h>
7+
8+
// CHECK-LABEL: @test_svpext_lane_c8_0(
9+
// CHECK-NEXT: entry:
10+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.pext.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 0)
11+
// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]
12+
//
13+
// CPP-CHECK-LABEL: @_Z21test_svpext_lane_c8_0u11__SVCount_t(
14+
// CPP-CHECK-NEXT: entry:
15+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.pext.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 0)
16+
// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]
17+
//
18+
svbool_t test_svpext_lane_c8_0(svcount_t c) {
19+
return svpext_lane_c8(c, 0);
20+
}
21+
22+
// CHECK-LABEL: @test_svpext_lane_c8_3(
23+
// CHECK-NEXT: entry:
24+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.pext.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 3)
25+
// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]
26+
//
27+
// CPP-CHECK-LABEL: @_Z21test_svpext_lane_c8_3u11__SVCount_t(
28+
// CPP-CHECK-NEXT: entry:
29+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.pext.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 3)
30+
// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP0]]
31+
//
32+
svbool_t test_svpext_lane_c8_3(svcount_t c) {
33+
return svpext_lane_c8(c, 3);
34+
}
35+
36+
// CHECK-LABEL: @test_svpext_lane_c16_0(
37+
// CHECK-NEXT: entry:
38+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.pext.nxv8i1(target("aarch64.svcount") [[C:%.*]], i32 0)
39+
// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]])
40+
// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
41+
//
42+
// CPP-CHECK-LABEL: @_Z22test_svpext_lane_c16_0u11__SVCount_t(
43+
// CPP-CHECK-NEXT: entry:
44+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.pext.nxv8i1(target("aarch64.svcount") [[C:%.*]], i32 0)
45+
// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]])
46+
// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
47+
//
48+
svbool_t test_svpext_lane_c16_0(svcount_t c) {
49+
return svpext_lane_c16(c, 0);
50+
}
51+
52+
// CHECK-LABEL: @test_svpext_lane_c16_3(
53+
// CHECK-NEXT: entry:
54+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.pext.nxv8i1(target("aarch64.svcount") [[C:%.*]], i32 3)
55+
// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]])
56+
// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
57+
//
58+
// CPP-CHECK-LABEL: @_Z22test_svpext_lane_c16_3u11__SVCount_t(
59+
// CPP-CHECK-NEXT: entry:
60+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 8 x i1> @llvm.aarch64.sve.pext.nxv8i1(target("aarch64.svcount") [[C:%.*]], i32 3)
61+
// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv8i1(<vscale x 8 x i1> [[TMP0]])
62+
// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
63+
//
64+
svbool_t test_svpext_lane_c16_3(svcount_t c) {
65+
return svpext_lane_c16(c, 3);
66+
}
67+
68+
// CHECK-LABEL: @test_svpext_lane_c32_0(
69+
// CHECK-NEXT: entry:
70+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.pext.nxv4i1(target("aarch64.svcount") [[C:%.*]], i32 0)
71+
// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]])
72+
// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
73+
//
74+
// CPP-CHECK-LABEL: @_Z22test_svpext_lane_c32_0u11__SVCount_t(
75+
// CPP-CHECK-NEXT: entry:
76+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.pext.nxv4i1(target("aarch64.svcount") [[C:%.*]], i32 0)
77+
// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]])
78+
// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
79+
//
80+
svbool_t test_svpext_lane_c32_0(svcount_t c) {
81+
return svpext_lane_c32(c, 0);
82+
}
83+
84+
// CHECK-LABEL: @test_svpext_lane_c32_3(
85+
// CHECK-NEXT: entry:
86+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.pext.nxv4i1(target("aarch64.svcount") [[C:%.*]], i32 3)
87+
// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]])
88+
// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
89+
//
90+
// CPP-CHECK-LABEL: @_Z22test_svpext_lane_c32_3u11__SVCount_t(
91+
// CPP-CHECK-NEXT: entry:
92+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 4 x i1> @llvm.aarch64.sve.pext.nxv4i1(target("aarch64.svcount") [[C:%.*]], i32 3)
93+
// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> [[TMP0]])
94+
// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
95+
//
96+
svbool_t test_svpext_lane_c32_3(svcount_t c) {
97+
return svpext_lane_c32(c, 3);
98+
}
99+
100+
// CHECK-LABEL: @test_svpext_lane_c64_0(
101+
// CHECK-NEXT: entry:
102+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.pext.nxv2i1(target("aarch64.svcount") [[C:%.*]], i32 0)
103+
// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]])
104+
// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
105+
//
106+
// CPP-CHECK-LABEL: @_Z22test_svpext_lane_c64_0u11__SVCount_t(
107+
// CPP-CHECK-NEXT: entry:
108+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.pext.nxv2i1(target("aarch64.svcount") [[C:%.*]], i32 0)
109+
// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]])
110+
// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
111+
//
112+
svbool_t test_svpext_lane_c64_0(svcount_t c) {
113+
return svpext_lane_c64(c, 0);
114+
}
115+
116+
// CHECK-LABEL: @test_svpext_lane_c64_3(
117+
// CHECK-NEXT: entry:
118+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.pext.nxv2i1(target("aarch64.svcount") [[C:%.*]], i32 3)
119+
// CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]])
120+
// CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
121+
//
122+
// CPP-CHECK-LABEL: @_Z22test_svpext_lane_c64_3u11__SVCount_t(
123+
// CPP-CHECK-NEXT: entry:
124+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 2 x i1> @llvm.aarch64.sve.pext.nxv2i1(target("aarch64.svcount") [[C:%.*]], i32 3)
125+
// CPP-CHECK-NEXT: [[TMP1:%.*]] = tail call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv2i1(<vscale x 2 x i1> [[TMP0]])
126+
// CPP-CHECK-NEXT: ret <vscale x 16 x i1> [[TMP1]]
127+
//
128+
svbool_t test_svpext_lane_c64_3(svcount_t c) {
129+
return svpext_lane_c64(c, 3);
130+
}
131+
132+
// CHECK-LABEL: @test_svpext_lane_c8_x2_0(
133+
// CHECK-NEXT: entry:
134+
// CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 16 x i1>, <vscale x 16 x i1> } @llvm.aarch64.sve.pext.x2.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 0)
135+
// CHECK-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 16 x i1>, <vscale x 16 x i1> } [[TMP0]], 0
136+
// CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> poison, <vscale x 16 x i1> [[TMP1]], i64 0)
137+
// CHECK-NEXT: [[TMP3:%.*]] = extractvalue { <vscale x 16 x i1>, <vscale x 16 x i1> } [[TMP0]], 1
138+
// CHECK-NEXT: [[TMP4:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> [[TMP2]], <vscale x 16 x i1> [[TMP3]], i64 16)
139+
// CHECK-NEXT: ret <vscale x 32 x i1> [[TMP4]]
140+
//
141+
// CPP-CHECK-LABEL: @_Z24test_svpext_lane_c8_x2_0u11__SVCount_t(
142+
// CPP-CHECK-NEXT: entry:
143+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call { <vscale x 16 x i1>, <vscale x 16 x i1> } @llvm.aarch64.sve.pext.x2.nxv16i1(target("aarch64.svcount") [[C:%.*]], i32 0)
144+
// CPP-CHECK-NEXT: [[TMP1:%.*]] = extractvalue { <vscale x 16 x i1>, <vscale x 16 x i1> } [[TMP0]], 0
145+
// CPP-CHECK-NEXT: [[TMP2:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> poison, <vscale x 16 x i1> [[TMP1]], i64 0)
146+
// CPP-CHECK-NEXT: [[TMP3:%.*]] = extractvalue { <vscale x 16 x i1>, <vscale x 16 x i1> } [[TMP0]], 1
147+
// CPP-CHECK-NEXT: [[TMP4:%.*]] = tail call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> [[TMP2]], <vscale x 16 x i1> [[TMP3]], i64 16)
148+
// CPP-CHECK-NEXT: ret <vscale x 32 x i1> [[TMP4]]
149+
//
150+
svboolx2_t test_svpext_lane_c8_x2_0(svcount_t c) {
151+
return svpext_lane_c8_x2(c, 0);
152+
}

‎clang/test/Sema/aarch64-sve2p1-intrinsics/acle_sve2p1_imm.cpp

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,29 @@
33
// REQUIRES: aarch14-registered-target
44

55
#include <arm_sve.h>
6+
void test_svpext_lane_imm_0_3(svcount_t c) {
7+
svpext_lane_c8(c, -1); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
8+
svpext_lane_c16(c, -1); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
9+
svpext_lane_c32(c, -1); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
10+
svpext_lane_c64(c, -1); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
11+
12+
svpext_lane_c8(c, 4); // expected-error {{argument value 4 is outside the valid range [0, 3]}}
13+
svpext_lane_c16(c, 4); // expected-error {{argument value 4 is outside the valid range [0, 3]}}
14+
svpext_lane_c32(c, 4); // expected-error {{argument value 4 is outside the valid range [0, 3]}}
15+
svpext_lane_c64(c, 4); // expected-error {{argument value 4 is outside the valid range [0, 3]}}
16+
}
17+
18+
void test_svpext_lane_x2_imm_0_1(svcount_t c) {
19+
svpext_lane_c8_x2(c, -1); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 1]}}
20+
svpext_lane_c16_x2(c, -1); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 1]}}
21+
svpext_lane_c32_x2(c, -1); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 1]}}
22+
svpext_lane_c64_x2(c, -1); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 1]}}
23+
24+
svpext_lane_c8_x2(c, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}}
25+
svpext_lane_c16_x2(c, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}}
26+
svpext_lane_c32_x2(c, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}}
27+
svpext_lane_c64_x2(c, 2); // expected-error {{argument value 2 is outside the valid range [0, 1]}}
28+
}
629

730
void test_cntp(svcount_t c) {
831
svcntp_c8(c, 1); // expected-error {{argument value 1 is outside the valid range [2, 4]}}

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