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Merged main:c1d5865a313d into amd-gfx:f34f6bda3a82
Local branch amd-gfx f34f6bd Merged main:8474bfdd149b into amd-gfx:24c3950d1abc Remote branch main c1d5865 [AMDGPU] Call the `FINI_ARRAY` destructors in the correct order (llvm#71815)
2 parents f34f6bd + c1d5865 commit bf82620

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36 files changed

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‎clang/include/clang/Basic/arm_sve.td

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1987,6 +1987,26 @@ defm SVREVD : SInstZPZ<"svrevd", "csilUcUsUiUl", "aarch64_sve_revd">;
19871987
// SME intrinsics which operate only on vectors and do not require ZA should be added here,
19881988
// as they could possibly become SVE instructions in the future.
19891989

1990+
multiclass MinMaxIntr<string i, string zm, string mul, string t> {
1991+
def SVS # NAME : SInst<"sv" # i # "[" # zm # "_{d}_" # mul # "]", t, "csil", MergeNone, "aarch64_sve_s" # i # zm # "_" # mul, [IsStreaming], []>;
1992+
def SVU # NAME : SInst<"sv" # i # "[" # zm # "_{d}_" # mul # "]", t, "UcUsUiUl", MergeNone, "aarch64_sve_u" # i # zm # "_" # mul, [IsStreaming], []>;
1993+
def SVF # NAME : SInst<"sv" # i # "[" # zm # "_{d}_" # mul # "]", t, "hfd", MergeNone, "aarch64_sve_f" # i # zm # "_" # mul, [IsStreaming], []>;
1994+
}
1995+
1996+
let TargetGuard = "sme2" in {
1997+
// == SMAX / UMAX / FMAX ==
1998+
defm MAX_SINGLE_X2 : MinMaxIntr<"max", "_single", "x2", "22d">;
1999+
defm MAX_MULTI_X2 : MinMaxIntr<"max", "", "x2", "222">;
2000+
defm MAX_SINGLE_X4 : MinMaxIntr<"max", "_single", "x4", "44d">;
2001+
defm MAX_MULTI_X4 : MinMaxIntr<"max", "", "x4", "444">;
2002+
2003+
// == SMIN / UMIN / FMIN ==
2004+
defm MIN_SINGLE_X2 : MinMaxIntr<"min", "_single", "x2", "22d">;
2005+
defm MIN_MULTI_X2 : MinMaxIntr<"min", "", "x2", "222">;
2006+
defm MIN_SINGLE_X4 : MinMaxIntr<"min", "_single", "x4", "44d">;
2007+
defm MIN_MULTI_X4 : MinMaxIntr<"min", "", "x4", "444">;
2008+
}
2009+
19902010
let TargetGuard = "sme2" in {
19912011
// == ADD (vectors) ==
19922012
def SVADD_SINGLE_X2 : SInst<"svadd[_single_{d}_x2]", "22d", "cUcsUsiUilUl", MergeNone, "aarch64_sve_add_single_x2", [IsStreaming], []>;

‎clang/include/clang/Lex/HeaderSearchOptions.h

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -247,6 +247,11 @@ class HeaderSearchOptions {
247247
LLVM_PREFERRED_TYPE(bool)
248248
unsigned ModulesSkipHeaderSearchPaths : 1;
249249

250+
/// Whether to entirely skip writing pragma diagnostic mappings.
251+
/// Primarily used to speed up deserialization during dependency scanning.
252+
LLVM_PREFERRED_TYPE(bool)
253+
unsigned ModulesSkipPragmaDiagnosticMappings : 1;
254+
250255
LLVM_PREFERRED_TYPE(bool)
251256
unsigned ModulesHashContent : 1;
252257

@@ -270,7 +275,8 @@ class HeaderSearchOptions {
270275
ForceCheckCXX20ModulesInputFiles(false), UseDebugInfo(false),
271276
ModulesValidateDiagnosticOptions(true),
272277
ModulesSkipDiagnosticOptions(false),
273-
ModulesSkipHeaderSearchPaths(false), ModulesHashContent(false),
278+
ModulesSkipHeaderSearchPaths(false),
279+
ModulesSkipPragmaDiagnosticMappings(false), ModulesHashContent(false),
274280
ModulesStrictContextHash(false) {}
275281

276282
/// AddPath - Add the \p Path path to the specified \p Group list.

‎clang/lib/Driver/ToolChains/AIX.cpp

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -233,7 +233,15 @@ void aix::Linker::ConstructJob(Compilation &C, const JobAction &JA,
233233

234234
if (D.isUsingLTO()) {
235235
assert(!Inputs.empty() && "Must have at least one input.");
236-
addLTOOptions(ToolChain, Args, CmdArgs, Output, Inputs[0],
236+
// Find the first filename InputInfo object.
237+
auto Input = llvm::find_if(
238+
Inputs, [](const InputInfo &II) -> bool { return II.isFilename(); });
239+
if (Input == Inputs.end())
240+
// For a very rare case, all of the inputs to the linker are
241+
// InputArg. If that happens, just use the first InputInfo.
242+
Input = Inputs.begin();
243+
244+
addLTOOptions(ToolChain, Args, CmdArgs, Output, *Input,
237245
D.getLTOMode() == LTOK_Thin);
238246
}
239247

‎clang/lib/Serialization/ASTWriter.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1261,8 +1261,8 @@ void ASTWriter::writeUnhashedControlBlock(Preprocessor &PP,
12611261
Stream.EmitRecord(HEADER_SEARCH_PATHS, Record);
12621262
}
12631263

1264-
// Write out the diagnostic/pragma mappings.
1265-
WritePragmaDiagnosticMappings(Diags, /* isModule = */ WritingModule);
1264+
if (!HSOpts.ModulesSkipPragmaDiagnosticMappings)
1265+
WritePragmaDiagnosticMappings(Diags, /* isModule = */ WritingModule);
12661266

12671267
// Header search entry usage.
12681268
auto HSEntryUsage = PP.getHeaderSearchInfo().computeUserEntryUsage();

‎clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -255,6 +255,8 @@ class DependencyScanningAction : public tooling::ToolAction {
255255
ScanInstance.getHeaderSearchOpts().ModulesStrictContextHash = true;
256256
ScanInstance.getHeaderSearchOpts().ModulesSkipDiagnosticOptions = true;
257257
ScanInstance.getHeaderSearchOpts().ModulesSkipHeaderSearchPaths = true;
258+
ScanInstance.getHeaderSearchOpts().ModulesSkipPragmaDiagnosticMappings =
259+
true;
258260

259261
// Avoid some checks and module map parsing when loading PCM files.
260262
ScanInstance.getPreprocessorOpts().ModulesCheckRelocated = false;

‎clang/test/Analysis/builtin_signbit.cpp

Lines changed: 104 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -1,46 +1,125 @@
1+
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3
12
// RUN: %clang -target powerpc-linux-gnu -emit-llvm -S -mabi=ibmlongdouble \
2-
// RUN: -O0 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-BE
3+
// RUN: -O0 %s -o - | FileCheck %s --check-prefixes=CHECK-BE32
34
// RUN: %clang -target powerpc64-linux-gnu -emit-llvm -S -mabi=ibmlongdouble \
4-
// RUN: -O0 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-BE
5+
// RUN: -O0 %s -o - | FileCheck %s --check-prefixes=CHECK-BE64
56
// RUN: %clang -target powerpc64le-linux-gnu -emit-llvm -S -mabi=ibmlongdouble \
6-
// RUN: -O0 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-LE
7+
// RUN: -O0 %s -o - | FileCheck %s --check-prefixes=CHECK-LE
78

89
bool b;
910
double d = -1.0;
1011
long double ld = -1.0L;
12+
// CHECK-BE32-LABEL: define dso_local void @_Z12test_signbitv(
13+
// CHECK-BE32-SAME: ) #[[ATTR0:[0-9]+]] {
14+
// CHECK-BE32-NEXT: entry:
15+
// CHECK-BE32-NEXT: [[TMP0:%.*]] = lshr i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128), 64
16+
// CHECK-BE32-NEXT: [[TMP1:%.*]] = trunc i128 [[TMP0]] to i64
17+
// CHECK-BE32-NEXT: [[TMP2:%.*]] = icmp slt i64 [[TMP1]], 0
18+
// CHECK-BE32-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TMP2]] to i8
19+
// CHECK-BE32-NEXT: store i8 [[FROMBOOL]], ptr @b, align 1
20+
// CHECK-BE32-NEXT: [[TMP3:%.*]] = load ppc_fp128, ptr @ld, align 16
21+
// CHECK-BE32-NEXT: [[TMP4:%.*]] = bitcast ppc_fp128 [[TMP3]] to i128
22+
// CHECK-BE32-NEXT: [[TMP5:%.*]] = lshr i128 [[TMP4]], 64
23+
// CHECK-BE32-NEXT: [[TMP6:%.*]] = trunc i128 [[TMP5]] to i64
24+
// CHECK-BE32-NEXT: [[TMP7:%.*]] = icmp slt i64 [[TMP6]], 0
25+
// CHECK-BE32-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[TMP7]] to i8
26+
// CHECK-BE32-NEXT: store i8 [[FROMBOOL1]], ptr @b, align 1
27+
// CHECK-BE32-NEXT: store i8 0, ptr @b, align 1
28+
// CHECK-BE32-NEXT: [[TMP8:%.*]] = load double, ptr @d, align 8
29+
// CHECK-BE32-NEXT: [[CONV:%.*]] = fptrunc double [[TMP8]] to float
30+
// CHECK-BE32-NEXT: [[TMP9:%.*]] = bitcast float [[CONV]] to i32
31+
// CHECK-BE32-NEXT: [[TMP10:%.*]] = icmp slt i32 [[TMP9]], 0
32+
// CHECK-BE32-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TMP10]] to i8
33+
// CHECK-BE32-NEXT: store i8 [[FROMBOOL2]], ptr @b, align 1
34+
// CHECK-BE32-NEXT: [[TMP11:%.*]] = lshr i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128), 64
35+
// CHECK-BE32-NEXT: [[TMP12:%.*]] = trunc i128 [[TMP11]] to i64
36+
// CHECK-BE32-NEXT: [[TMP13:%.*]] = icmp slt i64 [[TMP12]], 0
37+
// CHECK-BE32-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TMP13]] to i8
38+
// CHECK-BE32-NEXT: store i8 [[FROMBOOL3]], ptr @b, align 1
39+
// CHECK-BE32-NEXT: [[TMP14:%.*]] = load ppc_fp128, ptr @ld, align 16
40+
// CHECK-BE32-NEXT: [[TMP15:%.*]] = bitcast ppc_fp128 [[TMP14]] to i128
41+
// CHECK-BE32-NEXT: [[TMP16:%.*]] = lshr i128 [[TMP15]], 64
42+
// CHECK-BE32-NEXT: [[TMP17:%.*]] = trunc i128 [[TMP16]] to i64
43+
// CHECK-BE32-NEXT: [[TMP18:%.*]] = icmp slt i64 [[TMP17]], 0
44+
// CHECK-BE32-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[TMP18]] to i8
45+
// CHECK-BE32-NEXT: store i8 [[FROMBOOL4]], ptr @b, align 1
46+
// CHECK-BE32-NEXT: ret void
47+
//
48+
// CHECK-BE64-LABEL: define dso_local void @_Z12test_signbitv(
49+
// CHECK-BE64-SAME: ) #[[ATTR0:[0-9]+]] {
50+
// CHECK-BE64-NEXT: entry:
51+
// CHECK-BE64-NEXT: [[TMP0:%.*]] = lshr i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128), 64
52+
// CHECK-BE64-NEXT: [[TMP1:%.*]] = trunc i128 [[TMP0]] to i64
53+
// CHECK-BE64-NEXT: [[TMP2:%.*]] = icmp slt i64 [[TMP1]], 0
54+
// CHECK-BE64-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TMP2]] to i8
55+
// CHECK-BE64-NEXT: store i8 [[FROMBOOL]], ptr @b, align 1
56+
// CHECK-BE64-NEXT: [[TMP3:%.*]] = load ppc_fp128, ptr @ld, align 16
57+
// CHECK-BE64-NEXT: [[TMP4:%.*]] = bitcast ppc_fp128 [[TMP3]] to i128
58+
// CHECK-BE64-NEXT: [[TMP5:%.*]] = lshr i128 [[TMP4]], 64
59+
// CHECK-BE64-NEXT: [[TMP6:%.*]] = trunc i128 [[TMP5]] to i64
60+
// CHECK-BE64-NEXT: [[TMP7:%.*]] = icmp slt i64 [[TMP6]], 0
61+
// CHECK-BE64-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[TMP7]] to i8
62+
// CHECK-BE64-NEXT: store i8 [[FROMBOOL1]], ptr @b, align 1
63+
// CHECK-BE64-NEXT: store i8 0, ptr @b, align 1
64+
// CHECK-BE64-NEXT: [[TMP8:%.*]] = load double, ptr @d, align 8
65+
// CHECK-BE64-NEXT: [[CONV:%.*]] = fptrunc double [[TMP8]] to float
66+
// CHECK-BE64-NEXT: [[TMP9:%.*]] = bitcast float [[CONV]] to i32
67+
// CHECK-BE64-NEXT: [[TMP10:%.*]] = icmp slt i32 [[TMP9]], 0
68+
// CHECK-BE64-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TMP10]] to i8
69+
// CHECK-BE64-NEXT: store i8 [[FROMBOOL2]], ptr @b, align 1
70+
// CHECK-BE64-NEXT: [[TMP11:%.*]] = lshr i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128), 64
71+
// CHECK-BE64-NEXT: [[TMP12:%.*]] = trunc i128 [[TMP11]] to i64
72+
// CHECK-BE64-NEXT: [[TMP13:%.*]] = icmp slt i64 [[TMP12]], 0
73+
// CHECK-BE64-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TMP13]] to i8
74+
// CHECK-BE64-NEXT: store i8 [[FROMBOOL3]], ptr @b, align 1
75+
// CHECK-BE64-NEXT: [[TMP14:%.*]] = load ppc_fp128, ptr @ld, align 16
76+
// CHECK-BE64-NEXT: [[TMP15:%.*]] = bitcast ppc_fp128 [[TMP14]] to i128
77+
// CHECK-BE64-NEXT: [[TMP16:%.*]] = lshr i128 [[TMP15]], 64
78+
// CHECK-BE64-NEXT: [[TMP17:%.*]] = trunc i128 [[TMP16]] to i64
79+
// CHECK-BE64-NEXT: [[TMP18:%.*]] = icmp slt i64 [[TMP17]], 0
80+
// CHECK-BE64-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[TMP18]] to i8
81+
// CHECK-BE64-NEXT: store i8 [[FROMBOOL4]], ptr @b, align 1
82+
// CHECK-BE64-NEXT: ret void
83+
//
84+
// CHECK-LE-LABEL: define dso_local void @_Z12test_signbitv(
85+
// CHECK-LE-SAME: ) #[[ATTR0:[0-9]+]] {
86+
// CHECK-LE-NEXT: entry:
87+
// CHECK-LE-NEXT: [[FROMBOOL:%.*]] = zext i1 icmp slt (i64 trunc (i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128) to i64), i64 0) to i8
88+
// CHECK-LE-NEXT: store i8 [[FROMBOOL]], ptr @b, align 1
89+
// CHECK-LE-NEXT: [[TMP0:%.*]] = load ppc_fp128, ptr @ld, align 16
90+
// CHECK-LE-NEXT: [[TMP1:%.*]] = bitcast ppc_fp128 [[TMP0]] to i128
91+
// CHECK-LE-NEXT: [[TMP2:%.*]] = trunc i128 [[TMP1]] to i64
92+
// CHECK-LE-NEXT: [[TMP3:%.*]] = icmp slt i64 [[TMP2]], 0
93+
// CHECK-LE-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[TMP3]] to i8
94+
// CHECK-LE-NEXT: store i8 [[FROMBOOL1]], ptr @b, align 1
95+
// CHECK-LE-NEXT: store i8 0, ptr @b, align 1
96+
// CHECK-LE-NEXT: [[TMP4:%.*]] = load double, ptr @d, align 8
97+
// CHECK-LE-NEXT: [[CONV:%.*]] = fptrunc double [[TMP4]] to float
98+
// CHECK-LE-NEXT: [[TMP5:%.*]] = bitcast float [[CONV]] to i32
99+
// CHECK-LE-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP5]], 0
100+
// CHECK-LE-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TMP6]] to i8
101+
// CHECK-LE-NEXT: store i8 [[FROMBOOL2]], ptr @b, align 1
102+
// CHECK-LE-NEXT: [[FROMBOOL3:%.*]] = zext i1 icmp slt (i64 trunc (i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128) to i64), i64 0) to i8
103+
// CHECK-LE-NEXT: store i8 [[FROMBOOL3]], ptr @b, align 1
104+
// CHECK-LE-NEXT: [[TMP7:%.*]] = load ppc_fp128, ptr @ld, align 16
105+
// CHECK-LE-NEXT: [[TMP8:%.*]] = bitcast ppc_fp128 [[TMP7]] to i128
106+
// CHECK-LE-NEXT: [[TMP9:%.*]] = trunc i128 [[TMP8]] to i64
107+
// CHECK-LE-NEXT: [[TMP10:%.*]] = icmp slt i64 [[TMP9]], 0
108+
// CHECK-LE-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[TMP10]] to i8
109+
// CHECK-LE-NEXT: store i8 [[FROMBOOL4]], ptr @b, align 1
110+
// CHECK-LE-NEXT: ret void
111+
//
11112
void test_signbit()
12113
{
13114
b = __builtin_signbit(1.0L);
14-
// CHECK: i128
15-
// CHECK-LE-NOT: lshr
16-
// CHECK-BE: lshr
17-
// CHECK: bitcast
18-
// CHECK: ppc_fp128
19115

20116
b = __builtin_signbit(ld);
21-
// CHECK: bitcast
22-
// CHECK: ppc_fp128
23-
// CHECK-LE-NOT: lshr
24-
// CHECK-BE: lshr
25117

26118
b = __builtin_signbitf(1.0);
27-
// CHECK: store i8 0
28119

29120
b = __builtin_signbitf(d);
30-
// CHECK: bitcast
31-
// CHECK-LE-NOT: lshr
32-
// CHECK-BE-NOT: lshr
33121

34122
b = __builtin_signbitl(1.0L);
35-
// CHECK: i128
36-
// CHECK-LE-NOT: lshr
37-
// CHECK-BE: lshr
38-
// CHECK: bitcast
39-
// CHECK: ppc_fp128
40123

41124
b = __builtin_signbitl(ld);
42-
// CHECK: bitcast
43-
// CHECK: ppc_fp128
44-
// CHECK-LE-NOT: lshr
45-
// CHECK-BE: lshr
46125
}

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