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[AMDGPU] Define new targets gfx1200 and gfx1201 (llvm#73133)
Define target names and ELF numbers for new GFX12 targets gfx1200 and gfx1201. For now they behave identically to GFX11.
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-10
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‎clang/include/clang/Basic/Cuda.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -113,6 +113,8 @@ enum class CudaArch {
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GFX1103,
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GFX1150,
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GFX1151,
116+
GFX1200,
117+
GFX1201,
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Generic, // A processor model named 'generic' if the target backend defines a
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// public one.
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LAST,

‎clang/lib/Basic/Cuda.cpp

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@@ -135,6 +135,8 @@ static const CudaArchToStringMap arch_names[] = {
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GFX(1103), // gfx1103
136136
GFX(1150), // gfx1150
137137
GFX(1151), // gfx1151
138+
GFX(1200), // gfx1200
139+
GFX(1201), // gfx1201
138140
{CudaArch::Generic, "generic", ""},
139141
// clang-format on
140142
};

‎clang/lib/Basic/Targets/NVPTX.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -214,6 +214,8 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions &Opts,
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case CudaArch::GFX1103:
215215
case CudaArch::GFX1150:
216216
case CudaArch::GFX1151:
217+
case CudaArch::GFX1200:
218+
case CudaArch::GFX1201:
217219
case CudaArch::Generic:
218220
case CudaArch::LAST:
219221
break;

‎clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3540,6 +3540,8 @@ void CGOpenMPRuntimeGPU::processRequiresDirective(
35403540
case CudaArch::GFX1103:
35413541
case CudaArch::GFX1150:
35423542
case CudaArch::GFX1151:
3543+
case CudaArch::GFX1200:
3544+
case CudaArch::GFX1201:
35433545
case CudaArch::Generic:
35443546
case CudaArch::UNUSED:
35453547
case CudaArch::UNKNOWN:

‎clang/test/CodeGenOpenCL/amdgpu-features.cl

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,8 @@
4949
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx1103 -S -emit-llvm -o - %s | FileCheck --check-prefix=GFX1103 %s
5050
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx1150 -S -emit-llvm -o - %s | FileCheck --check-prefix=GFX1150 %s
5151
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx1151 -S -emit-llvm -o - %s | FileCheck --check-prefix=GFX1151 %s
52+
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx1200 -S -emit-llvm -o - %s | FileCheck --check-prefix=GFX1200 %s
53+
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx1201 -S -emit-llvm -o - %s | FileCheck --check-prefix=GFX1201 %s
5254

5355
// RUN: %clang_cc1 -triple amdgcn -target-cpu gfx1103 -target-feature +wavefrontsize64 -S -emit-llvm -o - %s | FileCheck --check-prefix=GFX1103-W64 %s
5456

@@ -98,6 +100,8 @@
98100
// GFX1103: "target-features"="+16-bit-insts,+atomic-fadd-rtn-insts,+ci-insts,+dl-insts,+dot10-insts,+dot5-insts,+dot7-insts,+dot8-insts,+dot9-insts,+dpp,+gfx10-3-insts,+gfx10-insts,+gfx11-insts,+gfx8-insts,+gfx9-insts,+wavefrontsize32"
99101
// GFX1150: "target-features"="+16-bit-insts,+atomic-fadd-rtn-insts,+ci-insts,+dl-insts,+dot10-insts,+dot5-insts,+dot7-insts,+dot8-insts,+dot9-insts,+dpp,+gfx10-3-insts,+gfx10-insts,+gfx11-insts,+gfx8-insts,+gfx9-insts,+wavefrontsize32"
100102
// GFX1151: "target-features"="+16-bit-insts,+atomic-fadd-rtn-insts,+ci-insts,+dl-insts,+dot10-insts,+dot5-insts,+dot7-insts,+dot8-insts,+dot9-insts,+dpp,+gfx10-3-insts,+gfx10-insts,+gfx11-insts,+gfx8-insts,+gfx9-insts,+wavefrontsize32"
103+
// GFX1200: "target-features"="+16-bit-insts,+atomic-fadd-rtn-insts,+ci-insts,+dl-insts,+dot10-insts,+dot5-insts,+dot7-insts,+dot8-insts,+dot9-insts,+dpp,+gfx10-3-insts,+gfx10-insts,+gfx11-insts,+gfx12-insts,+gfx8-insts,+gfx9-insts,+wavefrontsize32"
104+
// GFX1201: "target-features"="+16-bit-insts,+atomic-fadd-rtn-insts,+ci-insts,+dl-insts,+dot10-insts,+dot5-insts,+dot7-insts,+dot8-insts,+dot9-insts,+dpp,+gfx10-3-insts,+gfx10-insts,+gfx11-insts,+gfx12-insts,+gfx8-insts,+gfx9-insts,+wavefrontsize32"
101105

102106
// GFX1103-W64: "target-features"="+16-bit-insts,+atomic-fadd-rtn-insts,+ci-insts,+dl-insts,+dot10-insts,+dot5-insts,+dot7-insts,+dot8-insts,+dot9-insts,+dpp,+gfx10-3-insts,+gfx10-insts,+gfx11-insts,+gfx8-insts,+gfx9-insts,+wavefrontsize64"
103107

‎clang/test/Driver/amdgpu-macros.cl

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Original file line numberDiff line numberDiff line change
@@ -128,6 +128,8 @@
128128
// RUN: %clang -E -dM -target amdgcn -mcpu=gfx1103 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1103 -DFAMILY=GFX11
129129
// RUN: %clang -E -dM -target amdgcn -mcpu=gfx1150 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1150 -DFAMILY=GFX11
130130
// RUN: %clang -E -dM -target amdgcn -mcpu=gfx1151 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1151 -DFAMILY=GFX11
131+
// RUN: %clang -E -dM -target amdgcn -mcpu=gfx1200 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1200 -DFAMILY=GFX12
132+
// RUN: %clang -E -dM -target amdgcn -mcpu=gfx1201 %s 2>&1 | FileCheck --check-prefixes=ARCH-GCN,FAST_FMAF %s -DWAVEFRONT_SIZE=32 -DCPU=gfx1201 -DFAMILY=GFX12
131133

132134
// ARCH-GCN-DAG: #define FP_FAST_FMA 1
133135

‎clang/test/Driver/amdgpu-mcpu.cl

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Original file line numberDiff line numberDiff line change
@@ -112,6 +112,8 @@
112112
// RUN: %clang -### -target amdgcn -mcpu=gfx1103 %s 2>&1 | FileCheck --check-prefix=GFX1103 %s
113113
// RUN: %clang -### -target amdgcn -mcpu=gfx1150 %s 2>&1 | FileCheck --check-prefix=GFX1150 %s
114114
// RUN: %clang -### -target amdgcn -mcpu=gfx1151 %s 2>&1 | FileCheck --check-prefix=GFX1151 %s
115+
// RUN: %clang -### -target amdgcn -mcpu=gfx1200 %s 2>&1 | FileCheck --check-prefix=GFX1200 %s
116+
// RUN: %clang -### -target amdgcn -mcpu=gfx1201 %s 2>&1 | FileCheck --check-prefix=GFX1201 %s
115117

116118
// GCNDEFAULT-NOT: -target-cpu
117119
// GFX600: "-target-cpu" "gfx600"
@@ -156,3 +158,5 @@
156158
// GFX1103: "-target-cpu" "gfx1103"
157159
// GFX1150: "-target-cpu" "gfx1150"
158160
// GFX1151: "-target-cpu" "gfx1151"
161+
// GFX1200: "-target-cpu" "gfx1200"
162+
// GFX1201: "-target-cpu" "gfx1201"

‎clang/test/Misc/target-invalid-cpu-note.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -29,15 +29,15 @@
2929

3030
// RUN: not %clang_cc1 -triple nvptx--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix NVPTX
3131
// NVPTX: error: unknown target CPU 'not-a-cpu'
32-
// NVPTX-NEXT: note: valid target CPU values are: sm_20, sm_21, sm_30, sm_32, sm_35, sm_37, sm_50, sm_52, sm_53, sm_60, sm_61, sm_62, sm_70, sm_72, sm_75, sm_80, sm_86, sm_87, sm_89, sm_90, gfx600, gfx601, gfx602, gfx700, gfx701, gfx702, gfx703, gfx704, gfx705, gfx801, gfx802, gfx803, gfx805, gfx810, gfx900, gfx902, gfx904, gfx906, gfx908, gfx909, gfx90a, gfx90c, gfx940, gfx941, gfx942, gfx1010, gfx1011, gfx1012, gfx1013, gfx1030, gfx1031, gfx1032, gfx1033, gfx1034, gfx1035, gfx1036, gfx1100, gfx1101, gfx1102, gfx1103, gfx1150, gfx1151{{$}}
32+
// NVPTX-NEXT: note: valid target CPU values are: sm_20, sm_21, sm_30, sm_32, sm_35, sm_37, sm_50, sm_52, sm_53, sm_60, sm_61, sm_62, sm_70, sm_72, sm_75, sm_80, sm_86, sm_87, sm_89, sm_90, gfx600, gfx601, gfx602, gfx700, gfx701, gfx702, gfx703, gfx704, gfx705, gfx801, gfx802, gfx803, gfx805, gfx810, gfx900, gfx902, gfx904, gfx906, gfx908, gfx909, gfx90a, gfx90c, gfx940, gfx941, gfx942, gfx1010, gfx1011, gfx1012, gfx1013, gfx1030, gfx1031, gfx1032, gfx1033, gfx1034, gfx1035, gfx1036, gfx1100, gfx1101, gfx1102, gfx1103, gfx1150, gfx1151, gfx1200, gfx1201{{$}}
3333

3434
// RUN: not %clang_cc1 -triple r600--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix R600
3535
// R600: error: unknown target CPU 'not-a-cpu'
3636
// R600-NEXT: note: valid target CPU values are: r600, rv630, rv635, r630, rs780, rs880, rv610, rv620, rv670, rv710, rv730, rv740, rv770, cedar, palm, cypress, hemlock, juniper, redwood, sumo, sumo2, barts, caicos, aruba, cayman, turks{{$}}
3737

3838
// RUN: not %clang_cc1 -triple amdgcn--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AMDGCN
3939
// AMDGCN: error: unknown target CPU 'not-a-cpu'
40-
// AMDGCN-NEXT: note: valid target CPU values are: gfx600, tahiti, gfx601, pitcairn, verde, gfx602, hainan, oland, gfx700, kaveri, gfx701, hawaii, gfx702, gfx703, kabini, mullins, gfx704, bonaire, gfx705, gfx801, carrizo, gfx802, iceland, tonga, gfx803, fiji, polaris10, polaris11, gfx805, tongapro, gfx810, stoney, gfx900, gfx902, gfx904, gfx906, gfx908, gfx909, gfx90a, gfx90c, gfx940, gfx941, gfx942, gfx1010, gfx1011, gfx1012, gfx1013, gfx1030, gfx1031, gfx1032, gfx1033, gfx1034, gfx1035, gfx1036, gfx1100, gfx1101, gfx1102, gfx1103, gfx1150, gfx1151{{$}}
40+
// AMDGCN-NEXT: note: valid target CPU values are: gfx600, tahiti, gfx601, pitcairn, verde, gfx602, hainan, oland, gfx700, kaveri, gfx701, hawaii, gfx702, gfx703, kabini, mullins, gfx704, bonaire, gfx705, gfx801, carrizo, gfx802, iceland, tonga, gfx803, fiji, polaris10, polaris11, gfx805, tongapro, gfx810, stoney, gfx900, gfx902, gfx904, gfx906, gfx908, gfx909, gfx90a, gfx90c, gfx940, gfx941, gfx942, gfx1010, gfx1011, gfx1012, gfx1013, gfx1030, gfx1031, gfx1032, gfx1033, gfx1034, gfx1035, gfx1036, gfx1100, gfx1101, gfx1102, gfx1103, gfx1150, gfx1151, gfx1200, gfx1201{{$}}
4141

4242
// RUN: not %clang_cc1 -triple wasm64--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix WEBASM
4343
// WEBASM: error: unknown target CPU 'not-a-cpu'

‎llvm/docs/AMDGPUUsage.rst

Lines changed: 17 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -504,6 +504,20 @@ Every processor supports every OS ABI (see :ref:`amdgpu-os`) with the following
504504
work-item Add product
505505
IDs names.
506506

507+
``gfx1200`` ``amdgcn`` dGPU - cumode - Architected *TBA*
508+
- wavefrontsize64 flat
509+
scratch .. TODO::
510+
- Packed
511+
work-item Add product
512+
IDs names.
513+
514+
``gfx1201`` ``amdgcn`` dGPU - cumode - Architected *TBA*
515+
- wavefrontsize64 flat
516+
scratch .. TODO::
517+
- Packed
518+
work-item Add product
519+
IDs names.
520+
507521
=========== =============== ============ ===== ================= =============== =============== ======================
508522

509523
.. _amdgpu-target-features:
@@ -1667,11 +1681,13 @@ The AMDGPU backend uses the following ELF header:
16671681
``EF_AMDGPU_MACH_AMDGCN_GFX1036`` 0x045 ``gfx1036``
16681682
``EF_AMDGPU_MACH_AMDGCN_GFX1101`` 0x046 ``gfx1101``
16691683
``EF_AMDGPU_MACH_AMDGCN_GFX1102`` 0x047 ``gfx1102``
1670-
*reserved* 0x048 Reserved.
1684+
``EF_AMDGPU_MACH_AMDGCN_GFX1200`` 0x048 ``gfx1200``
16711685
*reserved* 0x049 Reserved.
16721686
``EF_AMDGPU_MACH_AMDGCN_GFX1151`` 0x04a ``gfx1151``
16731687
``EF_AMDGPU_MACH_AMDGCN_GFX941`` 0x04b ``gfx941``
16741688
``EF_AMDGPU_MACH_AMDGCN_GFX942`` 0x04c ``gfx942``
1689+
*reserved* 0x04d Reserved.
1690+
``EF_AMDGPU_MACH_AMDGCN_GFX1201`` 0x04e ``gfx1201``
16751691
==================================== ========== =============================
16761692

16771693
Sections

‎llvm/include/llvm/BinaryFormat/ELF.h

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -779,16 +779,18 @@ enum : unsigned {
779779
EF_AMDGPU_MACH_AMDGCN_GFX1036 = 0x045,
780780
EF_AMDGPU_MACH_AMDGCN_GFX1101 = 0x046,
781781
EF_AMDGPU_MACH_AMDGCN_GFX1102 = 0x047,
782-
EF_AMDGPU_MACH_AMDGCN_RESERVED_0X48 = 0x048,
782+
EF_AMDGPU_MACH_AMDGCN_GFX1200 = 0x048,
783783
EF_AMDGPU_MACH_AMDGCN_RESERVED_0X49 = 0x049,
784784
EF_AMDGPU_MACH_AMDGCN_GFX1151 = 0x04a,
785785
EF_AMDGPU_MACH_AMDGCN_GFX941 = 0x04b,
786786
EF_AMDGPU_MACH_AMDGCN_GFX942 = 0x04c,
787+
EF_AMDGPU_MACH_AMDGCN_RESERVED_0X4D = 0x04d,
788+
EF_AMDGPU_MACH_AMDGCN_GFX1201 = 0x04e,
787789
// clang-format on
788790

789791
// First/last AMDGCN-based processors.
790792
EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
791-
EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX942,
793+
EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_GFX1201,
792794

793795
// Indicates if the "xnack" target feature is enabled for all code contained
794796
// in the object.

‎llvm/include/llvm/TargetParser/TargetParser.h

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -106,8 +106,11 @@ enum GPUKind : uint32_t {
106106
GK_GFX1150 = 94,
107107
GK_GFX1151 = 95,
108108

109+
GK_GFX1200 = 100,
110+
GK_GFX1201 = 101,
111+
109112
GK_AMDGCN_FIRST = GK_GFX600,
110-
GK_AMDGCN_LAST = GK_GFX1151,
113+
GK_AMDGCN_LAST = GK_GFX1201,
111114
};
112115

113116
/// Instruction set architecture version.

‎llvm/lib/Object/ELFObjectFile.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -506,6 +506,12 @@ StringRef ELFObjectFileBase::getAMDGPUCPUName() const {
506506
return "gfx1150";
507507
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1151:
508508
return "gfx1151";
509+
510+
// AMDGCN GFX12.
511+
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1200:
512+
return "gfx1200";
513+
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1201:
514+
return "gfx1201";
509515
default:
510516
llvm_unreachable("Unknown EF_AMDGPU_MACH value");
511517
}

‎llvm/lib/ObjectYAML/ELFYAML.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -610,6 +610,8 @@ void ScalarBitSetTraits<ELFYAML::ELF_EF>::bitset(IO &IO,
610610
BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1103, EF_AMDGPU_MACH);
611611
BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1150, EF_AMDGPU_MACH);
612612
BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1151, EF_AMDGPU_MACH);
613+
BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1200, EF_AMDGPU_MACH);
614+
BCaseMask(EF_AMDGPU_MACH_AMDGCN_GFX1201, EF_AMDGPU_MACH);
613615
switch (Object->Header.ABIVersion) {
614616
default:
615617
// ELFOSABI_AMDGPU_PAL, ELFOSABI_AMDGPU_MESA3D support *_V3 flags.

‎llvm/lib/Target/AMDGPU/AMDGPU.td

Lines changed: 74 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -345,6 +345,12 @@ def FeatureGFX11Insts : SubtargetFeature<"gfx11-insts",
345345
"Additional instructions for GFX11+"
346346
>;
347347

348+
def FeatureGFX12Insts : SubtargetFeature<"gfx12-insts",
349+
"GFX12Insts",
350+
"true",
351+
"Additional instructions for GFX12+"
352+
>;
353+
348354
def FeatureGFX10_3Insts : SubtargetFeature<"gfx10-3-insts",
349355
"GFX10_3Insts",
350356
"true",
@@ -1061,6 +1067,26 @@ def FeatureGFX11 : GCNSubtargetFeatureGeneration<"GFX11",
10611067
]
10621068
>;
10631069

1070+
def FeatureGFX12 : GCNSubtargetFeatureGeneration<"GFX12",
1071+
"gfx12",
1072+
[FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
1073+
FeatureFlatAddressSpace, Feature16BitInsts,
1074+
FeatureInv2PiInlineImm, FeatureApertureRegs,
1075+
FeatureCIInsts, FeatureGFX8Insts, FeatureGFX9Insts, FeatureGFX10Insts,
1076+
FeatureGFX10_AEncoding, FeatureGFX10_BEncoding, FeatureGFX10_3Insts,
1077+
FeatureGFX11Insts, FeatureGFX12Insts, FeatureVOP3P, FeatureVOPD,
1078+
FeatureMovrel, FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
1079+
FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
1080+
FeatureAddNoCarryInsts, FeatureFmaMixInsts,
1081+
FeatureNoSdstCMPX, FeatureVscnt,
1082+
FeatureVOP3Literal, FeatureDPP8,
1083+
FeatureNoDataDepHazard, FeaturePkFmacF16Inst,
1084+
FeatureA16, FeatureFastDenormalF32, FeatureG16,
1085+
FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess, FeatureGDS,
1086+
FeatureGWS, FeatureTrue16BitInsts
1087+
]
1088+
>;
1089+
10641090
//===----------------------------------------------------------------------===//
10651091

10661092
class FeatureSet<list<SubtargetFeature> Features_> {
@@ -1413,6 +1439,29 @@ def FeatureISAVersion11_5_1 : FeatureSet<
14131439
FeatureVGPRSingleUseHintInsts,
14141440
FeatureGFX11FullVGPRs])>;
14151441

1442+
def FeatureISAVersion12 : FeatureSet<
1443+
[FeatureGFX12,
1444+
FeatureLDSBankCount32,
1445+
FeatureDLInsts,
1446+
FeatureDot5Insts,
1447+
FeatureDot7Insts,
1448+
FeatureDot8Insts,
1449+
FeatureDot9Insts,
1450+
FeatureDot10Insts,
1451+
FeatureNSAEncoding,
1452+
FeaturePartialNSAEncoding,
1453+
FeatureWavefrontSize32,
1454+
FeatureShaderCyclesRegister,
1455+
FeatureArchitectedFlatScratch,
1456+
FeatureAtomicFaddRtnInsts,
1457+
FeatureAtomicFaddNoRtnInsts,
1458+
FeatureFlatAtomicFaddF32Inst,
1459+
FeatureImageInsts,
1460+
FeatureExtendedImageInsts,
1461+
FeaturePackedTID,
1462+
FeatureVcmpxPermlaneHazard,
1463+
FeatureMADIntraFwdBug]>;
1464+
14161465
//===----------------------------------------------------------------------===//
14171466

14181467
def AMDGPUInstrInfo : InstrInfo {
@@ -1567,13 +1616,24 @@ def isGFX6GFX7GFX8GFX9GFX10 :
15671616
"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
15681617
AssemblerPredicate<(all_of (not FeatureGFX11Insts))>;
15691618

1619+
def isNotGFX12Plus :
1620+
Predicate<"Subtarget->getGeneration() <= AMDGPUSubtarget::GFX11">,
1621+
AssemblerPredicate<(all_of (not FeatureGFX12Insts))>;
1622+
15701623
def isGFX7GFX8GFX9GFX10 :
15711624
Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
15721625
"Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
15731626
"Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
15741627
"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
15751628
AssemblerPredicate<(all_of FeatureCIInsts, (not FeatureGFX11Insts))>;
15761629

1630+
def isGFX8GFX9GFX10GFX11 :
1631+
Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1632+
"Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1633+
"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10 ||"
1634+
"Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1635+
AssemblerPredicate<(all_of FeatureGFX8Insts, (not FeatureGFX12Insts))>;
1636+
15771637
def isGFX7Plus :
15781638
Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS">,
15791639
AssemblerPredicate<(all_of FeatureCIInsts)>;
@@ -1646,6 +1706,11 @@ def isGFX10Plus :
16461706
Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX10">,
16471707
AssemblerPredicate<(all_of FeatureGFX10Insts)>;
16481708

1709+
def isGFX10GFX11 :
1710+
Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10 ||"
1711+
"Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1712+
AssemblerPredicate<(all_of FeatureGFX10Insts, (not FeatureGFX12Insts))>;
1713+
16491714
def isGFX10Before1030 :
16501715
Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10 &&"
16511716
"!Subtarget->hasGFX10_3Insts()">,
@@ -1664,12 +1729,20 @@ def isGFX8GFX9GFX10 :
16641729

16651730
def isGFX11Only :
16661731
Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1667-
AssemblerPredicate<(all_of FeatureGFX11Insts)>;
1732+
AssemblerPredicate<(all_of FeatureGFX11Insts, (not FeatureGFX12Insts))>;
16681733

16691734
def isGFX11Plus :
16701735
Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX11">,
16711736
AssemblerPredicate<(all_of FeatureGFX11Insts)>;
16721737

1738+
def isGFX12Only :
1739+
Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX12">,
1740+
AssemblerPredicate<(all_of FeatureGFX12Insts)>;
1741+
1742+
def isGFX12Plus :
1743+
Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX12">,
1744+
AssemblerPredicate<(all_of FeatureGFX12Insts)>;
1745+
16731746
def HasFlatAddressSpace : Predicate<"Subtarget->hasFlatAddressSpace()">,
16741747
AssemblerPredicate<(all_of FeatureFlatAddressSpace)>;
16751748

‎llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,8 @@ class AMDGPUSubtarget {
3939
VOLCANIC_ISLANDS = 7,
4040
GFX9 = 8,
4141
GFX10 = 9,
42-
GFX11 = 10
42+
GFX11 = 10,
43+
GFX12 = 11,
4344
};
4445

4546
private:

‎llvm/lib/Target/AMDGPU/GCNProcessors.td

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -279,3 +279,15 @@ def : ProcessorModel<"gfx1150", GFX11SpeedModel,
279279
def : ProcessorModel<"gfx1151", GFX11SpeedModel,
280280
FeatureISAVersion11_5_1.Features
281281
>;
282+
283+
//===----------------------------------------------------------------------===//
284+
// GCN GFX12.
285+
//===----------------------------------------------------------------------===//
286+
287+
def : ProcessorModel<"gfx1200", GFX11SpeedModel,
288+
FeatureISAVersion12.Features
289+
>;
290+
291+
def : ProcessorModel<"gfx1201", GFX11SpeedModel,
292+
FeatureISAVersion12.Features
293+
>;

‎llvm/lib/Target/AMDGPU/GCNSubtarget.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -107,6 +107,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
107107
bool GFX940Insts = false;
108108
bool GFX10Insts = false;
109109
bool GFX11Insts = false;
110+
bool GFX12Insts = false;
110111
bool GFX10_3Insts = false;
111112
bool GFX7GFX8GFX9Insts = false;
112113
bool SGPRInitBug = false;

‎llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -126,6 +126,8 @@ StringRef AMDGPUTargetStreamer::getArchNameFromElfMach(unsigned ElfMach) {
126126
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1103: AK = GK_GFX1103; break;
127127
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1150: AK = GK_GFX1150; break;
128128
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1151: AK = GK_GFX1151; break;
129+
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1200: AK = GK_GFX1200; break;
130+
case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1201: AK = GK_GFX1201; break;
129131
case ELF::EF_AMDGPU_MACH_NONE: AK = GK_NONE; break;
130132
default: AK = GK_NONE; break;
131133
}
@@ -202,6 +204,8 @@ unsigned AMDGPUTargetStreamer::getElfMach(StringRef GPU) {
202204
case GK_GFX1103: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1103;
203205
case GK_GFX1150: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1150;
204206
case GK_GFX1151: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1151;
207+
case GK_GFX1200: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1200;
208+
case GK_GFX1201: return ELF::EF_AMDGPU_MACH_AMDGCN_GFX1201;
205209
case GK_NONE: return ELF::EF_AMDGPU_MACH_NONE;
206210
}
207211
// clang-format on

‎llvm/lib/Target/AMDGPU/SIDefines.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,7 @@ enum {
4444
GFX90A = 8,
4545
GFX940 = 9,
4646
GFX11 = 10,
47+
GFX12 = 11,
4748
};
4849
}
4950

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