Skip to content

Commit cf919a8

Browse files
SC llvm teamSC llvm team
authored andcommitted
Merged main:8580010672e9 into amd-gfx:aaab4034535f
Local branch amd-gfx aaab403 Merged main:6403287eff71 into amd-gfx:26000866d891 Remote branch main 8580010 [ADT] Guard PagedVector death tests
2 parents aaab403 + 8580010 commit cf919a8

File tree

5 files changed

+1123
-4
lines changed

5 files changed

+1123
-4
lines changed

llvm/include/llvm/Config/llvm-config.h.cmake

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616

1717
/* Indicate that this is LLVM compiled from the amd-gfx branch. */
1818
#define LLVM_HAVE_BRANCH_AMD_GFX
19-
#define LLVM_MAIN_REVISION 476457
19+
#define LLVM_MAIN_REVISION 476461
2020

2121
/* Define if LLVM_ENABLE_DUMP is enabled */
2222
#cmakedefine LLVM_ENABLE_DUMP

llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,6 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
2525
const LLT XLenLLT = LLT::scalar(XLen);
2626
const LLT DoubleXLenLLT = LLT::scalar(2 * XLen);
2727
const LLT p0 = LLT::pointer(0, XLen);
28-
const LLT s1 = LLT::scalar(1);
2928
const LLT s8 = LLT::scalar(8);
3029
const LLT s16 = LLT::scalar(16);
3130
const LLT s32 = LLT::scalar(32);
@@ -43,8 +42,9 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
4342
.clampScalar(0, s32, XLenLLT);
4443

4544
getActionDefinitionsBuilder(
46-
{G_UADDE, G_UADDO, G_USUBE, G_USUBO})
47-
.lowerFor({{XLenLLT, s1}});
45+
{G_UADDE, G_UADDO, G_USUBE, G_USUBO}).lower();
46+
47+
getActionDefinitionsBuilder({G_SADDO, G_SSUBO}).minScalar(0, XLenLLT).lower();
4848

4949
getActionDefinitionsBuilder({G_ASHR, G_LSHR, G_SHL})
5050
.legalFor({{s32, s32}, {XLenLLT, XLenLLT}})

0 commit comments

Comments
 (0)