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[SPIR-V] Support SPV_INTEL_int4 extension (llvm#141031)
Adds support for native 4-bit type. Spec: https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_int4.asciidoc
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‎llvm/docs/SPIRVUsage.rst

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@@ -215,6 +215,8 @@ list of supported SPIR-V extensions, sorted alphabetically by their extension na
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- Adds a bitwise instruction on three operands and a look-up table index for specifying the bitwise operation to perform.
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* - ``SPV_INTEL_subgroup_matrix_multiply_accumulate``
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- Adds an instruction to compute the matrix product of an M x K matrix with a K x N matrix and then add an M x N matrix.
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* - ``SPV_INTEL_int4``
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- Adds support for 4-bit integer type, and allow this type to be used in cooperative matrices.
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To enable multiple extensions, list them separated by comma. For example, to enable support for atomic operations on floating-point numbers and arbitrary precision integers, use:
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‎llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp

Lines changed: 2 additions & 1 deletion
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@@ -99,7 +99,8 @@ static const std::map<std::string, SPIRV::Extension::Extension, std::less<>>
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{"SPV_INTEL_ternary_bitwise_function",
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SPIRV::Extension::Extension::SPV_INTEL_ternary_bitwise_function},
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{"SPV_INTEL_2d_block_io",
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SPIRV::Extension::Extension::SPV_INTEL_2d_block_io}};
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SPIRV::Extension::Extension::SPV_INTEL_2d_block_io},
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{"SPV_INTEL_int4", SPIRV::Extension::Extension::SPV_INTEL_int4}};
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bool SPIRVExtensionsParser::parse(cl::Option &O, StringRef ArgName,
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StringRef ArgValue,

‎llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp

Lines changed: 17 additions & 4 deletions
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@@ -154,7 +154,8 @@ unsigned SPIRVGlobalRegistry::adjustOpTypeIntWidth(unsigned Width) const {
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report_fatal_error("Unsupported integer width!");
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const SPIRVSubtarget &ST = cast<SPIRVSubtarget>(CurMF->getSubtarget());
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if (ST.canUseExtension(
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SPIRV::Extension::SPV_INTEL_arbitrary_precision_integers))
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SPIRV::Extension::SPV_INTEL_arbitrary_precision_integers) ||
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ST.canUseExtension(SPIRV::Extension::SPV_INTEL_int4))
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return Width;
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if (Width <= 8)
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Width = 8;
@@ -174,9 +175,14 @@ SPIRVType *SPIRVGlobalRegistry::getOpTypeInt(unsigned Width,
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const SPIRVSubtarget &ST =
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cast<SPIRVSubtarget>(MIRBuilder.getMF().getSubtarget());
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return createOpType(MIRBuilder, [&](MachineIRBuilder &MIRBuilder) {
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if ((!isPowerOf2_32(Width) || Width < 8) &&
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ST.canUseExtension(
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SPIRV::Extension::SPV_INTEL_arbitrary_precision_integers)) {
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if (Width == 4 && ST.canUseExtension(SPIRV::Extension::SPV_INTEL_int4)) {
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MIRBuilder.buildInstr(SPIRV::OpExtension)
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.addImm(SPIRV::Extension::SPV_INTEL_int4);
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MIRBuilder.buildInstr(SPIRV::OpCapability)
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.addImm(SPIRV::Capability::Int4TypeINTEL);
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} else if ((!isPowerOf2_32(Width) || Width < 8) &&
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ST.canUseExtension(
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SPIRV::Extension::SPV_INTEL_arbitrary_precision_integers)) {
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MIRBuilder.buildInstr(SPIRV::OpExtension)
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.addImm(SPIRV::Extension::SPV_INTEL_arbitrary_precision_integers);
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MIRBuilder.buildInstr(SPIRV::OpCapability)
@@ -1563,6 +1569,13 @@ SPIRVType *SPIRVGlobalRegistry::getOrCreateOpTypeCoopMatr(
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const MachineInstr *NewMI =
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createOpType(MIRBuilder, [&](MachineIRBuilder &MIRBuilder) {
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SPIRVType *SpvTypeInt32 = getOrCreateSPIRVIntegerType(32, MIRBuilder);
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const Type *ET = getTypeForSPIRVType(ElemType);
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if (ET->isIntegerTy() && ET->getIntegerBitWidth() == 4 &&
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cast<SPIRVSubtarget>(MIRBuilder.getMF().getSubtarget())
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.canUseExtension(SPIRV::Extension::SPV_INTEL_int4)) {
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MIRBuilder.buildInstr(SPIRV::OpCapability)
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.addImm(SPIRV::Capability::Int4CooperativeMatrixINTEL);
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}
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return MIRBuilder.buildInstr(SPIRV::OpTypeCooperativeMatrixKHR)
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.addDef(createTypeVReg(MIRBuilder))
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.addUse(getSPIRVTypeID(ElemType))

‎llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp

Lines changed: 2 additions & 1 deletion
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@@ -128,7 +128,8 @@ SPIRVLegalizerInfo::SPIRVLegalizerInfo(const SPIRVSubtarget &ST) {
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bool IsExtendedInts =
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ST.canUseExtension(
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SPIRV::Extension::SPV_INTEL_arbitrary_precision_integers) ||
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ST.canUseExtension(SPIRV::Extension::SPV_KHR_bit_instructions);
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ST.canUseExtension(SPIRV::Extension::SPV_KHR_bit_instructions) ||
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ST.canUseExtension(SPIRV::Extension::SPV_INTEL_int4);
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auto extendedScalarsAndVectors =
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[IsExtendedInts](const LegalityQuery &Query) {
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const LLT Ty = Query.Types[0];

‎llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp

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@@ -492,7 +492,8 @@ generateAssignInstrs(MachineFunction &MF, SPIRVGlobalRegistry *GR,
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bool IsExtendedInts =
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ST->canUseExtension(
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SPIRV::Extension::SPV_INTEL_arbitrary_precision_integers) ||
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ST->canUseExtension(SPIRV::Extension::SPV_KHR_bit_instructions);
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ST->canUseExtension(SPIRV::Extension::SPV_KHR_bit_instructions) ||
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ST->canUseExtension(SPIRV::Extension::SPV_INTEL_int4);
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for (MachineBasicBlock *MBB : post_order(&MF)) {
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if (MBB->empty())

‎llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td

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@@ -317,6 +317,7 @@ defm SPV_INTEL_fp_max_error : ExtensionOperand<119>;
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defm SPV_INTEL_ternary_bitwise_function : ExtensionOperand<120>;
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defm SPV_INTEL_subgroup_matrix_multiply_accumulate : ExtensionOperand<121>;
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defm SPV_INTEL_2d_block_io : ExtensionOperand<122>;
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defm SPV_INTEL_int4 : ExtensionOperand<123>;
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//===----------------------------------------------------------------------===//
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// Multiclass used to define Capabilities enum values and at the same time
@@ -522,6 +523,8 @@ defm SubgroupMatrixMultiplyAccumulateINTEL : CapabilityOperand<6236, 0, 0, [SPV_
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defm Subgroup2DBlockIOINTEL : CapabilityOperand<6228, 0, 0, [SPV_INTEL_2d_block_io], []>;
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defm Subgroup2DBlockTransformINTEL : CapabilityOperand<6229, 0, 0, [SPV_INTEL_2d_block_io], [Subgroup2DBlockIOINTEL]>;
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defm Subgroup2DBlockTransposeINTEL : CapabilityOperand<6230, 0, 0, [SPV_INTEL_2d_block_io], [Subgroup2DBlockIOINTEL]>;
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defm Int4TypeINTEL : CapabilityOperand<5112, 0, 0, [SPV_INTEL_int4], []>;
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defm Int4CooperativeMatrixINTEL : CapabilityOperand<5114, 0, 0, [SPV_INTEL_int4], [Int4TypeINTEL, CooperativeMatrixKHR]>;
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//===----------------------------------------------------------------------===//
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// Multiclass used to define SourceLanguage enum values and at the same time

‎llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_int4/cooperative_matrix.ll

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@@ -0,0 +1,20 @@
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; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown --spirv-ext=+SPV_INTEL_int4,+SPV_KHR_cooperative_matrix %s -o - | FileCheck %s
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; RUNx: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown --spirv-ext=+SPV_INTEL_int4,+SPV_KHR_cooperative_matrix %s -o - -filetype=obj | spirv-val %}
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; CHECK-DAG: Capability Int4TypeINTEL
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; CHECK-DAG: Capability CooperativeMatrixKHR
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; CHECK-DAG: Extension "SPV_INTEL_int4"
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; CHECK-DAG: Capability Int4CooperativeMatrixINTEL
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; CHECK-DAG: Extension "SPV_KHR_cooperative_matrix"
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; CHECK: %[[#Int4Ty:]] = OpTypeInt 4 0
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; CHECK: %[[#CoopMatTy:]] = OpTypeCooperativeMatrixKHR %[[#Int4Ty]]
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; CHECK: CompositeConstruct %[[#CoopMatTy]]
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define spir_kernel void @foo() {
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entry:
16+
%call.i.i = tail call spir_func noundef target("spirv.CooperativeMatrixKHR", i4, 3, 12, 12, 2) @_Z26__spirv_CompositeConstruct(i4 noundef 0)
17+
ret void
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}
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declare dso_local spir_func noundef target("spirv.CooperativeMatrixKHR", i4, 3, 12, 12, 2) @_Z26__spirv_CompositeConstruct(i4 noundef)

‎llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_int4/negative.ll

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@@ -0,0 +1,29 @@
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; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown --spirv-ext=+SPV_INTEL_arbitrary_precision_integers %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-INT-4
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; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-INT-8
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; No error would be reported in comparison to Khronos llvm-spirv, because type adjustments to integer size are made
5+
; in case no appropriate extension is enabled. Here we expect that the type is adjusted to 8 bits.
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; CHECK-SPIRV: Capability ArbitraryPrecisionIntegersINTEL
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; CHECK-SPIRV: Extension "SPV_INTEL_arbitrary_precision_integers"
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; CHECK-INT-4: %[[#Int4:]] = OpTypeInt 4 0
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; CHECK-INT-8: %[[#Int4:]] = OpTypeInt 8 0
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; CHECK: OpTypeFunction %[[#]] %[[#Int4]]
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; CHECK: %[[#Int4PtrTy:]] = OpTypePointer Function %[[#Int4]]
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; CHECK: %[[#Const:]] = OpConstant %[[#Int4]] 1
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; CHECK: %[[#Int4Ptr:]] = OpVariable %[[#Int4PtrTy]] Function
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; CHECK: OpStore %[[#Int4Ptr]] %[[#Const]]
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; CHECK: %[[#Load:]] = OpLoad %[[#Int4]] %[[#Int4Ptr]]
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; CHECK: OpFunctionCall %[[#]] %[[#]] %[[#Load]]
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define spir_kernel void @foo() {
21+
entry:
22+
%0 = alloca i4
23+
store i4 1, ptr %0
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%1 = load i4, ptr %0
25+
call spir_func void @boo(i4 %1)
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ret void
27+
}
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declare spir_func void @boo(i4)

‎llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_int4/trivial.ll

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@@ -0,0 +1,25 @@
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; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown --spirv-ext=+SPV_INTEL_int4 %s -o - | FileCheck %s
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; RUNx: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown --spirv-ext=+SPV_INTEL_int4 %s -o - -filetype=obj | spirv-val %}
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; CHECK: Capability Int4TypeINTEL
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; CHECK: Extension "SPV_INTEL_int4"
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; CHECK: %[[#Int4:]] = OpTypeInt 4 0
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; CHECK: OpTypeFunction %[[#]] %[[#Int4]]
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; CHECK: %[[#Int4PtrTy:]] = OpTypePointer Function %[[#Int4]]
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; CHECK: %[[#Const:]] = OpConstant %[[#Int4]] 1
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; CHECK: %[[#Int4Ptr:]] = OpVariable %[[#Int4PtrTy]] Function
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; CHECK: OpStore %[[#Int4Ptr]] %[[#Const]]
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; CHECK: %[[#Load:]] = OpLoad %[[#Int4]] %[[#Int4Ptr]]
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; CHECK: OpFunctionCall %[[#]] %[[#]] %[[#Load]]
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16+
define spir_kernel void @foo() {
17+
entry:
18+
%0 = alloca i4
19+
store i4 1, ptr %0
20+
%1 = load i4, ptr %0
21+
call spir_func void @boo(i4 %1)
22+
ret void
23+
}
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declare spir_func void @boo(i4)

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